Abstract: A display substrate including a base substrate and a plurality of pixel units on the base substrate. Each pixel unit includes: a plurality of sub-pixels and at least one scanning line. The plurality of sub-pixels are arranged sequentially in a first direction, each sub-pixels includes a sub-pixel driving circuit and a light-emitting element, and the sub-pixel driving circuit is coupled to the light-emitting element. Each scanning line includes a first scanning conductive layer and a second scanning conductive layer arranged in a laminated manner, the first scanning conductive layer is coupled to the second scanning conductive layer, the first scanning conductive layer includes at least a portion extending in the first direction, and the first scanning conductive layer is coupled to a plurality of sub-pixel driving circuits in the plurality of sub-pixels.

Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.

Abstract: The present disclosure provides a display control method and a display control device. The display control method is used for a display panel. The display panel includes at least a first display area and a second display area arranged in a first direction, the first display area is coupled to a first signal line, and the second display area is coupled to a second signal line. The display control method includes: controlling a first sub-pixel in the first display area to display an image via the first signal line; and controlling a second sub-pixel in the second display area to display an image via the second signal line. A light-emission phase of the first sub-pixel at most partially overlaps a light-emission phase of the second sub-pixel.

Abstract: A display panel includes: a substrate, including a display area and a peripheral area surrounding the display area; an auxiliary electrode layer, located on a side of the substrate, where the auxiliary electrode layer includes an auxiliary electrode in the display area and a connection portion in the peripheral area; and a data line layer, including multiple data lines in the display area and a peripheral line portion in the peripheral area; where in the display area, the multiple data lines and the auxiliary electrode are provided in a same layer; and where in the peripheral area, the peripheral line portion and the connection portion are provided in a same layer.

Abstract: A Hybrid Automatic Repeat reQuest ACKnowledgement (HARQ-ACK) codebook construction method and transmission method, and a device, are provided. The HARQ-ACK codebook construction method includes: obtaining a time domain feedback record set, where each time domain feedback record in the time domain feedback record set includes a time domain resource assignment record and an equivalent feedback time offset corresponding to the time domain resource assignment record, and the equivalent feedback time offset is a feedback time offset value actually applied when a HARQ-ACK for the time domain resource assignment record corresponding to the equivalent feedback time offset is fed back in an uplink slot; dividing the time domain feedback record set into subsets based on equivalent feedback time offset(s), where each equivalent feedback time offset corresponds to one subset; and constructing a HARQ-ACK codebook based on the subsets obtained through division, to perform feedback in the uplink slot.

Abstract: An analog error correction circuit is disclosed that implements an analog error correction code. The analog circuit includes a crossbar array of memristors or other non-volatile tunable resistive memory devices. The crossbar array includes a first crossbar array portion programmed with values of a target computation matrix and a second crossbar array portion programmed with values of an encoder matrix for correcting computation errors in the matrix multiplication of an input vector with the computation matrix. The first and second crossbar array portions share the same row lines and are connected to a third crossbar array portion that is programmed with values of a decoder matrix, thereby enabling single-cycle error detection. A computation error is detected based on output of the decoder matrix circuitry and a location of the error is determined via an inverse matrix multiplication operation whereby the decoder matrix output is fed back to the decoder matrix.

Abstract: A HARQ ACK feedback method and apparatus, a terminal, and a storage medium are provided. The HARQ ACK feedback method in embodiments of this application includes: determining, by a terminal, a candidate physical downlink shared channel PDSCH reception occasion set based on a slot timing set corresponding to an actual HARQ ACK feedback unit, where in the slot timing set, each element corresponds to one first slot set and each element corresponds to a different first slot set, where the first slot set comprises at least two consecutive slot units; and determining, by a terminal, a HARQ ACK feedback codebook based on the candidate PDSCH reception occasion set.

Abstract: This application discloses a physical uplink control channel resource determining method, a terminal, and a network-side device, and pertains to the field of wireless communications technologies. A physical uplink control channel resource determining method in embodiments of this application is provided, including: receiving, by a terminal, system information, where the system information includes a first index, and the first index is used to indicate one target PUCCH resource set in multiple PUCCH resource sets that are predefined; obtaining, by the terminal, a first target parameter configured for the target PUCCH resource set; and determining, by the terminal based on the first target parameter and a predefined configuration parameter for the target PUCCH resource set, a target physical uplink control channel (PUCCH) resource for use before radio resource control establishment.

Abstract: An information feedback method includes receiving at least one piece of DCI; dividing, into multiple PDSCH subsets, a PDSCH set scheduled by each DCI; determining a DAI corresponding to each of the PDSCH subsets; and feeding back a HARQ-ACK for the multiple PDSCH subsets according to the DAI corresponding to each of the PDSCH subsets.

Abstract: An analog error correction circuit is disclosed that implements an analog error correction code. The analog circuit includes a crossbar array of memristors or other non-volatile tunable resistive memory devices. The crossbar array includes a first crossbar array portion programmed with values of a target computation matrix and a second crossbar array portion programmed with values of an encoder matrix for correcting computation errors in the matrix multiplication of an input vector with the computation matrix. The first and second crossbar array portions share the same row lines and are connected to a third crossbar array portion that is programmed with values of a decoder matrix, thereby enabling single-cycle error detection. A computation error is detected based on output of the decoder matrix circuitry and a location of the error is determined via an inverse matrix multiplication operation whereby the decoder matrix output is fed back to the decoder matrix.

Abstract: A resource mapping method and apparatus and a device are provided. The method is applied to user equipment UE, and the method includes: determining, by the UE, location information of N target physical resource blocks PRBs, where the N target PRBs are frequency domain resources for a target physical uplink control channel PUCCH; and mapping, by the UE, sequence information of the target PUCCH to the N target PRBs based on the location information, where N is a positive integer greater than 1.

Abstract: Systems and methods for an optical ternary content addressable memory (TCAM) are provided. The optical TCAM implements a time-division multiplexing (TDM) based encoding scheme to encode each bit position of a search word in the time domain. Each bit position is associated with at least two time slots. The encoded optical signal comprising the search word is routed through one or more modulators configured to represent a respective TCAM stored word. If a mismatch between at least one bit position of the search word and at least one TCAM stored word occurs, a photodetector or photodetector array will detect light.

Abstract: Systems are methods are provided for implementing an analog content addressable memory (analog CAM), which is particularly structured to allow for an amount of variance (fuzziness) in its search operations. The analog CAM may search for approximate matches with the data stored therein, or matches within a defined variance. Circuitry of the analog CAM may include transistor-source lines that receive search-variance parameters, and/or data lines that receive search-variance parameters explicitly within the search input data. The search-variance parameters may include an upper bound and a lower bound that define a range of values within the allotted amount of fuzziness (e.g., deviation from the stored value). The search-variance parameters may program (using analog approaches) the analog CAM to perform searches having a modifiable restrictiveness that is tuned dynamically, as defined by the input search-variance. Thus, highly efficient hardware for complex applications involving fuzziness are enabled.

Abstract: An analog content addressable memory (aCAM) that enables parallel searching of analog ranges of values and generates analog outputs that quantify matches between input data and stored data is disclosed. The input data can be compared with the stored data, and the input data can be determined to match the stored data based on a value associated with the input data being within a range associated with the stored data. The aCAM can generate an analog output that represents a number of matches and a number of mismatches between the input data and the stored data. Based on the analog output, whether the input data matches the stored data and a degree to which the input data matches the stored data can be determined.

Abstract: An analog error correction circuit is disclosed that implements an analog error correction code. The analog circuit includes a crossbar array of memristors or other nonvolatile tunable resistive memory devices. The crossbar array includes a first crossbar array portion programmed with values of a target computation matrix and a second crossbar array portion programmed with values of an encoder matrix for correcting computation errors in the matrix multiplication of an input vector with the computation matrix. The first and second crossbar array portions share the same row lines and are connected to a third crossbar array portion that is programmed with values of a decoder matrix, thereby enabling single-cycle error detection. A computation error is detected based on output of the decoder matrix circuitry and a location of the error is determined via an inverse matrix multiplication operation whereby the decoder matrix output is fed back to the decoder matrix.

Abstract: Systems are methods are provided for implementing an analog content addressable memory (analog CAM), which is particularly structured to allow for an amount of variance (fuzziness) in its search operations. The analog CAM may search for approximate matches with the data stored therein, or matches within a defined variance. Circuitry of the analog CAM may include transistor-source lines that receive search-variance parameters, and/or data lines that receive search-variance parameters explicitly within the search input data. The search-variance parameters may include an upper bound and a lower bound that define a range of values within the allotted amount of fuzziness (e.g., deviation from the stored value). The search-variance parameters may program (using analog approaches) the analog CAM to perform searches having a modifiable restrictiveness that is tuned dynamically, as defined by the input search-variance. Thus, highly efficient hardware for complex applications involving fuzziness are enabled.

Abstract: Examples described herein relate to a decision tree computation system in which a hardware accelerator for a decision tree is implemented in the form of an analog Content Addressable Memory (a-CAM) array. The hardware accelerator accesses a decision tree. The decision tree comprises of multiple paths and each path of the multiple paths includes a set of nodes. Each node of the decision tree is associated with a feature variable of multiple feature variables of the decision tree. The hardware accelerator combines multiple nodes among the set of nodes with a same feature variable into a combined single node. Wildcard values are replaced for feature variables not being evaluated in each path. Each combined single node associated with each feature variable is mapped to a corresponding column in the a-CAM array and the multiple paths of the decision tree to rows of the a-CAM array.

Abstract: Encoding of domain logic rules in an analog content addressable memory (aCAM) is disclosed. By encoding domain logic in an aCAM, rapid and flexible search capabilities are enabled, including the capability to search ranges of analog values, fuzzy match capabilities, and optimized parameter search capabilities. This is achieved with low latency by using only a small number of clock cycles at low power. A domain logic ruleset may be represented using various data structures such as decision trees, directed graphs, or the like. These representations can be converted to a table of values, where each table column can be directly mapped to a corresponding row of the aCAM.

Abstract: Systems, devices, circuits, methods, and non-transitory computer readable media that enable storing and searching arbitrary segments of ranges of analog values are disclosed. Various analog content addressable memory (aCAM) circuit implementations having the capability to store and search outside of a range of values, within any of multiple disjoint ranges, or outside of multiple ranges are disclosed. The disclosed aCAM circuit implementations make searching for complex input features more flexible and efficient, thereby yielding a technological improvement over conventional solutions. In some implementations, an aCAM may include multiple pull-down transistors connected in series to a match line that is pre-charged, in which case, the aCAM detects a match if the match line is not discharged by the pull-down transistors, which occurs if at least one pull-down transistor is in an OFF state. In other implementations, an aCAM includes pass gates connected to a match line to detect a match.

Abstract: A surveillance camera includes a housing containing a camera module, an optical reflection component, and a first driving component. The camera module has a fixed position and is disposed opposite to a reflective surface of the optical reflection component, which is disposed in a transparent portion of the housing. The reflective surface is positioned at an angle with respect to the input axis of the camera module to reflect light received through the transparent housing portion to the camera module. The camera module captures an image by detecting the light reflected to it by the reflective surface. The first driving component drives the optical reflection component to rotate the reflective surface around the input axis of the camera module, such that the camera module captures images carried by light from different directions through the transparent portion of the housing without rotation of the camera module itself.