Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.

Abstract: Embodiments of the present disclosure provide a display panel and a display device. The display panel includes a base substrate, a plurality of pixel units and a plurality of gate line groups. At least one pixel unit includes a plurality of sub-pixels. At least one sub-pixel includes a sensing transistor and a driving transistor. Each gate line group includes a first gate line and a second gate line; for the first gate line and the second gate line corresponding to the sub-pixels in the same row, the positions of the sensing transistors are closer to the second gate lines, and the positions of the driving transistors are closer to the first gate line, For two sub-pixels close to each other and located in different pixel units in the same row, at least one signal line has a double-layer alignment structure, and the double-layer alignments are electrically connected with each other.

Abstract: The present disclosure provides a motherboard and a manufacturing method for the motherboard, the motherboard includes at least one display area, a periphery area surrounding the at least one display area, a plurality of test terminals, an electrostatic discharge line, a plurality of resistors and at least one thin film transistor. The plurality of test terminals are respectively electrically connected to the electrostatic discharge line through the plurality of resistors. At least one of the plurality of resistors includes an inorganic nonmetal trace. The at least one thin film transistor includes an active layer, and the inorganic nonmetal trace includes a same semiconductor matrix material as the active layer of the at least one thin film transistor.

Abstract: A display substrate includes an underlay substrate and a plurality of pixel unit groups. The plurality of pixel unit groups are located in a display region of the underlay substrate. At least one pixel unit group includes a plurality of sub-pixel groups, wherein at least one sub-pixel group includes a pixel circuit. The pixel circuit includes a first sub-pixel circuit, a second sub-pixel circuit, and a light emitting control sub-circuit. The first sub-pixel circuit and the second sub-pixel circuit are both electrically connected to the light emitting control sub-circuit. The light emitting control sub-circuit is configured to control a first light emitting element electrically connected to the first sub-pixel circuit to emit light, and to control a second light emitting element electrically connected to the second sub-pixel circuit to emit light.

Abstract: A display substrate includes N groups of gate driving circuits and a multiplex circuit. Each group of gate driving circuits includes X gate driving circuits, and each gate driving circuit is electrically connected to rows of pixel circuits in a corresponding display zone. The X gate driving circuits are configured to output X scan signals of different functions to the rows of pixel circuits connected thereto. The multiplex circuit is electrically connected to N gate driving circuits of the N groups of gate driving circuits outputting scan signals of the same function, N selection control signal terminals and a start signal terminal. The multiplex circuit is configured to, under at least one selection control signal from at least one selection control signal terminal, select at least one group of gate driving circuits, and transmit a start signal from the start signal terminal to each selected group of gate driving circuits.

Abstract: A voltage supply circuit, a voltage supply method, a voltage supply module and a display device are provided. The voltage supply circuit includes a first node control circuit, a first control node control circuit, a second node control circuit and a driving voltage output circuit. The first node control circuit controls a potential of the first node; the first control node control circuit controls the potential of the first control node; the second node control circuit controls a potential of the second node; the driving voltage output circuit is electrically connected to the second node, the driving voltage output terminal and the initial voltage terminal respectively, and is configured to control the driving voltage output terminal to output a driving voltage according to the initial voltage provided by the initial voltage terminal under the control of the potential of the second node.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes: a base substrate including a display area and a first frame area located on one side of the display area; and a first power bus at least located in the first frame area. The first power bus includes a first sub-bus, a second sub-bus and at least two connecting wires. The first sub-bus is located between the second sub-bus and the display area, and the first sub-bus is electrically connected to the second sub-bus by means of the at least two connecting wires.

Abstract: Disclosed are a display substrate and a display apparatus, the display substrate includes a transparent region and a pixel region, the pixel region includes a plurality of light emitting devices, the plurality of light emitting devices include a first light emitting device, an orthographic projection of a first anode layer of the first light emitting device on a plane of the display substrate is partially overlapped with an orthographic projection of the transparent region on the plane of the display substrate, and an orthographic projection of a second anode layer of the first light emitting device on the plane of the display substrate is within a range of an orthographic projection of the pixel region on the plane of the display substrate.

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Abstract: The present disclosure provides a signal selection circuit and a signal selection method of a display panel, and a display device. The display panel has N regions and includes pixel driving circuits and M gate driving circuits for providing M gate driving signals to the pixel driving circuits; each gate driving circuit includes N gate driving sub-circuits, each of which is configured to provide one gate driving signal to the pixel driving circuits in one region; M?2, N?2, and M and N are integers; the signal selection circuit includes: M frame start signal lines, each of which is configured to provide a frame start signal for one gate driving circuit; and a selection sub-circuit configured to output frame start signals written by the frame start signal lines to the gate driving sub-circuits corresponding to the regions of the display panel according to a preset sequence.

Abstract: A light-emitting control shift register includes an input circuit, a pulse width adjustment circuit, a pull-up circuit, a pull-down control circuit and a pull-down circuit. The input circuit is configured to output a signal of a first signal input terminal. The pulse width adjustment circuit is configured to transmit the signal output from the input circuit to a pull-up node, and is further configured to output a signal of a second clock signal terminal to the pull-up node. The pull-up circuit is configured to output a voltage of a first voltage terminal to a signal output terminal. The pull-down control circuit is configured to output the voltage of the first voltage terminal, and is further configured to output a voltage of a second voltage terminal. The pull-down circuit is configured to pull down a voltage of the signal output terminal to the voltage of the second voltage terminal.

Abstract: The disclosure provides a display substrate, which has a display region and a peripheral region, and includes a base substrate, a plurality of sub-pixels, a first power signal line and a second power signal line at least partially located in the display region, a first power signal bus and a second power signal bus located in the peripheral region; the sub-pixels are located in the display region; the first power signal line and the second power signal line are electrically connected to the first power signal bus and the second power signal bus, respectively; the second power signal bus includes a first part disposed on a side of the first power signal bus close to the display region, and a second part disposed on a side of the first power signal bus away from the display region, so as to at least partially surround the first power signal bus.

Abstract: A profiled display panel, including a display area. The display area includes a plurality of display sub-areas; a plurality of cascade signal lines for coupling adjacent two of the gate driving sub-circuits. At least one cascade signal line includes a first cascade trace extending in a first direction and a second cascade trace extending in a second direction. The first cascade trace includes a plurality of first conductive patterns arranged on a first conductive layer and second conductive pattern arranged on a second conductive layer. The plurality of first conductive patterns are electrically connected to the second conductive pattern; and the second cascade trace includes a third conductive pattern arranged on the first conductive layer.

Abstract: The present application relates to an anti-Nectin-4 antibody, a drug conjugate and a preparation method and use thereof, which can be effectively used for the treatment and/or prevention of Nectin-4 positive tumors, including cancers, such as breast cancer and bladder cancer.

Abstract: Embodiments of the present disclosure provide a display panel, a display device, and a method for preparing a display panel. The display panel has a display area and a peripheral area, the display panel including a pixel defining layer including a plurality of first pixel defining blocks in the display area parallelly arranged in a first direction, and adjacent first pixel defining blocks having different columns of pixel defining openings, and at least one second pixel defining block in the peripheral area as an extension of at least one first pixel defining block in a second direction to the peripheral area, each second pixel defining block including a plurality of columns of pixel defining openings, a column number which is greater than or equal to the difference in the column numbers of pixel defining openings of two adjacent first pixel defining blocks.

Abstract: A display panel includes pixel driving circuits distributed in an array and forming pixel driving circuit groups, each pixel driving circuit group includes pixel driving circuit rows with each including pixel driving circuits, each of which includes a driving circuit connected to a first, second and third nodes, to input a driving current to the third node through the second node in response to a signal of the first node; a first switching unit with a first end connected to a first power supply terminal and second end connected to the second node, to connect the first power supply terminal and the second node in response to a pulse width modulation signal; in a same pixel driving circuit group, a second end of any first switching unit is connected to a second end of at least one first switching unit in each of the other pixel driving circuit rows.

Abstract: The present disclosure provides a display substrate and a display apparatus. The display substrate includes a drive structure layer disposed on a base substrate and a light emitting structure layer disposed on the drive structure layer, the light emitting structure layer at least includes a cathode and an auxiliary electrode, and the cathode is connected with the auxiliary electrode; the auxiliary electrode includes a first auxiliary electrode, a second auxiliary electrode, and a third auxiliary electrode stacked along a direction away from the base substrate, the third auxiliary electrode has a protruding portion relative to a sidewall of the second auxiliary electrode, a protruding distance of the protruding portion is greater than or equal to a thickness of the second auxiliary electrode, and the protruding distance is a distance between an edge of the third auxiliary electrode and the sidewall of the second auxiliary electrode.

Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.

Abstract: Provided is a display panel. The display panel includes: a substrate; a plurality of first control lines and a plurality of second control lines on a side of the substrate; and a plurality of subpixels arranged in an array on the side of the substrate, wherein at least two of the plurality of subpixels share a first node; wherein the subpixel includes a first circuit and a second circuit, the first circuit and the second circuit being configured to control a voltage at the first node in response to a first control signal and a second control signal; wherein in the display panel, a sum of a number of the plurality of first control lines and a number of the plurality of second control lines is less than or equal to a number of the subpixels in a column direction.

Abstract: A transparent OLED display panel, a manufacturing method therefor, and a display apparatus are provided, relating to the field of display technologies. The display panel has a plurality of transparent regions and a plurality of display regions, wherein the transparent regions and the display regions are alternately arranged in a first direction. The display panel includes a plurality of pixels arranged in a second direction and a plurality of data lines; each of the pixels includes a plurality of sub-pixels, and the sub-pixels in each display region include a row of first sub-pixels and a row of second sub-pixels both arranged in the second direction; and the pixel at least includes one first sub-pixel and one second sub-pixel adjacent to each other. In the same display region, one first sub-pixel and one second sub-pixel adjacent to each other in the first direction are connected to the same data line.