Abstract: Methods and systems for efficiently logging in or onto a computer system or other restricted system are described. An enterprise device may detect that a user device is within a detectable range of the user device. A user profile associated with the user device may be identified. The user and/or the user device may provide authentication information to the enterprise device, and the user may be granted access when the authentication information has been verified.

Abstract: A method, system and computer program product are provided for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. The DRAM configuration includes a first buffer and a second buffer, each buffer including a validity counter. The validity counter for a receiving buffer is incremented as each respective data row from a transferring buffer is validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, while the validity counter for the transferring buffer is decremented. Data are read from or written to either the first buffer or the second buffer based upon a respective count value of the validity counters.

Abstract: The present invention relates to anti-miR-27b and anti-miR-148a oligonucleotides that are capable of decreasing the level and/or activity of miR-27b and miR-148a, respectively. In conjunction with the oligonucleotide molecules of the present invention, the invention also provides a method for decreasing the level and/or activity of miR-27b and/or miR-148a in a cell. In a further embodiment, the invention provides a method for treating a disease, especially dyslipidemias and cardiovascular diseases.

Abstract: A method, system and memory controller are provided for implementing simultaneous read and write operations in a memory subsystem utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. A DRAM includes a first partition and a second partition. A memory controller determines if memory requirements are above or below a usage threshold. If the memory requirements are below the usage threshold, the memory is partitioned into a read buffer and a write buffer, with writes going to the write buffer and reads coming from the read buffer, data being transferred from the write buffer to the read buffer through an Error Correction Code (ECC) engine. If the memory requirements are above the usage threshold, the entire memory is used for reads and writes.

Abstract: A method, system and memory controller are provided for implementing simultaneous read and write operations in a memory subsystem utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. A DRAM includes a first partition and a second partition. A memory controller determines if memory requirements are above or below a usage threshold. If the memory requirements are below the usage threshold, the memory is partitioned into a read buffer and a write buffer, with writes going to the write buffer and reads coming from the read buffer, data being transferred from the write buffer to the read buffer through an Error Correction Code (ECC) engine. If the memory requirements are above the usage threshold, the entire memory is used for reads and writes.

Abstract: A method, system and computer program product are provided for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. The DRAM configuration includes a first buffer and a second buffer, each buffer including a validity counter. The validity counter for a receiving buffer is incremented as each respective data row from a transferring buffer is validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, while the validity counter for the transferring buffer is decremented. Data are read from or written to either the first buffer or the second buffer based upon a respective count value of the validity counters.

Abstract: The inhibition of miRNA miR-33 is shown to promote the polarization of macrophages from an M1 to an M2 phenotype. MiR-33 inhibitors are therefore useful for treating inflammation in subjects. Endogenous microRNAs can be silenced using antagomirs. The miR-33 inhibitor is preferably an antagomir having a single-stranded nucleic acid sequence that is complementary to at least 12 contiguous nucleotides in miR-33 and therefore forms a duplex with miR-33 under physiological conditions.

Abstract: The present invention relates to a method of treating functional disability and/or pain associated with joints, tendons or connective tissue diseases, disorders or injuries comprising oral administration of a composition comprising heterologous platelet-rich plasma. The invention also relates to pharmaceutical compositions and nutritional compositions comprising heterologous platelet-rich plasma and uses thereof.

Abstract: Methods and systems for behavioral profiling are described. In some embodiments, a method includes observing behavioral characteristics of user interactions during a current session with the user through one of a plurality of channels. Variations between the behavioral characteristics of the user interactions observed during the current session and a behavioral profile previously developed based on prior usage patterns of the user through the plurality of channels are identified, in real-time or near real-time. For the user to proceed in the session, a challenge level is implemented based on the variations between the behavioral characteristics and the behavioral profile.

Abstract: A method, system and computer program product are provided for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. The DRAM configuration includes a first buffer and a second buffer, each buffer including a validity counter. The validity counter for a receiving buffer is incremented as each respective data row from a transferring buffer is validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, while the validity counter for the transferring buffer is decremented. Data are read from or written to either the first buffer or the second buffer based upon a respective count value of the validity counters.

Abstract: A method, system and computer program product are provided for implementing enhanced reliability of memory subsystems utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. The DRAM configuration includes a first buffer and a second buffer, each buffer including a validity counter. The validity counter for a receiving buffer is incremented as each respective data row from a transferring buffer is validated through Error Correction Code (ECC), Reliability, Availability, and Serviceability (RAS) logic and transferred to the receiving buffer, while the validity counter for the transferring buffer is decremented. Data are read from or written to either the first buffer or the second buffer based upon a respective count value of the validity counters.

Abstract: A method, system and memory controller are provided for implementing simultaneous read and write operations in a memory subsystem utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. A DRAM includes a first partition and a second partition. A memory controller determines if memory requirements are above or below a usage threshold. If the memory requirements are below the usage threshold, the memory is partitioned into a read buffer and a write buffer, with writes going to the write buffer and reads coming from the read buffer, data being transferred from the write buffer to the read buffer through an Error Correction Code (ECC) engine. If the memory requirements are above the usage threshold, the entire memory is used for reads and writes.

Abstract: A method, system and memory controller are provided for implementing simultaneous read and write operations in a memory subsystem utilizing a dual port Dynamic Random Access Memory (DRAM) configuration. A DRAM includes a first partition and a second partition. A memory controller determines if memory requirements are above or below a usage threshold. If the memory requirements are below the usage threshold, the memory is partitioned into a read buffer and a write buffer, with writes going to the write buffer and reads coming from the read buffer, data being transferred from the write buffer to the read buffer through an Error Correction Code (ECC) engine. If the memory requirements are above the usage threshold, the entire memory is used for reads and writes.

Abstract: A refresh command is received from a memory controller. An interruptible refresh containing multiple segment refreshes is initiated. The segment refreshes are separated by interrupt boundaries. A command is received before execution of a segment refresh. The first command is executed and execution of the first segment refresh is delayed at a first interrupt boundary. Alternatively, a first number of segment refreshes to execute is received from a memory controller. The received first number of segment refreshes is executed. A second number of segment refreshes to execute is received from a memory controller. The received second number of segment refreshes is executed. No segment refreshes are executed between the execution of the first number of segment refreshes and the execution of the second number of segment refreshes.

Abstract: A refresh command is communicated to a memory device to initiate an interruptible refresh which contains multiple segment refreshes separated by interrupt boundaries. A command is communicated to the memory device before execution of a segment refresh and the segment refresh is delayed at an interrupt boundary. Alternatively, a first number of commands in a queue is determined. A first number of segment refreshes to execute is determined based on the first number of commands. The first number of segment refreshes to execute is communicated to the memory device to cause execution of the first number of segment refreshes. A second number of commands in the queue is determined. A second number of segment refreshes to execute is determined based on the second number of commands. The second number of segment refreshes to execute is communicated to the memory device to cause execution of the second number of segment refreshes.

Abstract: The present invention relates to a novel complex, obtainable by mixing hyaluronic acid or a salt thereof and chondroitin sulphate or a salt thereof, and forming an aqueous solution of said mixture, which is further subjected to a drying process. The invention also relates to various compositions and formulations comprising the complex of the invention, process for obtaining said complex and uses thereof.

Abstract: An electrophilic acid gas-reactive fracturing and recovery fluid, proppant, and process are detailed. The fluid expands in volume to provide rapid and controlled increases in pressure that enhances fracturing in subterranean bedrock for recovery of energy-producing materials. Proppants stabilize openings in fractures and fissures following fracturing.

Abstract: A saxophone having a body, a neck including a plurality of keys mounted thereon, each of said keys including an actuating surface and a bell including a valve protector, the improvement comprising a system for controlling the tension and travel of a saxophone player's fingers of both hands with a right hand device and a left hand device. The right hand device has an anchorage assembly mounted to the valve protector and a travel stopper elongated portion integrally extending from the anchorage assembly and kept at a substantially parallel and spaced apart relationship with respect to an actuating surface's plurality of keys thereby limiting the extension movement of a user's fingers as he or she actuates the keys. The left hand device includes an elongate stopper member with anchorage assemblies at its ends. The left hand device is rotatably mounted to facilitate its storage in storage cases.

Abstract: A method for analysis of 2-D gel images obtained using electrophoresis. More particularly, a molecular block-matching method for establishing the correspondence between protein spots in a diagnostic-test image and protein spots in a reference image. Individual protein spot matching is performed, thereby removing the need for alignment of the entire reference and test images and permitting automatic labeling of individual protein spots. The method for analysis of 2-D gel images is fully automated, thus making it ideally suited for protein information retrieval systems.