Abstract: A monostable circuit responsive conditionally to a circuit input signal for generating a circuit output signal having a pulse of a predetermined duration includes an AND gate having two input ports and an output port. ONe of the input ports is coupled to the circuit input signal and inverts that signal. The other of the input ports is coupled to the circuit output signal. A reset OR gate receives a reset signal and the output of the AND gate. When the reset signal is low, the reset OR gate outputs the output of the AND gate, thus enabling the curcuit. The output of the reset OR gate also goes to a ramp generator having a ramp capacitor, the charging current to which is provided by a current driver. The reference voltage for a comparator is provided by circuitry identical to that associated with the ramp capacitor except that an intermediate bias reference is applied to it. This bias reference is compensated for the effect temperature changes on the circuit.