Patents by Inventor Caterina Riva

Caterina Riva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100134101
    Abstract: A magnetic sensor is formed by a fluxgate sensor and by at least one Hall sensor integrated in a same integrated device, wherein the magnetic core of the fluxgate sensor is formed by a magnetic region that operates also as a concentrator for the Hall sensor. The magnetic region is manufactured in a post-machining stage on the metallization layers wherein the energizing coil and sensing coil of the fluxgate sensor are formed; the energizing and sensing coils are formed on a semiconductor substrate housing the conductive regions of the Hall sensor.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 3, 2010
    Applicant: STMicroelectronics S.r.l.
    Inventors: CATERINA RIVA, Marco Morelli, Marco Marchesi
  • Patent number: 7578184
    Abstract: A portable apparatus having an accelerometer device and a supporting element in the accelerometer device, having a first body of semiconductor material integrating a sensor element that detects movements of the first body and generates a signal correlated to the detected movement; a second body of semiconductor material that integrates a conditioning electronics and that is electrically connected to the first body; and conductive bumps that provide electrical connection of the first and second bodies to the supporting element. In particular, the conductive bumps connect the first and second bodies to the supporting element without the interposition of any packaging.
    Type: Grant
    Filed: December 12, 2005
    Date of Patent: August 25, 2009
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Fontanella, Benedetto Vigna, Ernesto Lasalandra, Caterina Riva
  • Publication number: 20090095705
    Abstract: A process manufactures an interaction structure for a storage medium. The process includes forming a first interaction head provided with a first conductive region having a sub-lithographic dimension. The step of forming a first interaction head includes: forming on a surface a first delimitation region having a side wall; depositing a conductive portion having a deposition thickness substantially matching the sub-lithographic dimension on the side wall; and then defining the conductive portion. The sub-lithographic dimension preferably is between 1 and 50 nm, more preferably 20 nm.
    Type: Application
    Filed: October 6, 2008
    Publication date: April 16, 2009
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Caterina Riva, Bruno Murari, Giovanni Frattini
  • Publication number: 20080315333
    Abstract: A substrate-level assembly having a device substrate of semiconductor material with a top face and housing a first integrated device, including a buried cavity formed within the device substrate, and with a membrane suspended over the buried cavity in the proximity of the top face. A capping substrate is coupled to the device substrate above the top face so as to cover the first integrated device in such a manner that a first empty space is provided above the membrane. Electrical-contact elements electrically connect the integrated device with the outside of the substrate-level assembly. In one embodiment, the device substrate integrates at least a further integrated device provided with a respective membrane, and a further empty space, fluidically isolated from the first empty space, is provided over the respective membrane of the further integrated device.
    Type: Application
    Filed: April 14, 2008
    Publication date: December 25, 2008
    Applicant: STMicroelectronics S.r.l.
    Inventors: Chantal Combi, Benedetto Vigna, Federico Giovanni Ziglioli, Lorenzo Baldo, Manuela Magugliani, Ernesto Lasalandra, Caterina Riva
  • Patent number: 7421904
    Abstract: Described herein is an assembly of an integrated device and of a cap coupled to the integrated device; the integrated device is provided with at least a first and a second region to be fluidically accessed from outside, and the cap has an outer portion provided with at least a first and a second inlet port in fluid communication with the first and second regions. In particular, the first and second regions are arranged on a first outer face, or on respective adjacent outer faces, of the integrated device, and an interface structure is set between the integrated device and the outer portion of the cap, and is provided with a channel arrangement for routing the first and second regions towards the first and second inlets.
    Type: Grant
    Filed: June 25, 2007
    Date of Patent: September 9, 2008
    Assignee: STMicroelectronics S.r.l.
    Inventors: Federico Giovanni Ziglioli, Chantal Combi, Lorenzo Baldo, Caterina Riva, Mark Andrew Shaw
  • Publication number: 20080197512
    Abstract: A process for manufacturing a through via in a semiconductor device includes the steps of: forming a body having a structural layer, a substrate, and a dielectric layer set between the structural layer and the substrate; insulating a portion of the structural layer to form a front-side interconnection region; insulating a portion of the substrate to form a back-side interconnection region; and connecting the front-side interconnection region and the back-side interconnection region through the dielectric layer.
    Type: Application
    Filed: November 16, 2006
    Publication date: August 21, 2008
    Applicant: STMicroelectronics S.r.l.
    Inventors: Mauro Marchi, Marco Ferrera, Caterina Riva
  • Publication number: 20080164576
    Abstract: A process for manufacturing an interaction system of a microelectromechanical type for a storage medium, the interaction system provided with a supporting element and an interaction element carried by the supporting element, envisages the steps of: providing a wafer of semiconductor material having a substrate with a first type of conductivity (P) and a top surface; forming a first interaction region having a second type of conductivity (N), opposite to the first type of conductivity (P), in a surface portion of the substrate in the proximity of the top surface; and carrying out an electrochemical etch of the substrate starting from the top surface, the etching being selective with respect to the second type of conductivity (N), so as to remove the surface portion of the substrate and separate the first interaction region from the substrate, thus forming the supporting element.
    Type: Application
    Filed: December 18, 2007
    Publication date: July 10, 2008
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Giuseppe Barillaro, Alessandro Diligenti, Caterina Riva, Roberto Campedelli, Stefano Losa
  • Publication number: 20080011090
    Abstract: Described herein is an assembly of an integrated device and of a cap coupled to the integrated device; the integrated device is provided with at least a first and a second region to be fluidically accessed from outside, and the cap has an outer portion provided with at least a first and a second inlet port in fluid communication with the first and second regions. In particular, the first and second regions are arranged on a first outer face, or on respective adjacent outer faces, of the integrated device, and an interface structure is set between the integrated device and the outer portion of the cap, and is provided with a channel arrangement for routing the first and second regions towards the first and second inlets.
    Type: Application
    Filed: June 25, 2007
    Publication date: January 17, 2008
    Applicant: STMicroelectronics S.r.l.
    Inventors: Federico Giovanni Ziglioli, Chantal Combi, Lorenzo Baldo, Caterina Riva, Mark Andrew Shaw
  • Patent number: 7227171
    Abstract: A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction transverse to said first direction; the first and second thin portions being in direct electrical contact and defining a contact area having a sublithographic extension. The thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion is obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, deposing a second delimitation layer on the free side of the sacrificial region, removing the sacrificial region to form a sublithographic opening that is used to etch a mold opening in a mold layer and filling the mold opening.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: June 5, 2007
    Assignees: STMicroelectronics S.r.l., Ovonyx, Inc.
    Inventors: Roberto Bez, Fabio Pellizzer, Caterina Riva, Romina Zonca
  • Publication number: 20060150731
    Abstract: A portable apparatus having an accelerometer device and a supporting element in the accelerometer device, having a first body of semiconductor material integrating a sensor element that detects movements of the first body and generates a signal correlated to the detected movement; a second body of semiconductor material that integrates a conditioning electronics and that is electrically connected to the first body; and conductive bumps that provide electrical connection of the first and second bodies to the supporting element. In particular, the conductive bumps connect the first and second bodies to the supporting element without the interposition of any packaging.
    Type: Application
    Filed: December 12, 2005
    Publication date: July 13, 2006
    Applicant: STMicroelectronics S.r.l.
    Inventors: Luca Fontanella, Benedetto Vigna, Ernesto Lasalandra, Caterina Riva
  • Publication number: 20030219924
    Abstract: A contact structure, including a first conducting region having a first thin portion with a first sublithographic dimension in a first direction; a second conducting region having a second thin portion with a second sublithographic dimension in a second direction transverse to said first direction; the first and second thin portions being in direct electrical contact and defining a contact area having a sublithographic extension. The thin portions are obtained using deposition instead of lithography: the first thin portion is deposed on a wall of an opening in a first dielectric layer; the second thin portion is obtained by deposing a sacrificial region on vertical wall of a first delimitation layer, deposing a second delimitation layer on the free side of the sacrificial region, removing the sacrificial region to form a sublithographic opening that is used to etch a mold opening in a mold layer and filling the mold opening.
    Type: Application
    Filed: December 5, 2002
    Publication date: November 27, 2003
    Applicants: STMicroelectronics S.r.l., OVONYX Inc.
    Inventors: Roberto Bez, Fabio Pellizzer, Caterina Riva, Romina Zonca
  • Patent number: 6294431
    Abstract: A process for the manufacture of a non-volatile memory with memory cells arranged in word lines and columns in a matrix structure, with source lines extending parallel and intercalate to said lines, said source lines formed by active regions intercalated to field oxide zones, said process comprising steps for the definition of active areas of said columns of said matrix of non-volatile memory cells and the definition of said field oxide zones, subsequent steps for the definition of the lines of said matrix of non-volatile memory cells, and a following step for the definition of said source lines.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: September 25, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Bez, Caterina Riva, Giorgio Servalli