Abstract: A multiple layer pixel architecture for an active matrix display is provided in which a common bus line is formed on a metal level which is separate from that on which the gate electrodes of the thin-film transistors (TFTS) are formed. A multilayer electronic structure adapted to solution deposition, the structure includes a TFT for driving a pixel of an active matrix optoelectronic device and a capacitor for storing charge to maintain an electrical state of said active matrix pixel, wherein the structure includes a substrate bearing at least four conducting layers separeted by at least three dielectric layers, first and second ones of said conducting layers defining drain/source electrodes and a gate electrode of said transistor respectively, and third and fourth ones of said conducting layers defining respective first and second plates of said capacitor, and wherein said capacitor and said transistor are laterally positioned such that they overlap in a vertical direction.

Abstract: A device comprising an array of transistors, including: patterned conductive layers located at lower and upper levels in a stack of layers on a substrate, which patterned conductive layers define gate conductors and source-drain electrodes of the array of transistors; wherein the stack of layers further comprises a dielectric layer below said lower level, and a further patterned conductive layer below said dielectric layer; and wherein said further patterned conductive layer both provides an electrical function in said array of transistors via said dielectric layer, and defines openings via which the dielectric layer serves to increase the strength of adhesion between the device substrate and the patterned conductive layer at said lower level.

Abstract: A method of manufacturing an electronic device comprises: providing a layer of semiconductor material comprising a first portion, a second portion, and a third portion, the third portion connecting the first portion to the second portion and providing a semiconductive channel for electrical current flow between the first and second portions; providing a gate terminal arranged with respect to said third portion such that a voltage may be applied to the gate terminal to control an electrical conductivity of said channel; and processing at least one of the first and second portions so as to have an electrical conductivity greater than an electrical conductivity of the channel when no voltage is applied to the gate terminal. In certain embodiments, the processing comprises exposing at least one of the first and second portions to electromagnetic radiation. The first and second portions may be laser annealed to increase their conductivities.

Abstract: A process of forming an electronic device, by forming the source and drain contacts using photolithography, incorporating a self-assembled monolayer (SAM) over the electrical contacts to form an increased work function of the source and drain electrodes and further forming more favorable charge injection properties or within the channel region to improve film morphology and therefore improve charge transport. The SAM material is added to the photoresist stripper during a step of the photolithography process of forming electrical contacts.

Abstract: A device comprising an array of transistors, including: patterned conductive layers located at lower and upper levels in a stack of layers on a substrate, which patterned conductive layers define gate conductors and source-drain electrodes of the array of transistors; wherein the stack of layers further comprises a dielectric layer below said lower level, and a further patterned conductive layer below said dielectric layer; and wherein said further patterned conductive layer both provides an electrical function in said array of transistors via said dielectric layer, and defines openings via which the dielectric layer serves to increase the strength of adhesion between the device substrate and the patterned conductive layer at said lower level.

Abstract: Forming, between a supporting substrate and the bottom conductive layer of a stack of layers a plurality of electronically functional elements, a non-conducting layer that functions to increase the adhesion of said bottom conductive layer to the supporting substrate.

Abstract: A process of forming an electronic device, by forming the source and drain contacts using photolithography, incorporating a self-assembled monolayer (SAM) over the electrical contacts to form an increased work function of the source and drain electrodes and further forming more favorable charge injection properties or within the channel region to improve film morphology and therefore improve charge transport. The SAM material is added to the photoresist stripper during a step of the photolithography process of forming electrical contacts.

Abstract: A method for forming an electronic device including at least one electrically conductive and one semiconductive material deposited from solution, the method comprising: forming on the substrate a confinement structure consisting of a least a first zone and a second zone, depositing the electrically conductive material on the substrate, wherein the electrically conductive material is absent from both the first and second zone, and subsequently depositing the electrically semiconductive material from solution, wherein the semiconductive material is absent from the first zone, but not from the second zone.

Abstract: A rectifying diode comprising a semiconducting layer, a first electrode, and a second electrode, wherein the width of the region of closest contact between the two electrodes is on the order of the thickness of the semiconducting layer.

Abstract: The present invention relates to a multiple layer pixel architecture for an active matrix display in which a common bus line is formed on a metal level which is separate from that on which the gate electrodes of the TFTs are formed. A multilayer electronic structure adapted to solution deposition, the structure including a thin film transistor (TFT) for driving a pixel of an active matrix optoelectronic device and a capacitor for storing charge to maintain an electrical state of said active matrix pixel, wherein the structure comprises a substrate bearing at least four conducting layers separated by at least three dielectric layers, first and second ones of said conducting layers defining drain/source electrodes and a gate electrode of said transistor respectively, and third and fourth ones of said conducting layers defining respective first and second plates of said capacitor, and wherein said capacitor and said transistor are laterally positioned such that they overlap in a vertical direction.

Abstract: A technique for high-resolution surface energy assisted patterning of semiconductor active layer islands on top of an array of predefined source-drain electrodes without requiring an additional process step for surface energy patterning.

Abstract: A rectifying diode comprising a semiconducting layer, a first electrode, and a second electrode, wherein the width of the region of closest contact between the two electrodes is on the order of the thickness of the semiconducting layer.

Abstract: A method for forming an electronic device including at least one electrically conductive and one semiconductive material deposited from solution, the method comprising: forming on the substrate a confinement structure consisting of a least a first zone and a second zone, depositing the electrically conductive material on the substrate, wherein the electrically conductive material is absent from both the first and second zone, and subsequently depositing the electrically semiconductive material from solution, wherein the semiconductive material is absent from the first zone, but not from the second zone.