Abstract: The present disclosure has disclosed a semiconductor material, light-emitting device, display panel and display device. The semiconductor material comprises: at least two of an oxide of a first element, an oxide of a second element, an oxide of a third element, an oxide of a fourth element and a compound of fifth element, and comprises at least the oxide of the first element and the compound of the fifth element; the first element comprises at least one of In, Zn, Sn, Cd, Tl and Pb; the second element comprises at least one of Ta, Ga, W, Ba, V, Hf and Nb; the third element comprises at least one of Sn, Zr, Cr and Si; the fourth element comprises at least one of Zn, Al, Sn, Ta, Hf, Zr and Ti; and the compound of the fifth element comprises MxA.

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.

Abstract: At least one embodiment of the present disclosure provides an oxide thin film transistor, a display device, and a preparation method of the oxide thin film transistor, and the oxide thin film transistor includes a base substrate; an oxide semiconductor layer provided on the base substrate, and an insulating layer provided on a side of the oxide semiconductor layer away from the base substrate; in which the insulating layer is made of oxide; the insulating layer includes a first insulating layer and a second insulating layer which are stacked; a density of the second insulating layer is greater than a density of the first insulating layer; and the second insulating layer is farther away from the base substrate than the first insulating layer.

Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate. The micro-nano channels have a high resolution or an ultra-high resolution, and have different sizes and shapes.

Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided by the embodiments of the present disclosure. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; and a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, and the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, and an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate.

Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

Abstract: A display base plate, a preparation method therefor and a display panel are provided in the present disclosure. The display panel can greatly improve resolution while ensuring low power consumption. The display base plate includes a plurality of sub-pixels. Each of the plurality of sub-pixels includes a storage capacitor, a polysilicon transistor and at least one oxide transistor. The storage capacitor includes a first electrode and a second electrode oppositely arranged, and first electrode is arranged at a side of the second electrode away from the substrate. The second electrode is arranged in the same layer as a gate electrode of the polysilicon transistor. The at least one oxide transistor is arranged on a side of the first electrode away from the substrate, and the first electrode at least partially overlaps with an active layer of the at least one oxide transistor in a direction perpendicular to the substrate.

Abstract: A method for manufacturing a thin film transistor, and a thin film transistor are provided. The method includes: forming an active layer on a substrate by a single patterning process; forming a gate insulating layer by deposition on a side of the active layer away from the substrate; forming a first via hole and a second via hole penetrating through the gate insulating layer by a single patterning process, the first and second via holes being located at two ends of the active layer respectively; and forming a first electrode, a gate electrode, and a second electrode on the gate insulating layer by a single patterning process, the first and second electrodes being connected to the active layer through the first and second via holes, respectively, and an orthographic projection of the gate electrode on the substrate at least partially overlapping that of the active layer on the substrate.

Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.

Abstract: A metal oxide semiconductor material includes a semiconductor base material and at least one kind of rare earth compound doped in the semiconductor base material, Each kind of rare earth compound has a general formula represented as (MFD)aAb, where in s the general formula (MFD)aAb, MFD is an element selected from rare earth elements capable of undergoing f-d transition and/or charge transfer transition, A is selected from elements capable of stretching a wavelength range of an absorption spectrum of MFD capable of undergoing the f-d transition and/or the charge transfer transition towards red light into a visible light range, a is a number of the element MFD in the general formula (MFD)aAb, and b is a number of the element A in the general formula (MFD)aAb.

Abstract: A biosensor apparatus is provided. The biosensor apparatus includes a base substrate; a first fluid channel layer on the base substrate and having a first fluid channel passing therethrough; a foundation layer on a side of the first fluid channel layer away from the base substrate, a foundation layer throughhole extending through the foundation layer to connect to the first fluid channel; and a micropore layer on a side of the foundation layer away from the base substrate, a micropore extending through the micropore layer to connect to the first fluid channel through the foundation layer throughhole. The micropore layer extends into the foundation layer throughhole and at least partially covers an inner wall of the foundation layer throughhole.

Abstract: A display substrate includes: a base substrate; a metal light-shielding layer disposed on the base substrate; a plurality of pixel units disposed on the base substrate; a plurality of first thin film transistors disposed on the metal light-shielding layer and configured to drive the pixel units; a plurality of photodiodes disposed on the metal light-shielding layer and configured to convert light emitted from the pixel units into photocurrents, each of the photodiodes including a first electrode; a plurality of second thin film transistors disposed on the metal light-shielding layer and configured to receive the photocurrents, so that light emission of the pixel units are compensated according to the photocurrents. Output terminals of the first thin film transistors are electrically connected to the metal light-shielding layer, and a gate of the first thin film transistor is electrically connected to the first electrode. Further disclosed are a display panel and a display substrate manufacturing method.

Abstract: A shift register unit includes an input sub-circuit, a pull-down node driving sub-circuit and an output sub-circuit. The pull-down node driving sub-circuit includes a first connection unit, a first voltage-reduction unit and a second connection unit, and configured to: under the control of the first voltage signal terminal and the pull-up node, transmit a first voltage signal from the first voltage signal terminal to the first pull-down node via the first connection unit, and reduce a voltage applied to the second connection unit via the first voltage-reduction unit; and transmit a second voltage signal from the second voltage signal terminal to the first pull-down node via the second connection unit under the control of the pull-up node.

Abstract: The present disclosure relates to the field of display technologies, and in particular to a thin film transistor and a method for manufacturing the same, an array substrate and a display device. An active layer of the thin film transistor includes at least two metal oxide semi-conductor layers, the at least two metal oxide semi-conductor layers include a channel layer and a first protection layer, and metals in the channel layer include tin, and at least one of indium, gallium and zinc. The first protection layer includes praseodymium used to absorb photo-generated electrons from at least one of the channel layer and the first protection layer which is under light irradiation and reduce a photo-generated current caused by the light irradiation.

Abstract: Provided are a driving backplane, a method for manufacturing the same and a display device. The driving backplane includes a substrate, a first gate disposed on a side of the substrate, an active layer disposed on a side of the first gate away from the substrate, and a second gate disposed on a side of the active layer away from the substrate. An orthographic projection of the second gate on the substrate is located in an orthographic projection of the first gate on the substrate, and in a direction parallel to the substrate, an edge of an orthographic projection of the first gate on the substrate extends beyond an edge of the orthographic projection of the second gate on the substrate.

Abstract: A metal oxide thin film transistor is provided and includes a gate, a gate insulating layer, an active layer and a source-drain metal layer stacked on a side of a backplane, the active layer and the gate are provided on both sides of the gate insulating layer, the source-drain metal layer is provided on a side of the active layer away from the backplane, the active layer includes: a first metal oxide semiconductor layer provided on a side of the gate insulating layer away from the gate; a second metal oxide semiconductor layer provided on a surface of the first metal oxide semiconductor layer away from the gate.

Abstract: The disclosure provides a thin-film transistor, a manufacturing method thereof, an array substrate and a display panel, and belongs to the technical field of thin-film transistor devices. The thin-film transistor includes a base substrate, an active layer on the base substrate including a plurality of semiconductor nanowires, and a plurality of guiding projections on the base substrate which extend along a first direction and are arranged at intervals and each of which includes two side walls extending along the first direction, and the semiconductor nanowire extends along a side wall of the guiding projection. In the thin-film transistor, since the semiconductor nanowires are used as the active layer, mobility and concentration of carriers in the thin-film transistor can be effectively increased and therefore performance of the thin-film transistor can be improved. A length of the semiconductor nanowire is not limited, and a size of the thin-film transistor is not limited.

Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and an electronic device arc provided. The thin film transistor includes an active layer including multiple oxide layers which includes a channel layer, a transition layer and a first barrier layer, the channel layer is an layer with a highest carrier mobility, the channel layer is a crystalline or amorphous oxide layer, the transition layer is in direct contact with the channel layer, the first barrier layer is an outermost oxide layer, the first barrier layer and the transition layer are both crystalline oxide layers; a crystallization degree of the first barrier layer and a crystallization degree of the transition layer are greater than a crystallization degree of the channel layer, and a band gap of the first barrier layer and a band gap of the transition layer are larger than a band gap of the channel layer.

Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.

Abstract: The present disclosure relates to a micro-channel device. The micro-channel device may include a micro-channel structure and a semiconductor junction. The micro-channel structure may include a base layer, a plurality of rails distributed on the base layer at intervals, and a cover layer comprising a plurality of columns. The cover layer and the base layer are configured to form a plurality of micro-channels. The semiconductor junction may include a P-type semiconductor layer, an intrinsic semiconductor layer and a N-type semiconductor layer stacked in a first direction.