Patents by Inventor Ce Ning

Ce Ning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260323997
    Abstract: Embodiments of the present disclosure provide a thin film transistor, a display substrate, and a display device. The thin film transistor includes: a base substrate; a first insulation layer on a side of the base substrate, the first insulation layer having a first concave portion; a first active layer on a side of the first insulation layer facing away from the base substrate, the first active layer including: a first portion, and a second portion on a side of the first portion, the second portion being in the first concave portion; a first metal layer on a same side of the base substrate as the first active layer, the first metal layer including: a first metal pattern, an orthographic projection of the first portion on the base substrate has an overlapping region with an orthographic projection of the first metal pattern on the base substrate.
    Type: Application
    Filed: November 28, 2023
    Publication date: October 15, 2026
    Inventors: Tianmin ZHOU, Jinchao ZHANG, Shunhang ZHANG, Lizhong WANG, Pengxia LIANG, Ce NING, Kun YANG
  • Publication number: 20260324076
    Abstract: Embodiments of the present disclosure provide an array substrate, a display panel and a display device. The array substrate includes: a substrate; a first active layer in the display region and on a side of the substrate; gate electrode structures in the display region and on a side of the first active layer facing away from the substrate; where the gate electrode structure includes an auxiliary gate electrode; an orthographic projection of the auxiliary gate electrode on the substrate has an overlapping region with an orthographic projection of the first active layer on the substrate, and a thickness of the auxiliary gate electrode in a direction perpendicular to the substrate ranges from 20 nm to 200 nm.
    Type: Application
    Filed: December 15, 2023
    Publication date: October 15, 2026
    Inventors: Jinchao ZHANG, Tianmin ZHOU, Binbin TONG, Lizhong WANG, Ce NING, Kun YANG
  • Patent number: 12745520
    Abstract: The present disclosure provides a display substrate, a preparing method therefor, and a display apparatus, the display substrate includes: a base substrate and a driving circuit layer arranged on the base substrate, the driving circuit layer further includes at least one first via hole, the first via hole is located between the second sub-electrode and the first active layer, an orthographic projection of the first via hole is overlapped with an orthographic projection of the first sub-electrode and an orthographic projection of the first active layer on the base substrate respectively, the first via hole exposes at least a portion of the first sub-electrode and at least a portion of the first active layer respectively, the second sub-electrode is electrically connected with the exposed first sub-electrode through the first via hole, and the second sub-electrode is electrically connected with the exposed first active layer through the first via hole.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: September 22, 2026
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wei Yang, Ce Ning, Lizhong Wang, Yunping Di, Tianmin Zhou, Rui Huang
  • Publication number: 20260271518
    Abstract: A display substrate, a manufacturing method thereof, and a display apparatus are provided. The display substrate includes a sub-pixel including a pixel circuit, the pixel circuit includes a light emitting device and a driving transistor, the pixel circuit further includes a control transistor, a first electrode of which is electrically connected to a gate electrode of the driving transistor; a material of an active layer of the driving transistor is a first semiconductor material and a material of an active layer of the control transistor is a second semiconductor material, the first semiconductor material being different from the second semiconductor material; an electrode where the active layer of the control transistor is located is directly electrically connected to the gate electrode of the driving transistor and the first electrode of the control transistor.
    Type: Application
    Filed: June 24, 2024
    Publication date: September 10, 2026
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei YANG, Ce NING, Hehe HU, Guangcai YUAN
  • Publication number: 20260262288
    Abstract: A display substrate includes a base substrate, and a plurality of gate lines, a plurality of data lines, and a plurality of pixels on the base substrate. Each pixel includes a first thin film transistor, first and second display electrodes. The first thin film transistor has a gate connected to a gate line, a source connected to a data line through a first connection via, and a drain connected to the first display electrode through a second connection via. The display substrate further includes a first light-shielding layer on a side of the first thin film transistor close to the base substrate. The first light-shielding layer is made of a silicon-containing semiconductor material. An orthographic projection of the first light-shielding layer on the base substrate covers at least an orthographic projection of one of the first connection via or the second connection via on the base substrate.
    Type: Application
    Filed: April 17, 2024
    Publication date: September 3, 2026
    Inventors: Lizhong WANG, Guangcai YUAN, Ce NING, Tianmin ZHOU, Hui GUO
  • Publication number: 20260247767
    Abstract: A circuit board includes a substrate and a stress neutral layer disposed on a side of the substrate. The stress neutral layer includes one or more first metal layers and one or more second metal layers. The one or more second metal layers and the one or more first metal layers are stacked. At least one of the one or more first metal layers is made of a material for generating a tensile stress, and at least one of the one or more second metal layers is made of a material for generating a compressive stress.
    Type: Application
    Filed: April 9, 2026
    Publication date: August 20, 2026
    Inventors: Nianqi YAO, Zhongpeng TIAN, Ce NING, Zhengliang LI, Hehe HU, Jie HUANG, Jiayu HE, Feifei LI, Kun ZHAO, Yimin CHEN
  • Publication number: 20260245515
    Abstract: A display substrate and a manufacture method thereof, a display apparatus are provided. The display substrate includes a sub-pixel, the sub-pixel includes a pixel circuit, the pixel circuit includes a light-emitting device and a driving transistor, the driving transistor is configured to control a magnitude of a driving current flowing through the light-emitting device according to a data signal; the pixel circuit further includes a data transistor, the data transistor is configured to write the data signal into a first electrode of the driving transistor in response to a data driving signal; a material of an active layer of the driving transistor is a metal oxide semiconductor material, and a material of an active layer of the data transistor includes a silicon semiconductor material.
    Type: Application
    Filed: August 31, 2023
    Publication date: August 20, 2026
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei YANG, Ce NING, Wei LIU
  • Publication number: 20260244059
    Abstract: A display substrate is provided. The display substrate includes a first substrate, a first insulating layer a first via hole, a semiconductor layer and a connecting electrode. The first via hole at least penetrates the first insulating layer and expos s a portion of a first signal line. The semiconductor laver includes a first portion, a second portion and a channel structure located between the first portion and the second portion. An orthogonal projection of the first portion on the first substrate partially overlaps with an orthogonal projection of the first signal line on the first substrate, and an orthogonal projection of the channel structure on the first substrate is located within an orthogonal projection of a first pattern on the first substrate. At least a portion of the connecting electrode is located in the first via hole and connected to the first portion and the first signal line.
    Type: Application
    Filed: May 30, 2024
    Publication date: August 20, 2026
    Inventors: Hehe Hu, Weili Zhao, Peirou Li, Nianqi Yao, Kun Zhao, Ce Ning, Zheng Fang, Zhenyu Zhang, Minghua Xuan, Zhengliang Li, Hui Guo, Guangcai Yuan, Xue Dong
  • Patent number: 12713698
    Abstract: The present invention provides a pixel unit structure, in which a source electrode is connected to a data line in a thin film transistor; the gate electrode is connected to the gate line; the drain electrode is disposed on a side of the gate insulating layer away from the substrate; the metal oxide semiconductor layer is disposed on a side of the gate insulating layer away from the substrate, and includes a semiconductor portion and a first conductive portion and a second conductive portion respectively located on both sides of the semiconductor portion; a terminal of the first conductive portion adjacent to the drain electrode is connected to the drain electrode or serves as at least a portion of the drain electrode; and the second conductive portion is connected to the source electrode through a first via formed correspondingly on the gate insulating layer and the interlayer dielectric layer.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: August 18, 2026
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Binbin Tong, Ce Ning, Lizhong Wang, Rui Huang, Wei Yang, Meng Zhao, Tianmin Zhou, Jinchao Zhang, Hui Guo
  • Publication number: 20260237335
    Abstract: A driving circuit and a display device are provided. The driving circuit includes a pull-up node noise reduction circuit, an input circuit, a first output noise reduction circuit and a pull-down node noise reduction circuit; at least one transistor included in the driving circuit is a floating processing transistor including a floating electrode, a gate electrode, a first electrode and a second electrode; the floating electrode is arranged on the same layer with at least one of the first electrodes and the second electrode of the floating processing transistor; the floating electrode is arranged between the first electrode and the second electrode of the floating processing transistor, and the floating electrode has no electric signal input; a shortest distance between the first electrode of the floating processing transistor and the second electrode of the floating processing transistor is greater than an initial distance.
    Type: Application
    Filed: April 2, 2026
    Publication date: August 13, 2026
    Inventors: Hehe HU, Hui GUO, Jiayu HE, Ce NING, Zhengliang LI, Kun ZHAO, Nianqi YAO, Jie HUANG, Feifei LI, Fengjuan LIU
  • Publication number: 20260231528
    Abstract: An array substrate has a display region and a peripheral region and includes a base substrate, a first signal line, a first transistor and a second transistor. The first signal line is disposed on the base substrate and at least partially located in the display region. The first transistor is located in the display region and disposed on a side of the first signal line away from the base substrate. The first transistor includes a first semiconductor pattern and a first gate disposed on a side of the first semiconductor pattern away from the base substrate. The second transistor is located in the peripheral region. The second transistor includes a second semiconductor pattern and a second gate disposed on a side of the second semiconductor pattern away from the base substrate; and the first gate and the second gate are arranged in a same layer.
    Type: Application
    Filed: July 31, 2024
    Publication date: August 6, 2026
    Applicants: Beijing BOE Technology Development Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lizhong WANG, Guangcai YUAN, Ce NING, Hui GUO
  • Patent number: 12696490
    Abstract: A semiconductor substrate manufacturing method and a semiconductor substrate. The manufacturing method includes: forming a first semiconductor layer on the base substrate at a first temperature with a first oxide semiconductor material; forming the second semiconductor layer directly on the first semiconductor layer with a second oxide semiconductor material; and performing a patterning process such that the first semiconductor layer and the second semiconductor layer are respectively patterned into a seed layer and a first channel layer. Both the first oxide semiconductor material and the second oxide semiconductor material are capable of forming crystalline phases at a second temperature, the second temperature is less than or equal to 40° C., and the first temperature is greater than or equal to 100° C.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: July 28, 2026
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Jie Huang, Ce Ning, Zhengliang Li, Hehe Hu, Jiayu He, Nianqi Yao, Kun Zhao, Feng Qu, Xiaochun Xu
  • Patent number: 12690267
    Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate and a display panel. The display substrate includes: a first semiconductor layer on a base substrate, where an active layer of the first thin film transistor is in the first semiconductor layer, and the active layer of the first thin film transistor at least comprises a channel region and a drain contact region; an interlayer insulation layer on a side of the first semiconductor layer away from the base substrate; and a first conductive layer on a side of the interlayer insulation layer away from the first semiconductor layer, wherein the pixel electrode is located in the first conductive layer, and the pixel electrode in the pixel unit is directly and electrically connected to the drain contact region of the active layer of the first thin film transistor through a through hole.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: July 21, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lizhong Wang, Ce Ning, Tianmin Zhou, Jinchao Zhang, Liping Lei
  • Publication number: 20260186357
    Abstract: Provided are a display substrate, display panel and display apparatus. The display substrate includes: a base substrate; a plurality of sub-pixels on a side of the base substrate, where each of the plurality of sub-pixels includes a sub-pixel opening region; an inorganic color-resist layer, on the same side as the plurality of sub-pixels, including a plurality of color-resist units, where an orthographic projection of the color-resist unit on the base substrate covers an orthographic projection of the sub-pixel opening region, and a light emitting color of the color-resist unit is same as a color of its corresponding sub-pixel; the color-resist unit includes at least two inorganic sub-layers stacked alternately, and different inorganic sub-layers have different refractive indexes.
    Type: Application
    Filed: April 20, 2023
    Publication date: July 2, 2026
    Inventors: Lizhong WANG, Ce NING, Wei YANG
  • Publication number: 20260190492
    Abstract: A display substrate and a display device. The display substrate includes a base substrate, and at least three functional layers, at least two first adaptation layers and a target connection member arranged on the base substrate. At least two functional layers of the at least three functional layers are laminated one on another in a direction away from the base substrate, and the at least three functional layers include a target functional layer. The at least two first adaptation layers include a top adaptation layer and at least one bottom adaptation layer, the top adaptation layer is arranged at a side of the target functional layer away from the base substrate, and at least a part of the bottom adaptation layer is arranged between the target functional layer and the base substrate.
    Type: Application
    Filed: October 17, 2023
    Publication date: July 2, 2026
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wei YANG, Guangcai YUAN, Ce NING, Dongni LIU, Lizhong WANG, Binbin TONG, Zhen ZHANG
  • Publication number: 20260186359
    Abstract: The present disclosure discloses an array substrate and a display device. The array substrate includes a base substrate (13) and a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer which are sequentially stacked on a side of the base substrate (13). The fourth conductive layer includes a common electrode (21), a material of the fourth conductive layer is a transparent conductive oxide material, a material of the third conductive layer is a metal conductive material, and at least a portion of a surface of the third conductive layer away from the base substrate (13) is in contact with at least a portion of a surface of the fourth conductive layer close to the base substrate (13).
    Type: Application
    Filed: September 28, 2023
    Publication date: July 2, 2026
    Inventors: Hehe HU, Nianqi YAO, Kun ZHAO, Hui GUO, Ce NING, Zhengliang LI, Jiayu HE, Fengjuan LIU, Wei LIU, Feifei LI, Guangcai YUAN
  • Publication number: 20260190396
    Abstract: A thin film transistor includes a first electrode, a second electrode, an active layer, and a gate electrode disposed on a base substrate. The first electrode is located on a side of the active layer close to the base substrate, and a first insulation layer is disposed between the first electrode and the active layer, and is provided with a first via. The active layer is electrically connected to the first electrode through the first via. A second insulation layer is disposed between the gate electrode and the active layer. An orthographic projection of the gate electrode is overlapped, at least partially, with an orthographic projection of the first via, on the base substrate, a surface of a side of the gate electrode close to the base substrate is a first surface, a surface of a side of the gate electrode away from the base substrate is a second surface.
    Type: Application
    Filed: April 13, 2023
    Publication date: July 2, 2026
    Inventors: Hehe HU, Ce NING, Lizhong WANG, Dongfang WANG, Rui HUANG, Pengfei GU, Chaolu WANG, Fengjuan LIU, Zhengliang LI, Jiayu HE, Jie HUANG, Nianqi YAO, Kun ZHAO, Feifei LI
  • Patent number: 12672314
    Abstract: The present disclosure provides a metal oxide thin film transistor, a semiconductor device and a display device, belongs to the field of display technology, and can solve a problem that current metal oxide thin film transistors have a poor stability. The metal oxide thin film transistor of the present disclosure includes a substrate and a first metal oxide semiconductor layer on the substrate; a material of the first metal oxide semiconductor layer includes a metal oxide doped with a first metal element, an electronegativity difference value between the first metal element and an oxygen element is greater than or equal to an electronegativity difference value between a metal element in the metal oxide and the oxygen element.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 30, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiayu He, Fangqing Wen, Ce Ning, Hehe Hu, Nianqi Yao, Kun Zhao, Zhengliang Li, Jie Huang, Feifei Li, Yan Qu, Liping Lei
  • Publication number: 20260182028
    Abstract: An array substrate and a display device are provided. The array substrate includes a base substrate (12), and at least one transistor (11), at least one data line (DL) and at least one first electrode (10) disposed on the base substrate (12). The at least one transistor (11) includes an active layer (17), the active layer (17) includes two or more sub-active layers arranged in a stack, the two or more sub-active layers includes a first sub-active layer, the first sub-active layer is closer to the base substrate (12) than other sub-active layers. The first sub-active layer includes a first channel region (170-1) and a first sub-region (171-1) and a third sub-region (172-3) located on two opposite sides of the first channel region (170-1). The data line (DL) is electrically connected with the first sub-region (171-1), and the first electrode (10) is electrically connected with the third sub-region (172-3).
    Type: Application
    Filed: September 22, 2023
    Publication date: June 25, 2026
    Inventors: Nianqi YAO, Hehe HU, Kun ZHAO, Guangcai YUAN, Ce NING, Zhengliang LI, Jie HUANG, Hui GUO
  • Patent number: 12666653
    Abstract: There is provided a metal oxide thin film transistor, including: a substrate and a metal oxide semiconductor layer on the substrate; a gate and a gate insulating layer between the substrate and the metal oxide semiconductor layer; the gate insulating layer includes a first silicon nitride layer, a second silicon nitride layer and a first silicon oxide layer which are stacked; the first silicon oxide layer is in contact with the metal oxide semiconductor layer, and two surfaces of the second silicon nitride layer are in contact with the first silicon nitride layer and the first silicon oxide layer, respectively; a content of hydrogen atoms of at least a partial region of the second silicon nitride layer is less than 30% of a content of hydrogen atoms of at least a partial region of the first silicon nitride layer. An array substrate and a display device are further provided.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 23, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jiayu He, Yan Qu, Liping Lei, Ce Ning, Zhengliang Li, Hehe Hu, Jie Huang, Nianqi Yao, Kun Zhao, Feifei Li