Patents by Inventor Cem Basceri

Cem Basceri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149333
    Abstract: An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Applicant: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Publication number: 20250149332
    Abstract: A substrate includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the first adhesion layer, a second adhesion layer coupled to the barrier layer, and a conductive layer coupled to the second adhesion layer. The substrate also includes a bonding layer coupled to the support structure, a substantially single crystal silicon layer coupled to the bonding layer, and an epitaxial semiconductor layer coupled to the substantially single crystal silicon layer.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Publication number: 20250140774
    Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 1, 2025
    Inventors: Cem Basceri, Casey Kurth, Kevin Tetz
  • Publication number: 20250132152
    Abstract: A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, forming a first adhesion layer coupled to the polycrystalline ceramic core, forming a conductive layer coupled to the first adhesion layer, forming a second adhesion layer coupled to the conductive layer, and forming a barrier layer coupled to the second adhesion layer. The method also includes forming a bonding layer coupled to the support structure, joining a substantially single crystal layer to the bonding layer, wherein the substantially single crystal layer comprises at least one of silicon carbide, sapphire, or gallium nitride, and forming one or more epitaxial III-V layers coupled to the substantially single crystal layer.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 24, 2025
    Applicant: QROMIS,INC.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 12224173
    Abstract: An engineered substrate structure includes a ceramic substrate having a front surface characterized by a plurality of peaks. The ceramic substrate includes a polycrystalline material. The engineered substrate structure also includes a planarization layer comprising a planarization layer material and coupled to the front surface of the ceramic substrate. The planarization layer defines fill regions filled with the planarization layer material between adjacent peaks of the plurality of peaks on the front surface of the ceramic substrate. The engineered substrate structure further includes a barrier shell encapsulating the ceramic substrate and the planarization layer, wherein the barrier shell has a front side and a back side, a bonding layer coupled to the front side of the barrier shell, a single crystal layer coupled to the bonding layer, and a conductive layer coupled to the back side of the barrier shell.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: February 11, 2025
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 12217957
    Abstract: A substrate includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the first adhesion layer, a second adhesion layer coupled to the barrier layer, and a conductive layer coupled to the second adhesion layer. The substrate also includes a bonding layer coupled to the support structure, a substantially single crystal silicon layer coupled to the bonding layer, and an epitaxial semiconductor layer coupled to the substantially single crystal silicon layer.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: February 4, 2025
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Publication number: 20250022937
    Abstract: A method of fabricating a semiconductor device includes providing an engineered substrate. The method further includes forming an epitaxial gallium nitride (GaN) layer coupled to the engineered substrate, forming a plurality of trenches in the epitaxial GaN layer, and forming a plurality of gates in the trenches. The method further includes forming a plurality of sources coupled to the epitaxial GaN layer, forming an interconnect structure on the gates and sources, forming a metal bonding layer on the interconnect structure, bonding a conductive carrier to the metal bonding layer, removing the engineered substrate, forming a drain layer on the back surface of the epitaxial GaN layer, etching at least one portion of the epitaxial GaN layer and the interconnect structure to form at least one gate pad recess and expose the embedded metal track; and forming at least one gate electrode in the gate pad recess.
    Type: Application
    Filed: July 10, 2024
    Publication date: January 16, 2025
    Applicant: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri
  • Patent number: 12191286
    Abstract: Some embodiments of the disclosure provide for a lighting system including a substrate. The lighting system includes several blue light emitting diodes (LEDs) supported by the substrate. The lighting system includes at least one red LED supported by the substrate. The lighting system includes a light conversion material covering the blue LEDs and the at least one red LED.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: January 7, 2025
    Assignee: BRIDGELUX, INC.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Peng Chen
  • Patent number: 12191298
    Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: January 7, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Casey Kurth, Kevin Tetz
  • Patent number: 12009205
    Abstract: A substrate including a support structure. The support structure including a polycrystalline ceramic core and a first adhesion layer coupled to the polycrystalline ceramic core. The support structure further including a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The substrate further including a bonding layer coupled to the support structure. The substrate further including a substantially single crystal layer comprising at least one of silicon carbide, sapphire, or gallium nitride coupled to the bonding layer. The substrate further including an epitaxial semiconductor layer coupled to the substantially single crystal layer.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: June 11, 2024
    Assignee: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Publication number: 20240097084
    Abstract: Various aspects of a light emitting apparatus includes a substrate. Various aspects of the light emitting apparatus include a light emitting die arranged on the substrate. The light emitting die includes one or more side walls. Various aspects of the light emitting apparatus include a reflective die attach material extending along the one or more side walls of the light emitting die.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Inventors: Vladimir ODNOBLYUDOV, Scott WEST, Cem BASCERI, Zhengqing GAN
  • Publication number: 20240063352
    Abstract: Various aspects of a light emitting apparatus includes a substrate. Various aspects of the light emitting apparatus include a light emitting die arranged on the substrate. The light emitting die includes one or more side walls. Various aspects of the light emitting apparatus include a reflective die attach material extending along the one or more side walls of the light emitting die.
    Type: Application
    Filed: August 21, 2023
    Publication date: February 22, 2024
    Inventors: Vladimir ODNOBLYUDOV, Scott West, Cem Basceri, Zhengqing Gan
  • Patent number: 11881404
    Abstract: A method of forming a doped gallium nitride (GaN) layer includes providing a substrate structure, including a gallium nitride layer, forming a dopant source layer over the gallium nitride layer, and depositing a capping structure over the dopant source layer. The method also includes annealing the substrate structure to diffuse dopants into the gallium nitride layer, removing the capping structure and the dopant source layer, and activating the diffused dopants.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: January 23, 2024
    Assignee: QROMIS, INC.
    Inventors: Ozgur Aktas, Vladimir Odnoblyudov, Cem Basceri
  • Publication number: 20230352470
    Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.
    Type: Application
    Filed: June 23, 2023
    Publication date: November 2, 2023
    Inventors: Cem Basceri, Casey Kurth, Kevin Tetz
  • Publication number: 20230335538
    Abstract: Some embodiments of the disclosure provide for a lighting system including a substrate. The lighting system includes several blue light emitting diodes (LEDs) supported by the substrate. The lighting system includes at least one red LED supported by the substrate. The lighting system includes a light conversion material covering the blue LEDs and the at least one red LED.
    Type: Application
    Filed: February 24, 2023
    Publication date: October 19, 2023
    Inventors: Vladimir ODNOBLYUDOV, Cem BASCERI, Peng CHEN
  • Patent number: 11764341
    Abstract: Various aspects of a light emitting apparatus includes a substrate. Various aspects of the light emitting apparatus include a light emitting die arranged on the substrate. The light emitting die includes one or more side walls. Various aspects of the light emitting apparatus include a reflective die attach material extending along the one or more side walls of the light emitting die.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: September 19, 2023
    Assignee: BRIDGELUX, INC.
    Inventors: Vladimir Odnoblyudov, Scott West, Cem Basceri, Zhengqing Gan
  • Patent number: 11735460
    Abstract: An integrated circuit device includes an engineered substrate including a substantially single crystal layer and a buffer layer coupled to the substantially single crystal layer. The integrated circuit device also includes a plurality of semiconductor devices coupled to the buffer layer. The plurality of semiconductor devices can include a first power device coupled to a first portion of the buffer layer and a second power device coupled to a second portion of the buffer layer. The first power device includes a first channel region comprising a first end, a second end, and a first central portion disposed between the first end and the second end. The second power device includes a second channel region comprising a third end, a fourth end, and a second central portion disposed between the third end and the fourth end.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: August 22, 2023
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Dilip Risbud, Ozgur Aktas, Cem Basceri
  • Patent number: 11710732
    Abstract: Solid state lights (SSLs) including a back-to-back solid state emitters (SSEs) and associated methods are disclosed herein. In various embodiments, an SSL can include a carrier substrate having a first surface and a second surface different from the first surface. First and second through substrate interconnects (TSIs) can extend from the first surface of the carrier substrate to the second surface. The SSL can further include a first and a second SSE, each having a front side and a back side opposite the front side. The back side of the first SSE faces the first surface of the carrier substrate and the first SSE is electrically coupled to the first and second TSIs. The back side of the second SSE faces the second surface of the carrier substrate and the second SSE is electrically coupled to the first and second TSIs.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: July 25, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Cem Basceri, Casey Kurth, Kevin Tetz
  • Publication number: 20230197788
    Abstract: Methods of manufacturing device assemblies, as well as associated semiconductor assemblies, devices, systems are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a semiconductor device assembly that includes a handle substrate, a semiconductor structure having a first side and a second side opposite the first side, and an intermediary material between the semiconductor structure and the handle substrate. The method also includes removing material from the semiconductor structure to form an opening extending from the first side of the semiconductor structure to at least the intermediary material at the second side of the semiconductor structure. The method further includes removing at least a portion of the intermediary material through the opening in the semiconductor structure to undercut the second side of the semiconductor structure.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 22, 2023
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Cem Basceri
  • Publication number: 20230178367
    Abstract: A substrate includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the first adhesion layer, a second adhesion layer coupled to the barrier layer, and a conductive layer coupled to the second adhesion layer. The substrate also includes a bonding layer coupled to the support structure, a substantially single crystal silicon layer coupled to the bonding layer, and an epitaxial semiconductor layer coupled to the substantially single crystal silicon layer.
    Type: Application
    Filed: January 31, 2023
    Publication date: June 8, 2023
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens