Patents by Inventor Cengiz Palanduz

Cengiz Palanduz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090233047
    Abstract: A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and a substrate having a functionally gradient coefficient of thermal expansion, connecting the silicon die and the organic substrate is also described. The coefficient of thermal expansion at the upper surface of the substrate matches the coefficient of thermal expansion of the die, the coefficient of thermal expansion at the lower surface of the substrate matches the coefficient of thermal expansion of the package substrate, and the substrate has one or more coefficients of thermal expansion between the coefficients of thermal expansion of the upper and lower surfaces.
    Type: Application
    Filed: May 28, 2009
    Publication date: September 17, 2009
    Inventor: A. Cengiz Palanduz
  • Patent number: 7586756
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: September 8, 2009
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Larry E. Mosley
  • Patent number: 7550321
    Abstract: A substrate and a method of making a substrate having a functionally gradient coefficient of thermal expansion are described herein. A system having a silicon die, an organic package substrate, and a substrate having a functionally gradient coefficient of thermal expansion, connecting the silicon die and the organic substrate is also described. The coefficient of thermal expansion at the upper surface of the substrate matches the coefficient of thermal expansion of the die, the coefficient of thermal expansion at the lower surface of the substrate matches the coefficient of thermal expansion of the package substrate, and the substrate has one or more coefficients of thermal expansion between the coefficients of thermal expansion of the upper and lower surfaces.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: June 23, 2009
    Assignee: Intel Corporation
    Inventor: A. Cengiz Palanduz
  • Patent number: 7547957
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: June 16, 2009
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Patent number: 7504271
    Abstract: This invention relates to the manufacture of a substrate, such as a package substrate or an interposer substrate, of an integrated circuit package. A base structure is formed from a green material having a plurality of via openings therein. The green material is then sintered so that the green material becomes a sintered ceramic material and the base structure becomes a sintered ceramic base structure having the via openings. A conductive via is formed in each via opening of the sintered ceramic base structure. A capacitor structure is formed on the sintered ceramic base structure. The power and ground planes of the capacitor structure are connected to the vias. As such, a capacitor structure can be formed and connected to the vias without the need to drill vias openings in brittle substrates such as silicon substrates.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: March 17, 2009
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Patent number: 7453144
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: November 18, 2008
    Assignee: Intel Corporation
    Inventor: Cengiz A. Palanduz
  • Publication number: 20080263842
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Application
    Filed: July 7, 2008
    Publication date: October 30, 2008
    Inventor: CENGIZ A. PALANDUZ
  • Publication number: 20080174938
    Abstract: A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.
    Type: Application
    Filed: March 26, 2008
    Publication date: July 24, 2008
    Inventors: John S. Guzek, Cengiz A. Palanduz, Victor Prokofiev
  • Publication number: 20080157274
    Abstract: In some embodiments, an individual sub-assembly containing a ceramic interposer, silicon voltage regulator, and array capacitor is presented. In this regard, an apparatus is introduced having a table-shaped ceramic interposer containing conductive traces, a silicon voltage regulator coupled with contacts on a first surface of the ceramic interposer, and an array capacitor coupled with contacts on a second surface of the ceramic interposer. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Sriram Dattaguru, Larry Binder, Cengiz A. Palanduz, Chris Jones, Dave Bach, Kaladhar Radhakrishnan, Timothe Litt
  • Publication number: 20080157343
    Abstract: In some embodiments, a ceramic interposer with silicon voltage regulator and array capacitor combination for integrated circuit packages is presented. In this regard, an apparatus is introduced having a bowl-shaped ceramic interposer containing conductive traces, one or more silicon voltage regulator(s) coupled with contacts on a first surface of the ceramic interposer, and one or more array capacitor(s) coupled with contacts on a second surface of the ceramic interposer. Other embodiments are also disclosed and claimed.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Sriram Dattaguru, Larry Binder, Cengiz A. Palanduz, Chris Jones, Dave Bach, Kaladhar Radhakrishnan, Timothe Litt
  • Publication number: 20080142961
    Abstract: A ceramic package substrate has a recess. This allows a device in that recess to be close to a die attached to the substrate's top side, for better performance. The device may be an array capacitor, an in-silicon voltage regulator, or another device or devices.
    Type: Application
    Filed: December 14, 2006
    Publication date: June 19, 2008
    Inventors: Christopher C. Jones, David Bach, Timothe Litt, Larry Binder, Kaladhar Radhakrishnan, Cengiz A. Palanduz
  • Patent number: 7375412
    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 20, 2008
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Dustin P. Wood
  • Patent number: 7372126
    Abstract: A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventors: John S. Guzek, Cengiz A. Palanduz, Victor Prokofiev
  • Publication number: 20080106844
    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
    Type: Application
    Filed: January 10, 2008
    Publication date: May 8, 2008
    Inventors: Cengiz Palanduz, Dustin Wood
  • Publication number: 20080106848
    Abstract: A method including depositing a suspension of a colloid comprising an amount of nano-particles of a ceramic material on a substrate; and thermally treating the suspension to form a thin film. A method including depositing a plurality of nano-particles of a ceramic material to pre-determined locations across a surface of a substrate; and thermally treating the plurality of nano-particles to form a thin film. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board through a substrate, the substrate comprising at least one capacitor structure formed on a surface, the capacitor structure comprising a first electrode, a second electrode, and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material comprises columnar grains.
    Type: Application
    Filed: January 10, 2008
    Publication date: May 8, 2008
    Inventors: Cengiz Palanduz, Dustin Wood
  • Publication number: 20080054403
    Abstract: An apparatus including a first electrode; a second electrode; a first and second ceramic material disposed between the first electrode and the second electrode, the second ceramic material having a greater electrical conductivity than the first ceramic material. A method including forming a first ceramic material film and a different second ceramic material film on a first electrode; and forming a second electrode on the second ceramic material film to form a capacitor structure having the first ceramic material film and the second ceramic material film disposed between the first electrode and the second electrode, wherein the first ceramic material has a conductivity selected to dampen undesired oscillations in electrical device operation to which the capacitor structure may be exposed. An apparatus including a first electrode; a second electrode; and a composite dielectric including a plurality of dielectric films including a different Curie temperature.
    Type: Application
    Filed: October 30, 2007
    Publication date: March 6, 2008
    Inventor: Cengiz Palanduz
  • Publication number: 20070271752
    Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.
    Type: Application
    Filed: August 10, 2007
    Publication date: November 29, 2007
    Inventors: Cengiz Palanduz, Yongki Min
  • Patent number: 7290315
    Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.
    Type: Grant
    Filed: October 21, 2004
    Date of Patent: November 6, 2007
    Assignee: Intel Corporation
    Inventors: Cengiz A. Palanduz, Yongki Min
  • Publication number: 20070228517
    Abstract: A process of forming a thin-film capacitor that includes sol-gel patterning of a dielectric thin film on a first electrode, lift-off removal of unwanted dielectric thin film, and mating the dielectric thin film with a second electrode. The thin-film capacitor exhibits a substantially uniform heat-altered morphology along a line defined by a characteristic dimension thereof. A computing system is also disclosed that includes the thin-film capacitor.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 4, 2007
    Inventors: Huankiat Seh, Yongki Min, Cengiz Palanduz
  • Publication number: 20070184609
    Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.
    Type: Application
    Filed: April 10, 2007
    Publication date: August 9, 2007
    Inventors: Cengiz Palanduz, Larry Mosley