Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a substrate core by attaching a first dielectric layer to a second conductive layer of a thin film capacitor, and attaching a second dielectric layer to a first conductive layer of the thin film capacitor.

Abstract: A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material; and sintering the ceramic material. A method including forming a ceramic material directly on a sheet of a first conductive material; forming a second conductive material on the ceramic material so that the ceramic material is disposed between the first conductive material and the second conductive material; thermal processing at a temperature sufficient to sinter the ceramic material and form a film of the second conductive material; and coating an exposed surface of at least one of the first conduct material and the second conductive material with a different conductive material. An apparatus including first and second electrodes; and a ceramic material between the first electrode and the second electrode, wherein the ceramic material is sintered directly on one of the first and second electrode.

Abstract: A method including forming a first metal material layer on a dielectric material; transitioning a portion of the first metal material adjacent to the dielectric to a first oxidation state and a portion of the metal material peripheral to the dielectric material to a second different oxidation state; and forming a second metal material layer on the first metal material. An apparatus including an interposer substrate including an adhesion layer including a metal material having respective portions including at least two different oxidation states; and a capacitor on the adhesion layer. A system including a computing device including a microprocessor, the microprocessor coupled to a printed circuit board through an interposer including an interposer substrate, a capacitor, and an adhesion layer between the interposer substrate and the capacitor, the adhesion layer including a metal material having respective portions including at least two different oxidation states.

Abstract: An apparatus, and a method for forming, a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit (IC) such as a microprocessor. The capacitor supplying and moderating power to the microprocessor needs to be closely coupled in order to respond to instantaneous power demands that may be found in high clock rate microprocessors, and the space inside a microprocessor package is very restricted.

Abstract: An electronic device includes a material having a first dielectric constant (K) value, and a material having a second dielectric constant (K) value. The first dielectric constant (K) value is lower than the second dielectric constant (K) value. The electronic device also includes input/output connection conductors for transmitting signals to and from a die. The input/output connection conductors are routed through the material of the interposer having the first dielectric constant. The electronic device also includes power connection conductors for delivering power to the die, and ground connection conductors. The power and ground connection conductors are routed through the material having the second dielectric constant.

Abstract: A method of fabricating a thin dielectric film, a thin dielectric film formed according to the method, and a system including the thin dielectric film.

Abstract: A method of fabricating a thin dielectric film, a thin dielectric film formed according to the method, and a system including the thin dielectric film. The method includes: depositing a ceramic precursor material on a metal sheet, the ceramic precursor material including a mixture comprising ceramic particles and an organic carrier medium; heat treating the ceramic precursor material such that the organic carrier medium is substantially burnt off, and further such that a dielectric layer is formed including ceramic grains formed from the ceramic particles, and having grain sizes between about 100 nm and about 500 nm; depositing a CSD precursor material onto the dielectric layer; and heat treating the CSD precursor material such that organics in the CSD precursor material are substantially burnt off, and further such that a CSD medium is formed from the CSD precursor material including CSD grains substantially filling the voids between the ceramic grains.

Abstract: An apparatus includes a substrate of ceramic material, and a conductive path associated with the substrate formed by a laser directed at the ceramic material.

Abstract: A method including forming a capacitor structure including an electrode material and a ceramic material on the electrode material; and sintering the ceramic material under a condition where a point defect state of the ceramic material defines the ceramic material as insulating without oxidation of the electrode material. A method including depositing a ceramic material on an electrically conductive foil; and sintering the ceramic material in a reducing atmosphere at a temperature that minimizes the mobility of point defects to transition to a level corresponding to a greater conductivity of the ceramic material. An apparatus including a first electrode; a second electrode; and a ceramic material disposed between the first electrode and the second electrode, wherein the ceramic material includes a thickness less than one micron and a leakage current corresponding to a thermodynamic state wherein a concentration of mobile point defects have been optimized.

Abstract: A chip package is made with the ring or dish interposer and an embedded array capacitor. A computing system is also disclosed that includes the ring or dish interposer and the embedded array capacitor.

Abstract: An integrated circuit (IC) package includes a chip carrier and a chip mounted to the chip carrier. The chip carrier has a centrally located power delivery region and a peripherally located input-output (I/O) delivery region disposed in partially surrounding relationship to the power delivery region. Power and ground paths are disposed in the power delivery region and I/O signal paths are disposed in the I/O delivery region.

Abstract: This invention relates to the manufacture of a substrate, such as a package substrate or an interposer substrate, of an integrated circuit package. A base structure is formed from a green material having a plurality of via openings therein. The green material is then sintered so that the green material becomes a sintered ceramic material and the base structure becomes a sintered ceramic base structure having the via openings. A conductive via is formed in each via opening of the sintered ceramic base structure. A capacitor structure is formed on the sintered ceramic base structure. The power and ground planes of the capacitor structure are connected to the vias. As such, a capacitor structure can be formed and connected to the vias without the need to drill vias openings in brittle substrates such as silicon substrates.

Abstract: In one embodiment, a structure and method including an anodic metal oxide substrate used to form a capacitor are described herein.

Abstract: A base structure is formed from a green material having first and second opposing sides and having a plurality of via openings therein. The green material is then sintered so that the green material becomes a sintered ceramic material and the base structure becomes a sintered ceramic base structure having the via openings. A conductive via is formed in each via opening of the sintered ceramic base structure. First and second capacitor structures are formed on the sintered ceramic base structure, each on a respective side of the sintered ceramic base structure. The power and ground planes of the capacitor structure are connected to the vias. As such, a capacitor structure can be formed and connected to the vias without the need to drill via openings in brittle substrates such as silicon substrates. Capacitor structures on opposing sides provide more capacitance without manufacturing complexities associated with the manufacture of one capacitor structure having a large number of power and ground planes.

Abstract: An improved silicon building block is disclosed. In an embodiment, the silicon building block has at least two vias through it. The silicon building block is doped and the vias filled with a first material, and, optionally, selected ones of the vias filled instead with a second material. In an alternative embodiment, regions of the silicon building block have metal deposited on them.

Abstract: A planar thin film multi-layer capacitor having a high dielectric constant with a plurality of conductive through vias and a plurality of pairs of conductive through vias having a low dielectric constant and operating in a transverse electromagnetic wave mode for high frequency signals on the pairs of vias. Vias coupled to the capacitor are arranged to propagate alternate polarity. The interposer is adapted for coupling directly to a die.

Abstract: A method for making, and a dielectric material is provided. A capacitor is provided that includes a lossy dielectric layer that is also not leaky. The lossy behavior dampens unwanted oscillations in power supplies or other electrical systems. A capacitor is further provided is tunable for an amount of lossy behavior over a broad range. A core dopant concentration can be varied, and a doped core grain fraction can be varied to control the extent of a desired lossy property in a capacitor. Dielectric materials having grains with doped shells reduce leakiness. Additionally in selected embodiments, undoped core grains mixed with doped core grains reduce leakiness.