Patents by Inventor Chan Chung

Chan Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178848
    Abstract: The present disclosure relates to a multi-chip clock synchronization device and a method capable of reducing an operating frequency and power consumption when a plurality of chips share clocks for multi-chip clock synchronization, which may include a reference clock supply unit connected to a plurality of chips and supplying a reference clock of a first frequency to each chip and a target clock generation unit generating a target clock of a second frequency based on the reference clock of the first frequency, wherein the reference clock supply unit may generate the reference clock of the first frequency which is N times lower than the second frequency of the target clock to supply the generated reference clock to each chip, and the target clock generation unit may multiply the first frequency of the reference clock by N times when the reference clock of the first frequency is input to generate the target clock of the second frequency.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: LX SEMICON CO., LTD.
    Inventors: Jae Hwan LEE, Yoon Hoe KIM, Ji Hye KIM, Seung Chan JUNG, Hyun Soo CHUNG
  • Publication number: 20240139142
    Abstract: Provided is a method for preventing or treating a liver disease, including administering a therapeutically effective amount of pharmaceutical composition to a subject in need, and the pharmaceutical composition includes the isothiocyanate structural modified compound and a pharmaceutically acceptable carrier thereof.
    Type: Application
    Filed: September 14, 2023
    Publication date: May 2, 2024
    Applicants: TAIPEI VETERANS GENERAL HOSPITAL, NATIONAL YANG MING CHIAO TUNG UNIVERSITY, PHARMAESSENTIA CORPORATION
    Inventors: Jaw-Ching WU, Yung-Sheng CHANG, Kuo-Hsi KAO, Chan-Kou HWANG, Ko-Chung LIN
  • Publication number: 20240128713
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Inventors: Hsiu-Ju YANG, Shou-Lung CHEN, Hsin-Chan CHUNG
  • Publication number: 20240118788
    Abstract: Mechanisms are provided for allowing a user to dynamically manage rich media content in an efficient and effective manner. Tiles including media content, personalized video selections, content pack upgrades, and promotions for featured content are presented to a user. Each tile may include calls to view, purchase, discuss, rate, review, or read about associated content. Tiles may be presented as still images, logos, text, or live video. Multiple tiles may be manipulated using keyboard, mouse, touchpad, and/or touchscreen movements, motions, and gestures. In particular examples, an overlay provided on top of a tile mechanism provides a user with additional navigation and management options.
    Type: Application
    Filed: May 22, 2023
    Publication date: April 11, 2024
    Inventors: Kirsten Hunter, Christopher Chan, Vasanth Shenoy, James Collette, Do H. Chung, Allen Billings
  • Patent number: 11955507
    Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
  • Publication number: 20240096834
    Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.
    Type: Application
    Filed: March 27, 2023
    Publication date: March 21, 2024
    Inventors: Shih Hsuan HSU, Chan-Chung CHENG, Chun-Chen LIU, Cheng-Hung CHEN, Peng-Ren CHEN, Wen-Hao CHENG, Jong-l MOU
  • Publication number: 20240080320
    Abstract: A server according to an embodiment includes a processor configured to receive a friend add request for a target account from a user terminal accessed with a user account; based on one of the user account and the target account being a protected account, transmit an approval request for the friend add request to a protector account connected to the protected account; and based on receiving a reply to the approval request from the protector terminal, add the target account to a friend list of the user account.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Inventors: You Jin KIM, Jung Woo CHOI, Jenog Ryeol CHOI, Joong Seon KIM, Hong Chan YUN, Ju Ho CHUNG, Do Hyun YOUN, Hyung Min KIM, Hyun Ok CHOI, Chun Ho KIM, Soo Beom KIM, Min Jeong KIM, Chang Oh HEO, Eun Soo HEO
  • Patent number: 11901694
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Grant
    Filed: March 2, 2021
    Date of Patent: February 13, 2024
    Assignee: iReach Corporation
    Inventors: Hsiu-Ju Yang, Shou-Lung Chen, Hsin-Chan Chung
  • Patent number: 11833588
    Abstract: A die or piston of a spark plasma sintering apparatus, wherein the die or piston is made from graphite and the outer surfaces of the die or piston are coated with a silicon carbide layer with a thickness of 1 to 10 micrometres, the silicon carbide layer being further optionally coated with one or more other layer(s) made from a carbide other than silicon carbide chosen from hafnium carbide, tantalum carbide and titanium carbide, the other layer(s) each having a thickness of 1 to 10 micrometres. A spark plasma sintering (SPS) apparatus comprising the die and two of the pistons, defining a sintering, densification or assembly chamber capable of receiving a powder to be sintered, a part to be densified, or parts to be assembled. A method of sintering a powder, densifying a part, or assembling two parts by means of a method of spark plasma sintering (SPS) in an oxidising atmosphere, using the spark plasma sintering (SPS) apparatus.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: December 5, 2023
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Alexandre Allemand, Alain Largeteau, Seu U-Chan Chung, Yann Le Petitcorps, Jérôme Roger
  • Publication number: 20230155349
    Abstract: A semiconductor light emitting device includes a substrate, a first epitaxial structure and a second epitaxial structure, a connecting layer, a first electrode structure, a second electrode structure, and a third electrode structure. The first epitaxial structure and the second epitaxial structure are on the substrate side by side. The connecting layer is between the first epitaxial structure and the substrate, between the second epitaxial structure and the substrate, and between the first epitaxial structure and the second epitaxial structure. The first electrode structure is on the first epitaxial structure away from the substrate. The second electrode structure is on the second epitaxial structure away from the substrate. The third electrode structure is connected to the connecting layer.
    Type: Application
    Filed: November 8, 2022
    Publication date: May 18, 2023
    Inventors: Shou-Lung CHEN, Hsin-Chan CHUNG, Tzu-Chieh HSU, Chi-Hsun HSIEH
  • Patent number: 11642724
    Abstract: A die or piston of a spark plasma sintering apparatus, wherein the die or piston is made from graphite and the outer surfaces of the die or piston are coated with a silicon carbide layer with a thickness of 1 to 10 micrometres, the silicon carbide layer being further optionally coated with one or more other layer(s) made from a carbide other than silicon carbide chosen from hafnium carbide, tantalum carbide and titanium carbide, the other layer(s) each having a thickness of 1 to 10 micrometres. A spark plasma sintering (SPS) apparatus comprising the die and two of the pistons, defining a sintering, densification or assembly chamber capable of receiving a powder to be sintered, a part to be densified, or parts to be assembled. A method of sintering a powder, densifying a part, or assembling two parts by means of a method of spark plasma sintering (SPS) in an oxidising atmosphere, using the spark plasma sintering (SPS) apparatus.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: May 9, 2023
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Alexandre Allemand, Alain Largeteau, Seu U-Chan Chung, Yann Le Petitcorps, Jérôme Roger
  • Publication number: 20230133590
    Abstract: A die or piston of a spark plasma sintering apparatus, wherein the die or piston is made from graphite and the outer surfaces of the die or piston are coated with a silicon carbide layer with a thickness of 1 to 10 micrometres, the silicon carbide layer being further optionally coated with one or more other layer(s) made from a carbide other than silicon carbide chosen from hafnium carbide, tantalum carbide and titanium carbide, the other layer(s) each having a thickness of 1 to 10 micrometres. A spark plasma sintering (SPS) apparatus comprising the die and two of the pistons, defining a sintering, densification or assembly chamber capable of receiving a powder to be sintered, a part to be densified, or parts to be assembled. A method of sintering a powder, densifying a part, or assembling two parts by means of a method of spark plasma sintering (SPS) in an oxidising atmosphere, using the spark plasma sintering (SPS) apparatus.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 4, 2023
    Inventors: Alexandre Allemand, Alain Largeteau, Seu U-Chan Chung, Yann Le Petitcorps, Jérôme Roger
  • Publication number: 20230067254
    Abstract: A semiconductor device includes a substrate, a first type semiconductor structure, semiconductor columnar bodies between the substrate and the first type semiconductor structure, a first electrode and a second electrode. The first type semiconductor structure includes a first surface, a second surface opposite the first surface and away from the substrate, a first extension and a second extension respectively extending outward beyond the semiconductor columnar bodies. The first electrode and the second electrode are on the second surface of the first type semiconductor structure.
    Type: Application
    Filed: November 9, 2022
    Publication date: March 2, 2023
    Inventors: Hsin-Chan CHUNG, Shou-Lung CHEN
  • Publication number: 20230005900
    Abstract: A chip package structure includes a substrate having a first surface and a second surface being opposite surfaces of the substrate; a housing disposed on the first surface of the substrate and enclosing a chip region; and a chip set disposed in the chip region and electrically connected to the substrate. The chip set includes a first chip and a second chip, and an active surface of the second chip faces the active surface of the first chip.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 5, 2023
    Inventors: Hsiu-Ju YANG, Hsin-Chan CHUNG, Shou-Lung CHEN, Chi-Hsun HSIEH
  • Patent number: 11532921
    Abstract: A semiconductor device includes a substrate, an epitaxial stack disposed on the substrate, a first connection layer between the epitaxial stack and the substrate and a first electrode disposed on the first connection layer. The substrate has a first side surface and a second side surface. The epitaxial stack has a semiconductor structure with a first lateral surface adjacent to the first side surface and a second lateral surface opposing the first lateral surface and adjacent to the second side surface. The first connection layer has a first protruding portion extending beyond the first lateral surface and a second protruding portion extending beyond the second lateral surface. The first electrode is in contact with the first protruding portion and the second protruding portion.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: December 20, 2022
    Assignees: EPISTAR CORPORATION, iReach Corporation
    Inventors: Hsin-Chan Chung, Shou-Lung Chen
  • Publication number: 20220158413
    Abstract: A semiconductor laser includes a base, an epitaxial structure on the base, and a first electrode and a second electrode on the epitaxial structure. The epitaxial structure includes a first semiconductor structure on the base, a second semiconductor structure on the first semiconductor structure, an intermediate layer on the second semiconductor structure, a third semiconductor structure on the intermediate layer, a current-confining layer in the third semiconductor structure, a fourth semiconductor structure on the third semiconductor structure, and an active structure between the third semiconductor structure and the fourth semiconductor structure. The first electrode and the second electrode are on the fourth semiconductor structure, wherein a part of the first electrode passes through the fourth semiconductor structure, the active structure, the current-confining layer and the third semiconductor structure and is connected to the intermediate layer.
    Type: Application
    Filed: November 15, 2021
    Publication date: May 19, 2022
    Inventors: Bing-Cheng LIN, Shou-Lung CHEN, Chi-Hsun HSIEH, Hsin-Chan CHUNG
  • Publication number: 20220149589
    Abstract: A laser element comprises a substrate, an adhesive layer, and a laser unit adhesive to the substrate by the adhesive layer. The laser unit includes a front conductive structure, a first type semiconductor stack, an active layer, a second type semiconductor stack, a patterned insulating layer, a back conductive structure. The back conductive structure includes a first electrode and a second electrode, and the first electrode of the back conductive structure contacts the second type semiconductor stack. A via hole passing through the patterned insulating layer, the second type semiconductor stack, the active layer and the first type semiconductor stack, and a conductive channel located in the via hole and electrically connected to the second electrode of the back conductive structure and the front conductive structure. A first passivation layer formed on a sidewall of the via hole and located between the conductive channel and the sidewall of the via hole.
    Type: Application
    Filed: January 26, 2022
    Publication date: May 12, 2022
    Inventors: Shou-Lung CHEN, Hsin-Chan CHUNG
  • Publication number: 20220085571
    Abstract: A package structure of a laser device is provided, including: a first light transmissive substrate including a first surface, a second surface opposing the first surface, a first side surface between the first surface and the second surface, and a second side surface opposing the first side surface; a laser structure including a first laser chip and a second laser chip which are disposed on the first surface, and the first laser chip including a third side surface; a first optical component disposing on the first light transmissive substrate and corresponding in position to the first laser chip; and a second optical component disposing on the light transmissive substrate and corresponding in position to the second laser chip; wherein the first side surface is coplanar with the third side surface.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 17, 2022
    Applicant: iReach Corporation
    Inventors: Shou-Lung Chen, Hsin-Chan Chung, Hsiu-Ju Yang, Chih-Chiang Lu, Kuo-Min Huang
  • Patent number: 11271365
    Abstract: A laser element includes a transparent substrate, a conductive layer on the transparent substrate, an adhesive layer, attached to the transparent substrate and having a first side surface, a laser unit, wherein the laser unit comprises a front conductive structure, attached to the adhesive layer and having a second side surface, a back conductive structure, which comprises a first detecting electrode and a second detecting electrode separated from the first detecting electrode, a passivation layer covering one of the first side surface and the second side surface, and first via holes extending from the back conductive structure to the conductive layer, wherein the first detecting electrode and the second detecting electrode are electrically connected to the conductive layer through the first via holes.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: March 8, 2022
    Assignee: iReach Corporation
    Inventors: Shou-Lung Chen, Hsin-Chan Chung
  • Publication number: 20210273403
    Abstract: A package structure includes: a substrate includes a first surface; a semiconductor chip disposed on the first surface; a support disposed on the first surface and surrounding the semiconductor chip comprises an electrical conducting member and penetrating the support; and an optical component disposed on the support and electrically connected to the substrate by the electrical conducting member.
    Type: Application
    Filed: March 2, 2021
    Publication date: September 2, 2021
    Inventors: Hsiu-Ju YANG, Shou-Lung CHEN, Hsin-Chan CHUNG