Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

Abstract: A computer processor comprises: a fetch unit that reads and writes instructions and data, a register file including a plurality of registers, which includes a general-purpose register and a special register, an arithmetic logic unit that performs computational processing, a decoder/controller that interprets the instructions and generates a control signal, a symmetric network interface that includes a master interface and a slave interface and that is connected to an on-chip network; and a service controller that receives a service request from the external source through the on-chip network and the symmetric network interface, that communicates with the decoder/controller to send and receive a state of the service request and a state of the computer processor, and that copies an instruction address of a subroutine for executing the service request to a program counter to perform an operation of a designated code when the decoder/controller determines execution of the service request.

Abstract: A semiconductor device includes a substrate including a first cell region, a second cell region adjacent to the first cell region in a first direction, and a comparison region adjacent the first and second cell regions in a second direction, a bit line in a first metal level on the substrate and extending in the first direction, and a first ground rail in a second metal level different from the first metal level. The first ground rail comprises a first sub-ground rail extending in the second direction on the first cell region, a second sub-ground rail extending in the second direction on the second cell region, a third sub-ground rail connecting the first sub-ground rail to the second sub-ground rail on the first and second cell regions, and a fourth sub-ground rail that branches off from the third sub-ground rail and extends in the second direction.

Abstract: An image processing method and apparatus is disclosed, where the image processing method includes receiving an image including frames captured over a time period in an illumination environment including alternating current (AC) light, estimating a specular chromaticity and a diffuse chromaticity of the image based on the frames, determining a weight of each of the specular chromaticity and the diffuse chromaticity based on a frame of the frames, and correcting the image based on the specular chromaticity, the diffuse chromaticity, the weight of the specular chromaticity, and the weight of the diffuse chromaticity.

Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.

Abstract: A hybrid electric vehicle and a method of controlling the same are provided to avoid a collision thereof attributable to erroneous operation of an accelerator pedal. The method includes determining whether an accelerator pedal is erroneously operated in the situation in which an obstacle is detected to be present in the traveling path. In response to determining that the accelerator pedal is erroneously operated, the method includes switching the driving mode to a mode in which an engine is disconnected from a driving shaft and a motor generates driving force. The number of revolutions per minute (RPM) of the engine is then adjusted based on the extent to which the accelerator pedal is operated and the torque of the motor is adjusted based on a first vehicle speed and the distance to the obstacle.

Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.

Abstract: Disclosed are new uses of lactic acid bacteria, in particular Lactobacillus plantarum, for protecting animals from pathogenic bacterial infection, specifically, methods for reducing the mortality rate of animals against infection of pathogenic bacteria, methods for reducing the growth of pathogenic bacteria in the gastrointestinal tract of the animals, as well as methods of increasing and/or stimulating immune system of the animal through the use of such lactic acid bacteria.

Abstract: An active shift control method for a power-off downshift of the hybrid vehicle is provided. The method includes increasing the torque of an engagement clutch in a transmission while disengaging a disengagement clutch by reducing the torque of the disengagement clutch in the transmission, when the shift of a power-off downshift is requested. A motor speed is adjust for a transmission input shaft rotary speed to reach a predetermined target stage synchronization speed of a target stage after shifting, and the torque of the engagement clutch is maintained in a state where the disengagement clutch has been disengaged. The engagement of the engagement clutch is completed by increasing the torque of the engagement clutch when the transmission input shaft rotary speed has reached the target stage synchronization speed.

Abstract: An integrated circuit includes a plurality of layers stacked in a first direction, a plurality of unit circuits at least partially overlapping each other in a second direction that is perpendicular to the first direction and configured to operate in parallel with one another, control circuitry configured to generate a control signal to control the plurality of unit circuits, and a multi-layer conducting line configured to transfer the control signal from the control circuitry to the plurality of unit circuits. The multi-layer conducting line may be integrally formed in a wiring layer and a via layer and extends in the second direction. The wiring layer and the via layer may be adjacent to each other.

Abstract: A method of controlling a brake lamp of a vehicle including an electric motor as a power source includes determining whether gear shifting is required and whether there is a forward section with a suddenly changing slope when regenerative braking is performed through the electric motor without manipulation of an accelerator pedal or a brake pedal, delaying the gear shifting until the gear shifting exceeds a gear-shifting limit when the gear shifting is required and when there is the forward section with the suddenly changing slope, calculating acceleration based on regenerative braking torque while the gear shifting is delayed, and controlling the brake lamp based on the calculated acceleration.

Abstract: An integrated circuit includes a plurality of layers stacked in a first direction, a plurality of unit circuits at least partially overlapping each other in a second direction that is perpendicular to the first direction and configured to operate in parallel with one another, control circuitry configured to generate a control signal to control the plurality of unit circuits, and a multi-layer conducting line configured to transfer the control signal from the control circuitry to the plurality of unit circuits. The multi-layer conducting line may be integrally formed in a wiring layer and a via layer and extends in the second direction. The wiring layer and the via layer may be adjacent to each other.

Abstract: A semiconductor chip includes a substrate having a low-k material layer. An electrode pad is disposed the substrate. A first protection layer at least partially surrounds the electrode pad. The first protection layer includes a first opening at an upper portion thereof. A buffer pad is electrically connected to the electrode pad. A second protection layer at least partially surrounds the buffer pad. The second protection layer includes a second opening at an upper portion thereof. A pillar layer and a solder layer are sequentially stacked on the buffer pad. A thickness of the buffer pad is greater than a thickness of the electrode pad. A width of the first opening in a first direction parallel to an upper surface of the semiconductor substrate is equal to or greater than a width of the second opening in the first direction.

Abstract: A semiconductor device includes a substrate including a first cell region, a second cell region adjacent to the first cell region in a first direction, and a comparison region adjacent the first and second cell regions in a second direction, a bit line in a first metal level on the substrate and extending in the first direction, and a first ground rail in a second metal level different from the first metal level. The first ground rail comprises a first sub-ground rail extending in the second direction on the first cell region, a second sub-ground rail extending in the second direction on the second cell region, a third sub-ground rail connecting the first sub-ground rail to the second sub-ground rail on the first and second cell regions, and a fourth sub-ground rail that branches off from the third sub-ground rail and extends in the second direction.

Abstract: Disclosed are a method of and an apparatus for controlling a vibration of a hybrid electric vehicle. An apparatus for controlling a vibration of a hybrid electric vehicle disclosure may include: an engine position detector detecting a position of an engine; an air amount detector detecting an air amount flowing into the engine; an accelerator pedal position detector detecting a position of an accelerator pedal; a vehicle speed detector detecting a speed of the hybrid electric vehicle; and a controller controlling operation of a motor based on the engine position, the air amount, the position of the accelerator pedal, and the speed of the hybrid electric vehicle.

Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.

Abstract: An active shift control method for a power-off downshift of the hybrid vehicle is provided. The method includes increasing the torque of an engagement clutch in a transmission while disengaging a disengagement clutch by reducing the torque of the disengagement clutch in the transmission, when the shift of a power-off downshift is requested. A motor speed is adjust for a transmission input shaft rotary speed to reach a predetermined target stage synchronization speed of a target stage after shifting, and the torque of the engagement clutch is maintained in a state where the disengagement clutch has been disengaged. The engagement of the engagement clutch is completed by increasing the torque of the engagement clutch when the transmission input shaft rotary speed has reached the target stage synchronization speed.

Abstract: A semiconductor chip is disclosed that includes a chip pad disposed in a first region of a chip body, a redistribution wiring test pad disposed in the first region of the chip body spaced apart from the chip pad and connected to the chip pad through a redistribution wiring structure, and a redistribution wiring connection pad disposed in the first region of the chip body or a second region of the chip body and connected to the chip pad through the redistribution wiring structure.

Abstract: A method is provided for managing data in an electronic device, the method including: detecting a request for tagging a data record; selecting a portion of the data record in response to the request; identifying a content item based on the selected portion of the data record; and associating the content item with the data record.