Patents by Inventor Chan Won

Chan Won has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160225845
    Abstract: A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.
    Type: Application
    Filed: March 31, 2016
    Publication date: August 4, 2016
    Inventors: Young-Seung Cho, Sung-Eui Kim, Ji-Young Kim, Hoon Jeong, Chan-Won Kim, Jong-Bom Seo, Seung-Jun Lee, Jun-Soo Lee
  • Publication number: 20160196571
    Abstract: The present invention discloses a point converting system, a point converting method, and an apparatus applied to the same. That is, in relation to a point conversion among point companies providing respective point services, a point conversion ratio is determined based on points, which are converted, accumulated, and updated for the respective point companies, and the point conversion is performed according to the determined point conversion ratio, thereby avoiding an imbalance phenomenon in which a majority of points are unevenly converted for specific point companies.
    Type: Application
    Filed: December 31, 2015
    Publication date: July 7, 2016
    Applicant: SK PLANET CO., LTD.
    Inventors: Chang Hyun LEE, Chan Won PARK
  • Patent number: 9385902
    Abstract: Disclosed are an apparatus and a method for transmitting a tag. The apparatus for transmitting a tag converts 2 bits of a plurality of bit data into one symbol using phase information and orthogonal information.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: July 5, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Hyun Mo, Kyu Won Han, Chan-Won Park, Hyochan Bang, Dong-Beom Shin
  • Patent number: 9355286
    Abstract: An extended Pulse-Interval Encoding (PIE) modulating method in a Radio Frequency IDentification (RFID) system, wherein the method modulates 2-bit transmitted data and comprises: adjusting a length of a symbol according to a value of the first bit of the transmitted data; and adjusting a length of an energy transfer waiting section according to a value of the second bit of the transmitted data.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: May 31, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sang Hyun Mo, Hyun Seok Kim, Kyu Won Han, Jae Young Jung, Chan Won Park, Hyung Chul Park, Cheol Sig Pyo
  • Publication number: 20160150355
    Abstract: A method of controlling an operation mode of an electronic device and the electronic device therefore are provided. The method includes verifying an operation mode of the first electronic device when it is verified that a second electronic device is approached within a predetermined range while transmitting and receiving data with a third electronic device and changing a first mode to a second mode when the first electronic device operates in the first mode.
    Type: Application
    Filed: July 11, 2014
    Publication date: May 26, 2016
    Inventors: Sung-Sik YOO, Byung-soo KIM, Seul-A KIM, Chan-Won KIM, Seung-Yeon EOM, Doo-Man LEE, Han-Vit CHUNG, Seung-Jin CHOI
  • Patent number: 9330960
    Abstract: A semiconductor device includes a first capacitor structure, a second capacitor structure, and an insulation pattern. The first capacitor structure includes a first lower electrode, a first dielectric layer and a first upper electrode sequentially stacked on a substrate. The second capacitor structure includes a second lower electrode, a second dielectric layer and a second upper electrode sequentially stacked on the substrate, and is adjacent to the first capacitor structure. The insulation pattern partially fills a space between the first and second capacitor structures, and an air gap is formed between the first and second capacitor structures on the insulation pattern.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: May 3, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Seung Cho, Sung-Eui Kim, Ji-Young Kim, Hoon Jeong, Chan-Won Kim, Jong-Bom Seo, Seung-Jun Lee, Jun-Soo Lee
  • Patent number: 9323965
    Abstract: Provided is a method of choosing a communication mode of an RFID device which supports near-field communication and far-field communication, including: interrupting generation of a self RF field signal; determining whether or not an RF field signal for near-field communication is detected; choosing the near-field communication mode when an external RF field signal for near-field communication is detected; and generating the self RF field signal for far-field communication when the external RF field signal for near-field communication is not detected, and choosing the communication mode according to whether or not a response signal is received.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: April 26, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hoe-Sung Yang, Chan-Won Park
  • Patent number: 9324609
    Abstract: Methods of forming a hard mask capable of implementing an electrode having a high aspect ratio are provided. A molding layer may be formed on a substrate. A sacrificial layer may be formed on the molding layer. First mask patterns may be formed in parallel in the sacrificial layer. After the first mask patterns are formed, second mask patterns, which cross the first mask patterns and are in parallel, may be formed in the sacrificial layer. The first mask patterns and the second mask patterns may have materials more opaque than the sacrificial layer. Upper surfaces of the sacrificial layer, the first mask patterns and the second mask patterns may be exposed at the same horizontal level. The sacrificial layer may be removed. Openings, which pass through the molding layer, may be formed using the first mask patterns and the second mask patterns as etch masks. Electrodes may be formed in the openings.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 26, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-Won Kim, Jung-Woo Seo
  • Publication number: 20160111770
    Abstract: Provided is a transmitting/receiving antenna, including: an array antenna including a plurality of element antennas; and a feeding part transmitting a transmitting signal to the plurality of element antennas and receiving a signal received through the array antenna, in which the plurality of element antennas each include a radiation patch and a transmitting port and a receiving port positioned between the feeding part and the radiation patch.
    Type: Application
    Filed: October 20, 2015
    Publication date: April 21, 2016
    Inventors: Won Kyu CHOI, Chan-Won PARK, Jae-Young JUNG, Hae-Won SON
  • Publication number: 20160099407
    Abstract: A multilayered magnetic thin-film stack including a tunneling barrier layer; a magnetic finned layer formed on a first surface of the tunneling barrier layer; and a magnetic free layer formed on a second surface of the tunneling barrier layer, which is opposite to the first surface, wherein at least one of the magnetic finned layer and the magnetic free layer includes a FeZr alloy layer and a first magnetic layer having a (001) bcc structure between the FeZr alloy layer and the tunneling barrier layer.
    Type: Application
    Filed: May 12, 2015
    Publication date: April 7, 2016
    Inventors: Sang Ho LIM, Tae Young LEE, Young Chan WON, Seong Rae LEE
  • Patent number: 9256771
    Abstract: A tag of an apparatus for simultaneously identifying massive tags according to the present invention may include an analog circuit unit to communicate with a reader through an analog signal and to receive energy via magnetic coupling with the reader. Further, the tag may include a digital circuit unit to be supplied with power from the analog circuit unit. The digital circuit unit may support a sleep mode for the tag to stand by in a low power state after transmitting an identifier (ID) to the reader and a wait mode for controlling random access to the reader.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: February 9, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ji Hoon Bae, Kwang Soo Cho, Man Sik Park, Won Kyu Choi, Hoe Sung Yang, Chan-Won Park, Jong-Suk Chae, Cheol Sig Pyo
  • Publication number: 20150364366
    Abstract: Methods of forming a hard mask capable of implementing an electrode having a high aspect ratio are provided. A molding layer may be formed on a substrate. A sacrificial layer may be formed on the molding layer. First mask patterns may be formed in parallel in the sacrificial layer. After the first mask patterns are formed, second mask patterns, which cross the first mask patterns and are in parallel, may be formed in the sacrificial layer. The first mask patterns and the second mask patterns may have materials more opaque than the sacrificial layer. Upper surfaces of the sacrificial layer, the first mask patterns and the second mask patterns may be exposed at the same horizontal level. The sacrificial layer may be removed. Openings, which pass through the molding layer, may be formed using the first mask patterns and the second mask patterns as etch masks. Electrodes may be formed in the openings.
    Type: Application
    Filed: March 30, 2015
    Publication date: December 17, 2015
    Inventors: Chan-Won KIM, Jung-Woo Seo
  • Publication number: 20150344007
    Abstract: Disclosed herein is a brake system including a main brake applying braking force to a wheel of a vehicle when the vehicle travels, a parking brake applying braking force to the wheel of the vehicle when the vehicle is parked, and a parking brake controller operating the main brake when the parked vehicle is sensed to move above a predetermined reference value and stopping the operation of the main brake after increasing locking force of the parking brake when the movement of the vehicle is stopped according to the operation of the main brake.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 3, 2015
    Applicant: MANDO CORPORATION
    Inventor: Chan Won LEE
  • Publication number: 20150324619
    Abstract: Disclosed herein is an apparatus for controlling a tag including: a communication interface receiving a read request; a tag communicating unit connected to one or more memory tags and transmitting and receiving data; a memory storing instructions for performing reads for the memory tags; and a processor performing a control for the memory tags according to the read request based on the instructions, wherein the instructions include instructions for performing the steps of: transmitting a configuration information request to the memory tags; receiving configuration information from the memory tags; calculating the number of data segment according to the configuration information and transmitting the read request including the number of data segment to the memory tags; and receiving a data segment corresponding to the number of data segment from the memory tags.
    Type: Application
    Filed: January 14, 2015
    Publication date: November 12, 2015
    Inventors: Kwang-Soo CHO, Chan-Won PARK, Cheol-Sig PYO, Kyu-Won HAN
  • Publication number: 20150312072
    Abstract: Disclosed are an apparatus and a method for transmitting a tag. The apparatus for transmitting a tag converts 2 bits of a plurality of bit data into one symbol using phase information and orthogonal information.
    Type: Application
    Filed: April 28, 2015
    Publication date: October 29, 2015
    Inventors: Sang Hyun MO, Kyu Won HAN, Chan-Won PARK, Hyochan BANG, Dong-Beom SHIN
  • Patent number: 9142101
    Abstract: The present invention relates to an automated teller machine having an EPP guard cave formed therein. More particularly, the present invention relates to an automated teller machine having an EPP guard cave formed therein, in which the EPP guard cave is recessively formed on the front surface of the automated teller machine toward the inside thereof and an encrypting pin pad (EPP) is installed inside the EPP guard cave formed as such, so that a user may conveniently use the automated teller machine without anxiety by effectively preventing the procedure of inputting personal information by the user from being exposed to surroundings or other people through a concaved structure without a separate structure such as an EPP guard plate since the user may put a hand into the EPP guard cave and input the personal information through the EPP when the user inputs the personal information through the EPP for a banking transaction.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: September 22, 2015
    Assignee: NAUTILUS HYOSUNG INC.
    Inventors: Chan Won Park, Sung Kyu Kim, Du Yong Moh, Dong Hee Leem, Jae Min Cha
  • Patent number: 9123657
    Abstract: A method of fabricating a semiconductor device is provided. The method may include forming an interlayer insulating layer on a structure with a cell region and a peripheral circuit region, forming a first mask layer on the interlayer insulating layer, forming trenches in the first mask layer exposing the interlayer insulating layer by patterning the first mask layer on the peripheral circuit region, and forming key mask patterns in the trenches. An etch selectivity of the first mask patterns with respect to the interlayer insulating layer may be greater than that of the key mask patterns with respect to the interlayer insulating layer.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: September 1, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Minjoon Park, Junho Yoon, Je-Woo Han, Chan-Won Kim
  • Patent number: 9117127
    Abstract: A radio frequency identification (RFID) smart shelf system manages a product through communication with an RFID tag that is attached to the product on a shelf, and includes an RFID reader, a plurality of reader antennas, and an RF switch that is connected between the RFID reader and the plurality of reader antennas. The RF switch periodically varies a phase difference between RF signals of a portion of a plurality of output connection ports that set a connection to each of the plurality of reader antennas.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: August 25, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-young Jung, Won Kyu Choi, Kyu Won Han, Chan-Won Park, Jong-Suk Chae, Cheol Sig Pyo
  • Patent number: 9098791
    Abstract: Provided is a tag integrated circuit (IC) module apparatus and a method of fabricating tag IC module apparatus. The tag IC module apparatus may include an n-turn loop coil, n denoting a natural number, connected in series with a tag IC, and a printed circuit board (PCB) disposed below the tag IC and patterned with the n-turn loop coil.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: August 4, 2015
    Assignees: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, NETHOM CO., LTD
    Inventors: Won Kyu Choi, Jong Suk Chae, Seung Hwan Jeong, Chan Won Park, Cheol Sig Pyo, Hae Won Son, Kun Hong Lee
  • Patent number: D746539
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: December 29, 2015
    Assignee: NAUTILUS HYOSUNG INC.
    Inventors: Hee Youn Lee, Jae Min Park, Chan Won Park, Jae Min Cha