Patents by Inventor Chandra Prakash

Chandra Prakash has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220247367
    Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 4, 2022
    Inventors: John L. Melanson, Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11405037
    Abstract: A driver circuit of a voltage translator includes a bias voltage generator, a drive voltage generator, an output voltage generator, and a filter circuit. The bias voltage generator is configured to receive a supply voltage, a first input voltage, and a feedback voltage, and generate a bias voltage. The feedback voltage controls an amplitude of the bias voltage. The drive voltage generator is configured to receive the supply voltage, the first input voltage, and the bias voltage, and generate a drive voltage. The output voltage generator is configured to receive the supply voltage, a second input voltage, and the drive voltage, and generate an output voltage. The drive voltage controls a slew rate of the output voltage. The filter circuit is configured to receive the output voltage, and generates and provides the feedback voltage to the bias voltage generator.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: August 2, 2022
    Assignee: NXP B.V.
    Inventor: Chandra Prakash Tiwari
  • Publication number: 20220200596
    Abstract: A driver circuit of a voltage translator includes a bias voltage generator, a drive voltage generator, an output voltage generator, and a filter circuit. The bias voltage generator is configured to receive a supply voltage, a first input voltage, and a feedback voltage, and generate a bias voltage. The feedback voltage controls an amplitude of the bias voltage. The drive voltage generator is configured to receive the supply voltage, the first input voltage, and the bias voltage, and generate a drive voltage. The output voltage generator is configured to receive the supply voltage, a second input voltage, and the drive voltage, and generate an output voltage. The drive voltage controls a slew rate of the output voltage. The filter circuit is configured to receive the output voltage, and generates and provides the feedback voltage to the bias voltage generator.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Inventor: Chandra Prakash Tiwari
  • Publication number: 20220149864
    Abstract: An integrated circuit having multiple switched-capacitor delta-sigma data converter circuits includes compensation for voltage reference error due to leakage current that causes reference voltage droop. The reference filter capacitor terminal voltage is maintained by periodic connection to the reference feedback capacitor(s) that are alternately connected to a voltage reference buffer, and the leakage into the reference feedback capacitor networks of disabled converter circuits causes reference voltage droop. The compensation is either determined from the number of converter circuits that are disabled, or from an error between the filter capacitor voltage and a separate voltage reference, and may be applied by adjusting a resistance selectively coupled between the voltage reference buffer output and the filter capacitor, feedback applied to the voltage reference buffer or its input source.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 12, 2022
    Inventors: Chandra Prakash, Bhupendra Manola, John L. Melanson
  • Patent number: 11329617
    Abstract: Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 10, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11309853
    Abstract: A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 19, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11231732
    Abstract: A power managed voltage reference quickly provides accurate operation when enabled and also avoids back-charging power supply rails when disabled. When disabled, the voltage reference filter capacitor is decoupled from the voltage reference buffer and coupled to a pre-charge source having a voltage magnitude greater than the reference voltage. When the voltage reference is enabled, the capacitor is coupled to a discharge path and the voltage across the capacitor is detected to determine when to decouple the capacitor from the discharge path and couple the capacitor to the voltage reference buffer. The capacitor voltage is also detected while disabling the voltage reference. Back-charging the pre-charge supply is prevented by coupling the capacitor to the discharge path until the magnitude of the capacitor voltage is less than the lowest voltage specified for the pre-charge supply, then coupling the capacitor to the pre-charge supply to prepare for enabling the voltage reference.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: January 25, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Chandra Prakash, Prashanth Drakshapalli
  • Publication number: 20220011797
    Abstract: A power managed voltage reference quickly provides accurate operation when enabled and also avoids back-charging power supply rails when disabled. When disabled, the voltage reference filter capacitor is decoupled from the voltage reference buffer and coupled to a pre-charge source having a voltage magnitude greater than the reference voltage. When the voltage reference is enabled, the capacitor is coupled to a discharge path and the voltage across the capacitor is detected to determine when to decouple the capacitor from the discharge path and couple the capacitor to the voltage reference buffer. The capacitor voltage is also detected while disabling the voltage reference. Back-charging the pre-charge supply is prevented by coupling the capacitor to the discharge path until the magnitude of the capacitor voltage is less than the lowest voltage specified for the pre-charge supply, then coupling the capacitor to the pre-charge supply to prepare for enabling the voltage reference.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 13, 2022
    Inventors: Chandra Prakash, Prashanth Drakshapalli
  • Patent number: 11223368
    Abstract: A switched-capacitor delta-sigma data converter circuit includes compensation for voltage reference error that may cause non-linearity and inter-channel crosstalk. The circuit includes a voltage reference circuit, an integrator, a quantizer that quantizes the output of the integrator and a reference feedback switched-capacitor network that provides feedback charge quanta to the integrator that represents an output of the quantizer, so that the output of the quantizer, on average, represents an input signal provided to the integrator. In addition, a compensation switched-capacitor network is included for drawing dummy load charge quanta from the voltage reference output that is not provided to the integrator so that a total charge drawn from the voltage reference output when the reference feedback switched-capacitor network is coupled to the voltage reference output does not vary as the input voltage varies.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: January 11, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Chandra Prakash, Saurabh Singh
  • Patent number: 11194973
    Abstract: A system that can engage in a dialog with a user may select a system response to a user input based on how the system estimates a user may respond to a potential system response. Models may be trained to evaluate a potential system response in view of various available data including dialog history, entity data, etc. Each model may score the potential system response for various qualitative aspects such as whether the response is likely to be comprehensible, on-topic, interesting, likely to lead to the dialog continuing, etc. Such scores may be combined to other scores such as whether the potential response is coherent or engaging. The models may be trained using previous dialog/chatbot evaluation data. At runtime the scores may be used to select a system response to a user input as part of the dialog.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: December 7, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Rahul Goel, Chandra Prakash Khatri, Tagyoung Chung, Raefer Christopher Gabriel, Anushree Venkatesh, Behnam Hedayatnia, Sanghyun Yi
  • Patent number: 11190148
    Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: November 30, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Eric Kimball, Chandra Prakash, Ramin Zanbaghi, Cory J. Peterson
  • Publication number: 20210312914
    Abstract: Described herein is a system for rescoring automatic speech recognition hypotheses for conversational devices that have multi-turn dialogs with a user. The system leverages dialog context by incorporating data related to past user utterances and data related to the system generated response corresponding to the past user utterance. Incorporation of this data improves recognition of a particular user utterance within the dialog.
    Type: Application
    Filed: June 7, 2021
    Publication date: October 7, 2021
    Inventors: Behnam Hedayatnia, Anirudh Raju, Ankur Gandhe, Chandra Prakash Khatri, Ariya Rastrow, Anushree Venkatesh, Arindam Mandal, Raefer Christopher Gabriel, Ahmad Shikib Mehri
  • Patent number: 11113782
    Abstract: Various examples are disclosed for dynamic kernel slicing for virtual graphics processing unit (vGPU) sharing in serverless computing systems. A computing device is configured to provide a serverless computing service, receive a request for execution of program code in the serverless computing service in which a plurality of virtual graphics processing units (vGPUs) are used in the execution of the program code, determine a slice size to partition a compute kernel of the program code into a plurality of sub-kernels for concurrent execution by the vGPUs, the slice size being determined for individual ones of the sub-kernels based on an optimization function that considers a load on a GPU, determine an execution schedule for executing the individual ones of the sub-kernels on the vGPUs in accordance with a scheduling policy, and execute the sub-kernels on the vGPUs as partitioned in accordance with the execution schedule.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: September 7, 2021
    Assignee: VMware, Inc.
    Inventors: Chandra Prakash, Anshuj Garg, Uday Pundalik Kurkure, Hari Sivaraman, Lan Vu, Sairam Veeraswamy
  • Publication number: 20210211099
    Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.
    Type: Application
    Filed: January 2, 2020
    Publication date: July 8, 2021
    Inventors: Eric KIMBALL, Chandra PRAKASH, Ramin ZANBAGHI, Cory J. PETERSON
  • Patent number: 11043214
    Abstract: Described herein is a system for rescoring automatic speech recognition hypotheses for conversational devices that have multi-turn dialogs with a user. The system leverages dialog context by incorporating data related to past user utterances and data related to the system generated response corresponding to the past user utterance. Incorporation of this data improves recognition of a particular user utterance within the dialog.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: June 22, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Behnam Hedayatnia, Anirudh Raju, Ankur Gandhe, Chandra Prakash Khatri, Ariya Rastrow, Anushree Venkatesh, Arindam Mandal, Raefer Christopher Gabriel, Ahmad Shikib Mehri
  • Publication number: 20210110506
    Abstract: Various examples are disclosed for dynamic kernel slicing for virtual graphics processing unit (vGPU) sharing in serverless computing systems. A computing device is configured to provide a serverless computing service, receive a request for execution of program code in the serverless computing service in which a plurality of virtual graphics processing units (vGPUs) are used in the execution of the program code, determine a slice size to partition a compute kernel of the program code into a plurality of sub-kernels for concurrent execution by the vGPUs, the slice size being determined for individual ones of the sub-kernels based on an optimization function that considers a load on a GPU, determine an execution schedule for executing the individual ones of the sub-kernels on the vGPUs in accordance with a scheduling policy, and execute the sub-kernels on the vGPUs as partitioned in accordance with the execution schedule.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 15, 2021
    Inventors: Chandra Prakash, Anshuj Garg, Uday Pundalik Kurkure, Hari Sivaraman, Lan VU, Sairam Veeraswamy
  • Patent number: 10942649
    Abstract: A storage for storing backups of virtual machines includes a persistent storage and a garbage collector. The persistent storage stores the backups. The garbage collector identifies an end of a backup generation session; in response to identifying the end of the backup generation session, the garbage collector performs a date analysis to identify a set of potentially stale backups of the backups; performs a continuity chain analysis of each backup of the set of potentially stale backups to identify a set of stale backups; and deletes each backup of the set of stale backups.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: March 9, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Upanshu Singhal, Archit Seth, Shivakumar Kunnal Onkarappa, Chakraveer Singh, Chandra Prakash, Kumari Priyanka, Rahul Bhardwaj, Akansha Purwar, Lalita Dabburi, Manish Sharma, Shelesh Chopra, Sunil Yadav
  • Publication number: 20210055998
    Abstract: A computing device for storing backups of virtual machines includes a persistent storage and a backup manager. The persistent storage stores backup policies. The backup manager identifies an end of a backup generation session for a virtual machine of the virtual machines and, in response to identifying the end of the backup generation session, identifies a continuity chain implicated by the backup generation session using the backup policies; performs a membership analysis of the identified continuity chain to identify a continuity state of the continuity chain; makes a first determination that the identified continuity chain is broken based on the identified continuity state; and, in response to the first determination, remediates the continuity chain.
    Type: Application
    Filed: November 6, 2020
    Publication date: February 25, 2021
    Inventors: Upanshu Singhal, Shilpa Mehta, Shivakumar Kunnal Onkarappa, Archit Seth, Chakraveer Singh, Chandra Prakash, Rahul Bhardwaj, Pradeep Mittal, Kumari Priyanka, Akansha Purwar, Lalita Dabburi, Manish Sharma, Asif Khan, Shelesh Chopra
  • Publication number: 20210056265
    Abstract: In various example embodiments, a system and method for a Target Language Engine are presented. The Target Language Engine augments a synonym list in a base dictionary of a target language with one or more historical search queries previously submitted to search one or more listings in listing data. The Target Language Engine identifies a compound word and a plurality of words present in the listing data that have a common meaning in the target language. Each word from the plurality of words is present in the compound word. The Target Language Engine causes a database to create an associative link between the portion of text and a word selected from at least one of the synonym list or the plurality of words.
    Type: Application
    Filed: November 9, 2020
    Publication date: February 25, 2021
    Inventors: Chandra Prakash Khatri, Selcuk Kopru, Nish Parikh, Justin Nicholas House, Sameep Navin Solanki
  • Patent number: 10922120
    Abstract: A method for managing virtual machines includes obtaining a restoration request via a first pane of a graphical user interface generated by a graphical user interface manager; in response to obtaining the restoration request: predicting a restoration load for performing the restoration of a virtual machine of the virtual machines; performing a resource availability analysis of the production hosts using the restoration load to obtain a list of production hosts for performing a restoration of the virtual machine; making a first determination that the list specifies at least one production host of the production hosts; and, in response to the first determination: modifying a second pane of the graphical user interface based on the list to obtain a modified second pane; obtaining a user selection of a restoration option displayed in the modified second pane; and restoring the virtual machine using the restoration option and backup/restoration policies.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: February 16, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Upanshu Singhal, Chakraveer Singh, Archit Seth, Shivakumar Kunnal Onkarappa, Rahul Bhardwaj, Chandra Prakash, Akansha Purwar, Lalita Dabburi, Shilpa Mehta, Manish Sharma, Shelesh Chopra, Kumari Priyanka, Navneet Upadhyay, Asif Khan, Pradeep Mittal