Patents by Inventor Chang-Fu Lin
Chang-Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150004752Abstract: A semiconductor package is disclosed, which includes: a packaging substrate; a semiconductor element disposed on the packaging substrate in a flip-chip manner; a stopping portion formed at edges of the semiconductor element; an insulating layer formed on an active surface of the semiconductor element and the stopping portion; and an encapsulant formed between the packaging substrate and the insulating layer. The insulating layer has a recessed portion formed on the stopping portion and facing the packaging substrate such that during a reliability test, the recessed portion can prevent delamination occurring between the insulating layer and the stopping portion from extending to the active surface of the semiconductor element.Type: ApplicationFiled: November 21, 2013Publication date: January 1, 2015Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chang-Fu Lin, Chin-Tsai Yao, Ming-Chin Chuang, Keng-Hung Liu, Fu-Tang Huang
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Patent number: 8895366Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.Type: GrantFiled: February 26, 2014Date of Patent: November 25, 2014Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Wen-Home Huang, Wen-Tsung Tseng, Chang-Fu Lin, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Publication number: 20140179067Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.Type: ApplicationFiled: February 26, 2014Publication date: June 26, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Wen-Home Huang, Wen-Tsung Tseng, Chang-Fu Lin, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Patent number: 8698326Abstract: A semiconductor package and a fabrication method thereof are disclosed. The fabrication method includes the steps of providing a semiconductor chip having an active surface and a non-active surface opposing to the active surface, roughening a peripheral portion of the non-active surface so as to divide the non-active surface into the peripheral portion formed with a roughened structure and a non-roughened central portion, mounting the semiconductor chip on a chip carrier via a plurality of solder bumps formed on the active surface, forming an encapsulant on the chip carrier to encapsulate the semiconductor chip. The roughened structure formed on the peripheral portion of the non-active surface of the semiconductor chip can reinforce the bonding between the semiconductor chip and the encapsulant, and the non-roughened central portion of the non-active surface of the semiconductor chip can maintain the structural strength of the semiconductor chip.Type: GrantFiled: September 10, 2007Date of Patent: April 15, 2014Assignee: Silconware Precision Industries Co., Ltd.Inventors: Wen-Home Huang, Wen-Tsung Tseng, Chang-Fu Lin, Ho-Yi Tsai, Cheng-Hsu Hsiao
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Publication number: 20140061928Abstract: An interconnection structure for being formed on bonding pads of a substrate in a semiconductor package is provided. The interconnection structure includes a nickel layer formed on each of the bonding pads, a metal layer formed on the nickel layer, and a solder material formed on the metal layer. The metal layer is made of one of gold, silver, lead and copper, and has a thickness in the range of 0.5 to 5 um. As such, when the solder material is reflowed to form solder bumps, no nickel-tin compound is formed between the solder bumps and the metal layer, thereby avoiding cracking or delamination of the solder bumps.Type: ApplicationFiled: November 15, 2012Publication date: March 6, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chang-Fu Lin, Ho-Yi Tsai, Chin-Tsai Yao, Jui-Chung Ho, Ching-Hui Hung
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Publication number: 20130341806Abstract: A substrate structure is provided, including a substrate body and a plurality of circuits formed on the substrate body. At least one of the circuits has an electrical contact for connecting to an external element and the electrical contact is narrower in width than the circuit, thereby meeting the requirements of fine line/fine pitch and miniaturization, improving the product yield and reducing the fabrication cost.Type: ApplicationFiled: October 18, 2012Publication date: December 26, 2013Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chang-Fu Lin, Ho-Yi Tsai, Chin-Tsai Yao
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Publication number: 20130334684Abstract: A substrate structure is provided, including a substrate body and a plurality of traces formed on a surface of the substrate body. At least one of the traces has an electrical contact formed in a groove thereof for electrically connecting an external element, thereby meeting the demands of fine line/fine pitch and miniaturization and improving the product yield.Type: ApplicationFiled: October 18, 2012Publication date: December 19, 2013Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chang-Fu Lin, Chin-Te Chen, Chin-Tsai Yao
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Publication number: 20130299968Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.Type: ApplicationFiled: July 11, 2012Publication date: November 14, 2013Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chang-Fu Lin, Ho-Yi Tsai, Chin-Tsai Yao
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Patent number: 8207973Abstract: An electronic device is disclosed. The electronic device comprises a transmitter, a converter, and a receiver. The transmitter transmits data and a control signal. The converter receives the control signal from the transmitter and converts the control signal. The receiver receives the data from the transmitter via a data bus isolated from the converter and receives the converted control signal from the converter. The data transmitted from the transmitter is directly electrically connected to the receiver.Type: GrantFiled: July 21, 2008Date of Patent: June 26, 2012Assignee: Mediatek Inc.Inventors: Chang-Fu Lin, Shu-Wen Teng, Cheng-Che Chen, Wei-Cheng Gu
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Patent number: 8194146Abstract: An apparatus for capturing and storing real-time images is provided. A camera module records frames corresponding to sensed light, outputs pixel data of the frames on a data bus, and generates synchronization control signals to control the synchronized transmission of the frames. An interrupt controller receives the synchronization control signals and correspondingly generates interrupt signals. A processing unit receives the interrupt signals, fetches the pixel data of the frames on the data bus according to at least one of the interrupt signals, and stores the fetched pixel data in a memory device.Type: GrantFiled: August 14, 2008Date of Patent: June 5, 2012Assignee: Mediatek Inc.Inventors: Chang-Fu Lin, Shu-Wen Teng, Cheng-Che Chen, Wei Cheng Gu, Ching-Chao Yang, Shih Tang Lin
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Patent number: 7994428Abstract: An electronic carrier board for a chip to be mounted thereon is provided, which includes a body and a plurality of solder pads. The solder pads have carrying surfaces for carrying the chip thereon through conductive bumps. The carrying surfaces of at least two solder pads are oppositely inclined with respect to each other, thereby preventing the conductive bumps mounted on the carrying surfaces from displacement and thereby further preventing two adjacent conductive bumps subject to displacement from coming into short-circuit contact.Type: GrantFiled: December 15, 2008Date of Patent: August 9, 2011Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Kuo-Ching Tsai, Chang-fu Lin Chang
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Patent number: 7937520Abstract: The invention discloses a general purpose interface controller, including a slave interface controller and a master interface controller, used to exchange data among master devices and slave devices in an electronic device. The slave interface controller receives data and a first control signal from one of the master devices, and converts the first control signal to a request signal. The master interface controller receives the data and the request signal from the slave interface controller, converts the request signal to a second control signal recognized by at least one of the slave devices, and forwards the data and the second control signal to the slave device.Type: GrantFiled: November 14, 2008Date of Patent: May 3, 2011Assignee: Mediatek Inc.Inventors: Chang-Fu Lin, Shu-Wen Teng, Wei Cheng Gu, Cheng-Che Chen
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Patent number: 7863731Abstract: A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.Type: GrantFiled: December 11, 2007Date of Patent: January 4, 2011Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Chin-Te Chen, Ke-Chuan Yang, Chang-Fu Lin
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Publication number: 20090272563Abstract: An electronic carrier board for a chip to be mounted thereon is provided, which includes a body and a plurality of solder pads. The solder pads have carrying surfaces for carrying the chip thereon through conductive bumps. The carrying surfaces of at least two solder pads are oppositely inclined with respect to each other, thereby preventing the conductive bumps mounted on the carrying surfaces from displacement and thereby further preventing two adjacent conductive bumps subject to displacement from coming into short-circuit contact.Type: ApplicationFiled: December 15, 2008Publication date: November 5, 2009Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Kuo-Ching Tsai, Chang-fu Lin
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Patent number: 7596661Abstract: A processing module with multilevel cache architecture, including: a processor; a level-one (L1) cache, coupled to the processor, for caching data for the processor, wherein the L1 cache has at least one L1 cacheable range; a level-two (L2) cache, coupled to the L1 cache, for caching data for the processor, wherein the L2 cache has at least one L2 cacheable range, and the L1 cacheable range and the L2 cacheable range are mutually exclusive; and a memory interface, coupled to the L1 cache and the L2 cache, for transferring data between the L1 cache and a memory and for transferring data between the L2 cache and the memory.Type: GrantFiled: January 23, 2006Date of Patent: September 29, 2009Assignee: MediaTek Inc.Inventors: Ting-Cheng Hsu, Yen-Yu Lin, Chih-Wei Ko, Chang-Fu Lin
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Publication number: 20090179997Abstract: An apparatus for capturing and storing real-time images is provided. A camera module records frames corresponding to sensed light, outputs pixel data of the frames on a data bus, and generates synchronization control signals to control the synchronized transmission of the frames. An interrupt controller receives the synchronization control signals and correspondingly generates interrupt signals. A processing unit receives the interrupt signals, fetches the pixel data of the frames on the data bus according to at least one of the interrupt signals, and stores the fetched pixel data in a memory device.Type: ApplicationFiled: August 14, 2008Publication date: July 16, 2009Applicant: MEDIATEK INC.Inventors: Chang-Fu LIN, Shu-Wen TENG, Cheng-Che CHEN, Wei Cheng GU, Ching-Chao YANG, Shih Tang LIN
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Publication number: 20090182921Abstract: The invention discloses a general purpose interface controller, including a slave interface controller and a master interface controller, used to exchange data among master devices and slave devices in an electronic device. The slave interface controller receives data and a first control signal from one of the master devices, and converts the first control signal to a request signal. The master interface controller receives the data and the request signal from the slave interface controller, converts the request signal to a second control signal recognized by at least one of the slave devices, and forwards the data and the second control signal to the slave device.Type: ApplicationFiled: November 14, 2008Publication date: July 16, 2009Applicant: MEDIATEK INC.Inventors: Chang-Fu Lin, Shu-Wen Teng, Wei Cheng Gu, Cheng-Che Chen
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Publication number: 20090179905Abstract: An electronic device is disclosed. The electronic device comprises a transmitter, a converter, and a receiver. The transmitter transmits data and a control signal. The converter receives the control signal from the transmitter and converts the control signal. The receiver receives the data from the transmitter via a data bus isolated from the converter and receives the converted control signal from the converter.Type: ApplicationFiled: July 21, 2008Publication date: July 16, 2009Applicant: MEDIATEK INC.Inventors: Chang-Fu LIN, Shu-Wen TENG, Cheng-Che CHEN, Wei Cheng GU
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Publication number: 20080277802Abstract: A flip-chip semiconductor package structure and a package substrate applicable thereto are disclosed. The package substrate includes a body having at least a chip-attach area disposed thereon; a plurality of solder pads disposed in the chip-attach area and arranged at different intervals; and a fluid-disturbing portion disposed in the chip-attach area at a position where the solder pads are loosely arranged. A flip-chip semiconductor chip is mounted on the solder pads via conductive bumps and an underfill material is filled between the package substrate and the flip-chip semiconductor chip, the underfill material encapsulating the conductive bumps and the fluid-disturbing portion.Type: ApplicationFiled: May 8, 2008Publication date: November 13, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Kuo-Ching Tsai, Chang-Fu Lin
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Publication number: 20080142955Abstract: A heat-dissipating structure and a heat-dissipating semiconductor package having the same are disclosed in the present invention. The heat-dissipating semiconductor package includes a chip carrier, a flip chip semiconductor chip attached and electrically connected to the chip carrier, and a heat sink bonded to the flip chip semiconductor chip via a thermal interface material, such as a solder material, wherein a groove is formed on the heat sink around the bonding area of the thermal interface material, and a blocking layer, such as a metal oxide layer, is formed on the surface of the groove to reduce the wetting capability of the thermal interface material, thus further prevents the thermal interface material from wetting the groove in the fusion process performed the thermal interface material, therefore, it ensures the thermal interface material has sufficient thickness for forming solder bonding between the heat sink and the flip chip semiconductor chip.Type: ApplicationFiled: December 11, 2007Publication date: June 19, 2008Applicant: Siliconware Precision Industries Co., Ltd.Inventors: Chin-Te Chen, Ke-Chuan Yang, Chang-Fu Lin