Patents by Inventor Chang-Fu Lin

Chang-Fu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ELECTRONIC PACKAGE
    Publication number: 20210280530
    Abstract: Provided is an electronic package, including a multi-chip packaging body with a plurality of electronic elements and a stress buffer layer disposed on the multi-chip packaging body. The stress buffer layer is in contact with the plurality of electronic elements so as to cause stresses to be evenly distributed in the stress buffer layer instead of being concentrated in specific areas, thereby preventing structural stresses from being concentrated in corners of the electronic elements.
    Type: Application
    Filed: May 18, 2020
    Publication date: September 9, 2021
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Jen Chen, Chih-Hsun Hsu, Chee-Key Chung, Jia-Wei Pan, Chang-Fu Lin
  • Electronic package and method for manufacturing the same
    Patent number: 11102890
    Abstract: This present disclosure provides an electronic package and a method for manufacturing the same. An antenna board with a limiter is stacked on a circuit board. A support body for holding the antenna board and the circuit board in place is provided between the antenna board and the circuit board, such that in the process of forming the support body, the limiter stops the flow of an adhesive material of the support body, and the adhesive material of the support body is prevented from overflowing onto an antenna structure of the antenna board to make sure that the antenna of the antenna board functions properly.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: August 24, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Ying-Chang Tseng, Yuan-Hung Hsu, Chang-Fu Lin
  • Method for fabricating electronic package
    Patent number: 11101566
    Abstract: An electronic package and a method for fabricating the same are provided. A resist layer and a support are formed on a first substrate having a first antenna installation area. A second substrate having a second antenna installation area is laminated on the resist layer and the support. The resist layer is then removed. The support keeps the first substrate apart from the second substrate at a distance to ensure that the antenna transmission between the first antenna installation area and the second antenna installation area can function normally.
    Type: Grant
    Filed: July 14, 2020
    Date of Patent: August 24, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Han-Hung Chen, Chun-Yi Huang, Chang-Fu Lin, Rung-Jeng Lin, Kuo-Hua Yu
  • Electronic package
    Patent number: 11069661
    Abstract: An electronic package is formed by arranging two encapsulating portions of different materials between a plurality of electronic components stacked to each other to adjust a stress distribution of the electronic package, so that the degree of warpage of the electronic package can be optimally controlled.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: July 20, 2021
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Wei-Jhen Chen, Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • Electronic package and method for fabricating the same
    Patent number: 11056470
    Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: July 6, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Kong-Toon Ng, Hung-Ho Lee, Chee-Key Chung, Chang-Fu Lin, Chi-Hsin Chiu
  • ELECTRONIC PACKAGE
    Publication number: 20210203057
    Abstract: An electronic package is disclosed. An antenna board is stacked on a circuit board. A frame is formed on the circuit board. A supporter disposed between the antenna board and the circuit board is secured in the frame. In a packaging process, the frame ensures that the antenna board and the circuit board are separated at a distance that complies with a requirement, and that the antenna function of the antenna board can function normally.
    Type: Application
    Filed: April 27, 2020
    Publication date: July 1, 2021
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Rung-Jeng Lin, Han-Hung Chen, Shi-Min Zhou, Kuo-Hua Yu, Chang-Fu Lin
  • Electronic package, method for fabricating the same, and heat dissipator
    Patent number: 10950520
    Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: March 16, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Wen-Shan Tsai, En-Li Lin, Kaun-I Cheng, Wei-Ping Wang
  • METHOD FOR FABRICATING CARRIER STRUCTURE
    Publication number: 20210068260
    Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.
    Type: Application
    Filed: November 2, 2020
    Publication date: March 4, 2021
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • ELECTRONIC PACKAGE AND METHOD FOR FABRICATING THE SAME
    Publication number: 20200402965
    Abstract: An electronic package is provided, including: an encapsulation layer embedded with a first electronic component and conductive pillars; a circuit structure disposed on one surface of the encapsulation layer; a second electronic component disposed on the circuit structure; an insulation layer formed on the other surface of the encapsulation layer; and a circuit portion disposed on the insulation layer. Since the first and second electronic components are disposed on two sides of the circuit structure, respectively, the electronic package has various functions and high performance. A method for fabricating the electronic package is also provided.
    Type: Application
    Filed: July 16, 2019
    Publication date: December 24, 2020
    Inventors: Kong-Toon Ng, Hung-Ho Lee, Chee-Key Chung, Chang-Fu Lin, Chi-Hsin Chiu
  • Electronic package carrier structure thereof, and method for fabricating the carrier structure
    Patent number: 10863626
    Abstract: A carrier structure is provided. A spacer is formed in an insulation board body provided with a circuit layer, and is not electrically connected to the circuit layer. The spacer breaks the insulation board body, and a structural stress of the insulation board body will not be continuously concentrated on a hard material of the insulation board body, thereby preventing warpage from occurring to the insulation board body.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: December 8, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Yuan-Hung Hsu
  • ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE HAVING CHAMFERS
    Publication number: 20200350261
    Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.
    Type: Application
    Filed: May 15, 2020
    Publication date: November 5, 2020
    Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
  • METHOD FOR FABRICATING ELECTRONIC PACKAGE
    Publication number: 20200343641
    Abstract: An electronic package and a method for fabricating the same are provided. A resist layer and a support are formed on a first substrate having a first antenna installation area. A second substrate having a second antenna installation area is laminated on the resist layer and the support. The resist layer is then removed. The support keeps the first substrate apart from the second substrate at a distance to ensure that the antenna transmission between the first antenna installation area and the second antenna installation area can function normally.
    Type: Application
    Filed: July 14, 2020
    Publication date: October 29, 2020
    Inventors: Han-Hung Chen, Chun-Yi Huang, Chang-Fu Lin, Rung-Jeng Lin, Kuo-Hua Yu
  • METHOD FOR FABRICATING ELECTRONIC PACKAGE
    Publication number: 20200335447
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes: forming a circuit structure on an encapsulant; embedding a first electronic component and a plurality of conductive posts in the encapsulant; and disposing a second electronic component on the circuit structure. Since the first and second electronic components are arranged on opposite sides of the circuit structure, the electronic package can provide multi-function and high efficiency.
    Type: Application
    Filed: July 2, 2020
    Publication date: October 22, 2020
    Inventors: Chen-Yu Huang, Chee-Key Chung, Chang-Fu Lin, Kong-Toon Ng, Rui-Feng Tai, Bo-Hao Ma
  • Substrate structure having chamfers
    Patent number: 10763223
    Abstract: Provided is a substrate structure, including a substrate having at least one chamfer formed on a surface thereof, and a plurality of conductive bodies formed to the substrate. Therefore, a stress generated during the packaging process is alleviated through the chamfer, and the substrate structure is prevented from being cracked. An electronic package employing the substrate structure is also provided.
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: September 1, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Po-Hao Wang, Chang-Fu Lin, Chun-Tang Lin, Bo-Hao Chang
  • Method for manufacturing electronic package
    Patent number: 10763237
    Abstract: The present disclosure provides a method for manufacturing an electronic package, with an electronic component bonded to a carrier structure by means of solder tips formed on conductive bumps, wherein the solder tips do not require a reflow process to be in contact with the carrier structure, thereby allowing the conductive bumps to have an adequate amount of solder tips formed thereon and thus precluding problems such as cracking and collapsing of the solder tips.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: September 1, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Yu-Min Lo, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Hsiang-Hua Huang
  • Electronic package and method for fabricating the same
    Patent number: 10756438
    Abstract: An electronic package and a method for fabricating the same are provided. A resist layer and a support are formed on a first substrate having a first antenna installation area. A second substrate having a second antenna installation area is laminated on the resist layer and the support. The resist layer is then removed. The support keeps the first substrate apart from the second substrate at a distance to ensure that the antenna transmission between the first antenna installation area and the second antenna installation area can function normally.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: August 25, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Han-Hung Chen, Chun-Yi Huang, Chang-Fu Lin, Rung-Jeng Lin, Kuo-Hua Yu
  • PACKAGE STACK STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
    Publication number: 20200258871
    Abstract: The present disclosure provides a package stack structure and a method for manufacturing the same. The method is characterized by stacking coreless circuit portions on the board of an electronic component to reduce the overall thickness of the package stack structure.
    Type: Application
    Filed: April 23, 2020
    Publication date: August 13, 2020
    Inventors: Han-Hung Chen, Yuan-Hung Hsu, Chang-Fu Lin, Rung-Jeng Lin, Fu-Tang Huang
  • Electronic package
    Patent number: 10741500
    Abstract: An electronic package and a method for fabricating the same are provided. The method includes: forming a circuit structure on an encapsulant; embedding a first electronic component and a plurality of conductive posts in the encapsulant; and disposing a second electronic component on the circuit structure. Since the first and second electronic components are arranged on opposite sides of the circuit structure, the electronic package can provide multi-function and high efficiency.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: August 11, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chen-Yu Huang, Chee-Key Chung, Chang-Fu Lin, Kong-Toon Ng, Rui-Feng Tai, Bo-Hao Ma
  • Semiconductor package and a substrate for packaging
    Patent number: 10679932
    Abstract: A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.
    Type: Grant
    Filed: April 27, 2017
    Date of Patent: June 9, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Fu Lin, Ho-Yi Tsai, Chin-Tsai Yao
  • ELECTRONIC PACKAGE, METHOD FOR FABRICATING THE SAME, AND HEAT DISSIPATOR
    Publication number: 20200168523
    Abstract: An electronic package is provided. A heat dissipator is bonded via a thermal interface layer to an electronic component disposed on a carrier. The heat dissipator has a concave-convex structure to increase a heat-dissipating area of the thermal interface layer. Therefore, the heat dissipator has a better heat-dissipating effect.
    Type: Application
    Filed: August 6, 2019
    Publication date: May 28, 2020
    Inventors: Yu-Lung Huang, Chee-Key Chung, Chang-Fu Lin, Kuo-Hua Yu, Wen-Shan Tsai, En-Li Lin, Kaun-I Cheng, Wei-Ping Wang