Abstract: A gas concentration measurement device is disclosed. The gas concentration measurement device comprises: a light source unit for emitting light into the gas concentration measurement device; an incident unit for refracting the light emitted from the light source unit; a first reflection unit and a second reflection unit for reflecting the incident light; a rotatable third reflection unit; and a light receiving unit for measuring the amount of incident light, wherein the light incident from the incident unit is reflected between the first reflection unit and the second reflection unit through the third reflection unit, and the light is incident on the light receiving unit by allowing an optical path thereof to be changed according to the rotation of the third reflection unit.

Abstract: A memory system is disclosed, which relates to technology for implementing data communication between memory devices. The memory system includes a plurality of memory devices and a memory controller. The memory devices allow a data packet composed of data and header information to be directly communicated between the memory devices. The memory controller transmits the data packet to a source memory device from among the plurality of memory devices, and receives the data packet from a last memory device from among the plurality of memory devices. Each of the memory devices hashes the header information such that the data is accessed, using a result of the hash, in address regions located at different positions.

Abstract: A real-time utterance verification system according to the present invention includes a speech recognition unit configured to recognize an utterance of an utterer, a memory configured to store a program for verifying the utterance of the utterer in real time, and a processor configured to execute the program stored in the memory, wherein, upon executing the program, the processor generates and stores a list of the utterance of the utterer, performs a semantic analysis on each utterance included in the list, and generates, when the utterance is determined to be an inappropriate utterance for a listener as a result of the semantic analysis, utterance restricting information corresponding to the inappropriate utterance.

Abstract: A semiconductor device includes a buffer control circuit and an operation control circuit. The buffer control circuit generates an enable signal based on a self-refresh signal and to generate an end control signal and a supply control signal from a first internal chip selection signal during a self-refresh operation. The operation control circuit generates a frequency information signal from an internal command/address signal when an update signal is inputted during a mode register write operation, adjusts a shift amount based on the frequency information signal when the supply control signal is inputted during the mode register write operation, and generates an internal write command according to the adjusted shift amount during a read-modify-write operation in synchronization with an internal clock signal after generating an internal read command.

Abstract: A wireless power transmitting device according to an embodiment may include a power transmission circuit and a processor. The processor may be configured to control the power transmission circuit to wirelessly transmit power to a first area around the wireless power transmitting device, perform a predetermined first operation when an obstacle is detected in a second area around the first area, and perform a predetermined second operation when it is detected that the obstacle has entered the first area.

Abstract: A semiconductor device includes a buffer control circuit and an operation control circuit. The buffer control circuit generates an enable signal based on a self-refresh signal and to generate an end control signal and a supply control signal from a first internal chip selection signal during a self-refresh operation. The operation control circuit generates a frequency information signal from an internal command/address signal when an update signal is inputted during a mode register write operation, adjusts a shift amount based on the frequency information signal when the supply control signal is inputted during the mode register write operation, and generates an internal write command according to the adjusted shift amount during a read-modify-write operation in synchronization with an internal clock signal after generating an internal read command.

Abstract: An exemplary embodiment of the present invention provides a method of transferring a micro device, which is applicable to more various micro devices and is capable of improving transferring efficiency. An exemplary embodiment of the present invention provides a method of transferring a micro device.

Abstract: An electronic device may include an information signal storage circuit and a write data selection circuit. The information signal storage circuit may be configured to store an information signal during a mode register set operation, and may be configured to output the stored information signal as a mode register information signal. The write data selection circuit may be configured to receive the mode register information and output the mode register information signal as write data.

Abstract: A memory system is disclosed, which relates to technology for implementing data communication between memory devices. The memory system includes a plurality of memory devices and a memory controller. The memory devices allow a data packet composed of data and header information to be directly communicated between the memory devices. The memory controller transmits the data packet to a source memory device from among the plurality of memory devices, and receives the data packet from a last memory device from among the plurality of memory devices. Each of the memory devices hashes the header information such that the data is accessed, using a result of the hash, in address regions located at different positions.

Abstract: The present invention relates to a method for producing a 3- to 3.5-valent vanadium solution from a 4-valent vanadium solution by a catalytic reaction in the presence of a reducing agent, which generates a gas product during oxidation; a method for producing an electrolyte for a vanadium redox flow battery; and an apparatus for producing a liquid electrolyte for a vanadium redox flow battery. The present invention is characterized in that when a 3- to 3.5-valent vanadium electrolyte is produced from a 4-valent vanadium electrolyte by a catalytic reaction in the presence of a reducing agent, which generates a gas product during oxidation, the gas product produced in the catalytic reaction is captured with inert gas bubbles, which are carrier gases, and is removed from the reaction solution of the catalytic reaction by gas-liquid phase separation, thereby accelerating the catalytic reaction towards the forward reaction.

Abstract: A semiconductor device includes a flag generation circuit and a write operation circuit. The flag generation circuit generates an error scrub flag if an error scrub operation is performed. The write operation circuit controls a write operation in response to the error scrub flag. The error scrub operation includes an internal read operation for outputting read data from a cell array, a data correction operation for correcting an error included in the read data to generate corrected data, and an internal write operation for storing the corrected data into the cell array.

Abstract: A filter includes a plurality of series portions each including one or more series resonators, and a plurality of shunt portions each including one or more shunt resonators. At least one of the plurality of shunt portions includes two shunt resonators connected to each other in anti-series, and antiresonance frequencies of the two shunt resonators are arranged externally of a passband.

Abstract: An image recognition method includes: selecting an augmentation process from augmentation processes based on a probability table, in response to an acquisition of an input image; acquiring an augmented image by augmenting the input image based on the selected augmentation process; and recognizing an object from the augmented image based on a recognition model.

Abstract: A wireless power transmitting device according to an embodiment may include a power transmission circuit and a processor. The processor may be configured to control the power transmission circuit to wirelessly transmit power to a first area around the wireless power transmitting device, perform a predetermined first operation when an obstacle is detected in a second area around the first area, and perform a predetermined second operation when it is detected that the obstacle has entered the first area.

Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip and electrically connected to the first semiconductor chip by a first through electrode and a second through electrode. The first semiconductor chip may electrically connect the first through electrode to a third test resistor during a second test operation. The first semiconductor chip may detect a voltage level of the first internal node, which is determined by resistance values of the third test resistor and the first and second through electrodes, to test a short failure between the first and second through electrodes during the second test operation.

Abstract: The present invention relates to a fall detection device, which includes a sensor attached to a user and sensing a motion of the fall detection device in a plurality of coordinate axial directions; an output section capable of outputting fall information of a user; and a controller determining that the user falls down when acceleration in a first axial direction among the plurality of coordinate axial directions is changed from a positive value to a negative value based on the motion sensed by the sensor, and controlling the fall information to be output.

Abstract: A memory system is disclosed, which relates to technology for implementing data communication between memory devices. The memory system includes a plurality of memory devices and a memory controller. The memory devices allow a data packet composed of data and header information to be directly communicated between the memory devices. The memory controller transmits the data packet to a source memory device from among the plurality of memory devices, and receives the data packet from a last memory device from among the plurality of memory devices. Each of the memory devices hashes the header information such that the data is accessed, using a result of the hash, in address regions located at different positions.

Abstract: A method of connecting an access point (AP) device is provided. The method includes receiving media access control (MAC) address information of a terminal from the terminal through an external device, registering the received MAC address information, and determining whether the registered MAC address information corresponding to MAC address information registered to another AP device. In response to the registered MAC address information corresponding to the MAC address information registered to the other AP device, an AP device managing the registered MAC address information is determined among the AP device and the other AP device. A connection request is received from the terminal, and the terminal is connected to the AP device based on whether MAC address information of the connection request is corresponding to the registered MAC address information.

Abstract: A method of manufacturing a flip chip package includes forming a plurality of semiconductor chips and bonding the semiconductor chips to a package substrate. The method further includes electrically testing the plurality of semiconductor chips on the package substrate, molding the tested semiconductor chips, and singulating the molded chips. Electrically testing the semiconductor chips includes covering the semiconductor chips with a protection member.

Abstract: The present invention relates to a method for producing a 3- to 3.5-valent vanadium solution from a 4-valent vanadium solution by a catalytic reaction in the presence of a reducing agent, which generates a gas product during oxidation; a method for producing an electrolyte for a vanadium redox flow battery; and an apparatus for producing a liquid electrolyte for a vanadium redox flow battery. The present invention is characterized in that when a 3- to 3.5-valent vanadium electrolyte is produced from a 4-valent vanadium electrolyte by a catalytic reaction in the presence of a reducing agent, which generates a gas product during oxidation, the gas product produced in the catalytic reaction is captured with inert gas bubbles, which are carrier gases, and is removed from the reaction solution of the catalytic reaction by gas-liquid phase separation, thereby accelerating the catalytic reaction towards the forward reaction.