Abstract: The present invention discloses a photomask blank comprises a transparent substrate on which exposure light is transmitted, and a black matrix resist layer. The black matrix resist layer is configured to include a carbon black dispersion, copolymer having amino group and/or copolymer having quaternary ammonium salt, organic solvent containing dispersion component, a binder resin having a carboxyl group, unsaturated monomer, and a photosensitive material of halogen light or green light in the range of 480-540 nm such that the black matrix resist layer is provided as one single layer for acting as a light-shielding film and as a photosensitive exposable film, and a surface of the black matrix resist layer is manufactured against a chemical processing operation and a mechanical scratching.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: The invention relates to fabricating a single-trench alternating phase shift mask (PSM). A chromium layer over a mask layer, which is itself over a quartz layer, of the PSM is patterned according to a semiconductor design. The mask layer and the quartz layer are dry etched through a photoresist layer that has been applied over the chromium layer and patterned according to an alternating PSM design. The dry etching initially forms single trenches of the PSM. The quartz layer is next wet etched through the mask layer to completely form the single trenches of the PSM, where the photoresist layer has first been removed. The mask layer is dry etched again, where the single trenches of the PSM are initially filled with filler material to protect the single trenches from the dry etching.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: A process is described for shrinking gate lengths and poly interconnects simultaneously during the fabrication of an integrated circuit. A positive tone photoresist is coated on a substrate and is first exposed with an alternating phase shift mask that has full size scattering bars which enable a gate dimension to be printed that is ¼ to ½ the size of the exposing wavelength. The substrate is then exposed using a tritone attenuated phase shift mask with a chrome blocking area to protect the shrunken gates and attenuated areas with scattering bars for shrinking the interconnect lines. Scattering bars are not printed in the photoresist pattern. The process affords higher DOF, lower OPE, and less sensitivity to lens aberrations than conventional lithography methods. A data processing flow is provided which leads to a modified GDS layout for each of the two masks. A system for producing phase shifting layout data is also included.

Abstract: The invention relates to fabricating a single-trench alternating phase shift mask (PSM). A chromium layer over a mask layer, which is itself over a quartz layer, of the PSM is patterned according to a semiconductor design. The mask layer and the quartz layer are dry etched through a photoresist layer that has been applied over the chromium layer and patterned according to an alternating PSM design. The dry etching initially forms single trenches of the PSM. The quartz layer is next wet etched through the mask layer to completely form the single trenches of the PSM, where the photoresist layer has first been removed. The mask layer is dry etched again, where the single trenches of the PSM are initially filled with filler material to protect the single trenches from the dry etching.

Abstract: Fabricating a dual-trench alternating phase shift mask (PSM) is disclosed. A chromium layer over a quartz layer of the PSM is patterned according to a semiconductor design. The quartz layer is dry etched a first number of times through a first photoresist layer applied over the chromium layer and patterned according to the deep trenches of the alternating PSM design by using beam writing. This initially forms deep trenches of the PSM. The quartz layer is dry etched a second number of times through a second photoresist layer applied over the chromium layer and patterned according to the deep trenches and the shallow trenches of the alternating PSM design by using backside ultraviolet exposure. This completely forms shallow trenches and the deep trenches of the PSM. The second photoresist layer is then removed.

Abstract: Fabricating a dual-trench alternating phase shift mask (PSM) is disclosed. A chromium layer over a quartz layer of the PSM is patterned according to a semiconductor design. The quartz layer is dry etched a first number of times through a first photoresist layer applied over the chromium layer and patterned according to the deep trenches of the alternating PSM design by using beam writing. This initially forms deep trenches of the PSM. The quartz layer is dry etched a second number of times through a second photoresist layer applied over the chromium layer and patterned according to the deep trenches and the shallow trenches of the alternating PSM design by using backside ultraviolet exposure. This completely forms shallow trenches and the deep trenches of the PSM. The second photoresist layer is then removed.

Abstract: A half tone phase shift mask material, suitable for use at 193 nm is disclosed. It comprises a layer of nitrogen rich silicon nitride that was formed by subjecting a mixture of a nitrogen bearing gas, such as nitrogen and/or ammonia, with a silicon bearing gas, such as silane, to a plasma discharge. Provided the ratio of the nitrogen bearing to the silicon bearing gases is about 10 to 1, films having the required optical properties at 193 nm are formed. These properties are a reflectance that is less than 15% and a transmittance that is between 4 and 15%. Related optical properties, namely an extinction coefficient of about 0.4 and a refractive index of about 2.5, are also closely approached. Additionally, the films are stable under prolonged UV exposure and exhibit good etch behavior.

Abstract: The proximity effect in photoresist patterns has been eliminated by carefully controlling the values of three independent variables that are involved in the photolithographic process. These are the temperature at which Post Exposure Bake is performed, the numerical aperture of the exposure system and the partial coherence parameter. Specifically, the Post Exposure Bake temperature should be 20-25° C. lower than that recommended by the manufacturer, the numerical aperture should be around 0.5 and the partial coherence parameter around 0.8. If these guidelines are followed, no proximity effect is in evidence down to duty ratios less than 1 and distortion-free patterns are obtained without the need for an Optical Proximity Correction.

Abstract: A simplified method is disclosed for forming dual damascene patterns using a phase-shifting mask in conjunction with a single photoresist process. First, a method is descried for fabricating a phase-shifting metal mask formed on a quartz substrate having opaque, transparent and semi-light-transmitting regions. The transparent regions comprise hole pattern while the semi-transmitting regions comprise line pattern for a dual damascene pattern. Then it is shown how the phase-shifting mask is used to form a dual damascene structure by forming a single photoresist on a silicon substrate having a tri-layer insulating layer, forming the hole and line patterns on the photoresist simultaneously by exposing it through the phase-shifting mask, and then transferring the patterns successively into the top and bottom layers of the insulating layer by etching. Having thus formed the vertical hole interconnect and line trench into the insulating layer, metal is deposited into the dual damascene structure.

Abstract: A method of fabricating a capacitor is described in which a substrate comprises a transistor and a planarized insulation layer. An opening is formed in the insulation layer, exposing one of the source/drain of the transistor. A sacrificial plug is formed in the first opening. The insulation layer surrounding the first opening is removed to form a second opening and a certain thickness of the insulation layer is retained at the bottom of the second opening. The sacrificial plug is removed and simultaneously forming a node plug and a first electrode respectively in the first opening and on the bottom and side wall of the second opening. A dielectric layer is further formed on the surface of the first electrode and a second electrode is formed on the dielectric layer.

Abstract: A half tone phase shift mask material, suitable for use at 193 nm is disclosed. It comprises a layer of nitrogen rich silicon nitride that was formed by subjecting a mixture of a nitrogen bearing gas, such as nitrogen and/or ammonia, with a silicon bearing gas, such as silane, to a plasma discharge. Provided the ratio of the nitrogen bearing to the silicon bearing gases is about 10 to 1, films having the required optical properties at 193 nm are formed. These properties are a reflectance that is less than 15% and a transmittance that is between 4 and 15%. Related optical properties, namely an extinction coefficient of about 0.4 and a refractive index of about 2.5, are also closely approached. Additionally, the films are stable under prolonged UV exposure and exhibit good etch behavior.

Abstract: The proximity effect in photoresist patterns has been eliminated by carefully controlling the values of three independent variables that are involved in the photolithographic process. These are the temperature at which Post Exposure Bake is performed, the numerical aperture of the exposure system and the partial coherence parameter. Specifically, the Post Exposure Bake temperature should be 20-25.degree. C. lower than that recommended by the manufacturer, the numerical aperture should be around 0.5 and the partial coherence parameter around 0.8. If these guidelines are followed, no proximity effect is in evidence down to duty ratios less than 1 and distortion-free patterns are obtained without the need for an Optical Proximity Correction.

Abstract: A simplified method is disclosed for forming dual damascene patterns using a phase-shifting mask in conjunction with a single photoresist process. First, a method is descried for fabricating a phase-shifting metal mask formed on a quartz substrate having opaque, transparent and semi-light-transmitting regions. The transparent regions comprise hole pattern while the semi-transmitting regions comprise line pattern for a dual damascene pattern. Then it is shown how the phase-shifting mask is used to form a dual damascene structure by forming a single photoresist on a silicon substrate having a tri-layer insulating layer, forming the hole and line patterns on the photoresist simultaneously by exposing it through the phase-shifting mask, and then transferring the patterns successively into the top and bottom layers of the insulating layer by etching. Having thus formed the vertical hole interconnect and line trench into the insulating layer, metal is deposited into the dual damascene structure.

Abstract: A new method is disclosed for forming dual damascene patterns using a silylation process. A substrate is provided with a tri-layer of insulation formed thereon. A first layer of silylation photoresist is formed on the substrate and is imaged with a hole pattern by exposure through a mask. Using a silylation process, which greatly improves the depth of focus by reducing reflections from the underlying substrate, the regions in the first photoresist adjacent to the hole pattern are affixed to form top surface imaging mask. The hole pattern is then etched in the first photoresist. A second layer of photoresist is formed, and is imaged with a line pattern aligned with the previous hole pattern by exposure through a mask. The line pattern in the second photoresist is etched. The hole pattern in the first photoresist is transferred into the top layer of composite insulation first and then into the middle etch-stop layer by successive etching.