Patents by Inventor Chang Mu An

Chang Mu An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160372401
    Abstract: Semiconductor devices are provided having large vias, such as under bonding pads, to increase the via open area ratio, increase the via etching rate, and avoid inter-metal dielectric cracking and damage to the integrated circuit. The via is defined as a large open area in the inter-metal dielectric layer between an isolated conductive bottom substrate layer and a conductive top layer. Methods of manufacturing semiconductor devices with a large via are also provided.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Inventors: Zheng-Chang MU, Cheng-Wei LIN, Kuang-Wen LIU
  • Patent number: 9496328
    Abstract: A method of manufacturing a capacitor for a semiconductor device includes forming a lower electrode, forming a dielectric layer on the lower electrode, forming a first upper electrode on the dielectric layer, adsorbing an organic silicon source onto a surface of the first upper electrode, and forming a second upper electrode on the first upper electrode onto which the organic silicon source is adsorbed. Related devices and fabrication methods are also discussed.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: November 15, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Bom Seo, Young Geun Park, Bong Hyun Kim, Sun Ho Kim, Hyun Jun Kim, Se Hyoung Ahn, Chang Mu An
  • Patent number: 9484219
    Abstract: A method of fabricating semiconductor devices may include forming a mold structure on a lower layer, the mold structure including an etch stop layer doped at a first impurity concentration, a lower mold layer doped at a second impurity concentration, and an undoped upper mold layer. The method may include forming a trench exposing the lower layer in the mold structure using dry etching, extending a width of the trench in the etch stop layer using wet etching, and forming a first conductive pattern in the extended width trench, wherein an etch rate of the etch stop layer with respect to the dry etching may be smaller than an etch rate of the lower mold layer with respect to the dry etching, and an etch rate of the etch stop layer with respect to the wet etching may be proportional to the first impurity concentration.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: November 1, 2016
    Assignee: Samsung Electronic Co., Ltd.
    Inventors: Young-Geun Park, Wook-Yeol Yi, Sang-Yeol Kang, Dong-Chan Kim, Chang-Mu An, Bong-Hyun Kim, Han-Jin Lim
  • Publication number: 20160064386
    Abstract: A method of fabricating semiconductor devices may include forming a mold structure on a lower layer, the mold structure including an etch stop layer doped at a first impurity concentration, a lower mold layer doped at a second impurity concentration, and an undoped upper mold layer. The method may include forming a trench exposing the lower layer in the mold structure using dry etching, extending a width of the trench in the etch stop layer using wet etching, and forming a first conductive pattern in the extended width trench, wherein an etch rate of the etch stop layer with respect to the dry etching may be smaller than an etch rate of the lower mold layer with respect to the dry etching, and an etch rate of the etch stop layer with respect to the wet etching may be proportional to the first impurity concentration.
    Type: Application
    Filed: August 14, 2015
    Publication date: March 3, 2016
    Inventors: Young-Geun PARK, Wook-Yeol YI, Sang-Yeol KANG, Dong-Chan KIM, Chang-Mu AN, Bong-Hyun KIM, Han-Jin LIM
  • Publication number: 20160043163
    Abstract: A method of manufacturing a capacitor for a semiconductor device includes forming a lower electrode, forming a dielectric layer on the lower electrode, forming a first upper electrode on the dielectric layer, adsorbing an organic silicon source onto a surface of the first upper electrode, and forming a second upper electrode on the first upper electrode onto which the organic silicon source is adsorbed. Related devices and fabrication methods are also discussed.
    Type: Application
    Filed: April 9, 2015
    Publication date: February 11, 2016
    Inventors: Jong Bom Seo, Young Geun Park, Bong Hyun Kim, Sun Ho Kim, Hyun Jun Kim, Se Hyoung Ahn, Chang Mu An
  • Patent number: 8710702
    Abstract: A regenerative electric power storage system installed onboard a DC electric rail car comprises: a filter unit which removes high frequency components from the DC power supplied through the catenary of a pantograph; a storage unit for storing power; a bidirectional DC/DC converter which is electrically connected between the filter unit and the storage unit; a DC/DC filter unit to remove high frequency noise; a voltage detection unit and a control unit which controls the switching of the bidirectional DC/DC converter. Instability is presented in the remaining systems of the electric rail car.
    Type: Grant
    Filed: December 16, 2009
    Date of Patent: April 29, 2014
    Assignee: Korea Railroad Research Institute
    Inventors: Gil-Dong Kim, Han-Min Lee, Chang-Mu Lee, Sung-Kyou Choi
  • Publication number: 20120013181
    Abstract: A regenerative electric power storage system installed onboard a DC electric rail car comprises: a filter unit which removes high frequency components from the DC power supplied through the catenary of a pantograph; a storage unit for storing power; a bidirectional DC/DC converter which is electrically connected between the filter unit and the storage unit; a DC/DC filter unit to remove high frequency noise; a voltage detection unit and a control unit which controls the switching of the bidirectional DC/DC converter. Instability is presented in the remaining systems of the electric rail car.
    Type: Application
    Filed: December 16, 2009
    Publication date: January 19, 2012
    Inventors: Gil-Dong Kim, Han-Min Lee, Chang-Mu Lee, Sung-Kyou Choi
  • Publication number: 20100059203
    Abstract: A heat dissipation device for an electronic component includes a heat sink thermally contacting the electronic component and a label member fixed on the heat sink for providing information. The heat sink includes a base and a plurality of fins extending upwardly from a top surface of the base. Two engaging portions protrude from two spaced fins, towards each other. Two flanges angle outwardly from two opposite lateral sides of the label member and clasp the two engaging portions of the heat sink, respectively.
    Type: Application
    Filed: March 6, 2009
    Publication date: March 11, 2010
    Applicants: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD, HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Ching-Hung Chu, Chang-Mu Li
  • Patent number: 6946216
    Abstract: Disclosed are method and apparatus for improving battery performance by transferring waste heat generated from heat generating components to the battery that, when brought to a high temperature, attains better performance according to temperature characteristics of the battery. According to the disclosure, an electronic device capable of effecting improved battery performance comprises a central processing unit generating waste heat when being operative; a battery for supplying power to said electronic device; and thermal conducting means, first end thereof making thermal contact with said central processing unit and second end thereof making thermal contact with said battery, causing heat transfer between said central processing unit and said battery. Said waste heat generated by said central processing unit is transferred to alter the temperature of said battery such that its output voltage is stabilized and capacity enlarged.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: September 20, 2005
    Assignees: Acer Incorporated, Wistron Corporation
    Inventors: Chang Mu-Tsai, Tseng Tien-Chun, Li Hsiao-Feng, Chih-Feng Yeh
  • Patent number: 6735093
    Abstract: A computer system with an EMI prevention structure includes a housing for covering a main board. The housing has leading grooves formed on two opposite inside surfaces. The main board includes a ground layer formed on the periphery, attached shielding devices corresponding to the leading grooves, a thickness of the main board and a shielding device being substantially equal to a gap formed by a leading groove. Each shielding device has a pair of substantially parallel metal plates and a metal side plate forming an open rectangular channel, the open side allowing the shielding device to fit over the ground layer of the main board. A spring latch is installed on a plate of each shielding device to allow the shielding device to remain firmly fixed to the main board.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: May 11, 2004
    Assignees: Wistron Corporation, Acer Incorporated
    Inventor: Chang Mu-Tsai
  • Publication number: 20020090546
    Abstract: Disclosed are method and apparatus for improving battery performance by transferring waste heat generated from heat generating components to the battery that, when brought to a high temperature, attains better performance according to temperature characteristics of the battery. According to the disclosure, an electronic device capable of effecting improved battery performance comprises a central processing unit generating waste heat when being operative; a battery for supplying power to said electronic device; and thermal conducting means, first end thereof making thermal contact with said central processing unit and second end thereof making thermal contact with said battery, causing heat transfer between said central processing unit and said battery. Said waste heat generated by said central processing unit is transferred to alter the temperature of said battery such that its output voltage is stabilized and capacity enlarged.
    Type: Application
    Filed: October 30, 2001
    Publication date: July 11, 2002
    Applicant: Chunghwa Telecom Co., Ltd.
    Inventors: Chang Mu-Tsai, Tseng Tien-Chun, Li Hsiao-Feng, Chih-Feng Yeh
  • Publication number: 20020085363
    Abstract: A computer system and the EMI prevention structure thereof, comprising: a housing for covering the computer having a leading groove formed inward thereof, a main board having a ground layer formed in the periphery thereof wherein the width of the main board is substantially equal to the interval of the leading groove and a shielding device comprising a pair of substantially parallel metal plates and a metal side plate to form a cuboid with an opining so that said shielding device can be connected the ground layer, wherein at least one spring piece is installed on the plate.
    Type: Application
    Filed: December 10, 2001
    Publication date: July 4, 2002
    Applicant: Acer Inc.
    Inventor: Chang Mu-Tsai