Patents by Inventor Chang-seung Lee

Chang-seung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9006044
    Abstract: A method of manufacturing a graphene device may include forming a device portion including a graphene layer on the first substrate; attaching a second substrate on the device portion of the first substrate; and removing the first substrate. The removing of the first substrate may include etching a sacrificial layer between the first substrate and the graphene layer. After removing the first substrate, a third substrate may be attached on the device portion. After attaching the third substrate, the second substrate may be removed.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: April 14, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-seung Lee, Joo-ho Lee, Yong-sung Kim, Chang-youl Moon
  • Patent number: 8999812
    Abstract: A graphene device may include a channel layer including graphene, a first electrode and second electrode on a first region and second region of the channel layer, respectively, and a capping layer covering the channel layer and the first and second electrodes. A region of the channel layer between the first and second electrodes is exposed by an opening in the capping layer. A gate insulating layer may be on the capping layer to cover the region of the channel layer, and a gate may be on the gate insulating layer.
    Type: Grant
    Filed: May 18, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wenxu Xianyu, Chang-youl Moon, Jeong-yub Lee, Chang-seung Lee
  • Patent number: 8932941
    Abstract: The method of manufacturing a graphene device includes forming an insulating material layer on a substrate, forming first and second metal pads on the insulating material layer spaced apart from each other, forming a graphene layer having a portion defined as an active area between the first and second metal pads on the insulating material layer, forming third and fourth metal pads on the graphene layer spaced apart from each other with the active area therebetween, the third and fourth metal pads extending above the first metal pad and the second metal pad, respectively, forming a first protection layer to cover all the first and second metal pads, the graphene layer, and the third and fourth metal pads, and etching an entire surface of the first protection layer until only a residual layer made of a material for forming the first protection layer remains on the active area.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: January 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-ho Lee, Tae-han Jeon, Yong-sung Kim, Chang-seung Lee, Yong-seok Jung
  • Publication number: 20140335681
    Abstract: Graphene transferring methods, a device manufacturing method using the same, and substrate structures including graphene, include forming a catalyst layer on a first substrate, forming a graphene layer on the catalyst layer, forming a protection metal layer on the graphene layer, attaching a supporter to the protection metal layer, separating the first substrate from the catalyst layer such that the protection metal layer, the graphene layer, and the catalyst layer remain on the supporter, removing the catalyst layer from the supporter, and transferring the protection metal layer and the graphene layer from the supporter to a second substrate.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 13, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo-ho LEE, Yong-sung KIM, Chang-youl MOON, Sung-hee LEE, Chang-seung LEE
  • Patent number: 8877572
    Abstract: A graphene device manufacturing apparatus includes an electrode, a graphene structure including a metal catalyst layer formed on a substrate, a protection layer, and a graphene layer between the protection layer and the metal catalyst layer, a power unit configured to apply a voltage between the electrode and the metal catalyst layer, and an electrolyte in which the graphene structure is at least partially submerged.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: November 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-ho Lee, Yong-seok Jung, Yong-sung Kim, Chang-seung Lee, Chang-youl Moon
  • Patent number: 8866136
    Abstract: Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a passivation layer on a channel layer, a source, a drain, and a gate, wherein the component of the passivation layer is varied in a height direction. The passivation layer may have a multi-layer structure including a silicon oxide layer, a silicon oxynitride layer, and a silicon nitride layer sequentially stacked. The channel layer may include an oxide semiconductor.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-sim Jung, Chang-seung Lee, Jae-cheol Lee, Sang-yoon Lee, Jang-yeon Kwon, Kwang-hee Lee, Kyoung-seok Son
  • Patent number: 8861080
    Abstract: Wire grid polarizers, methods of fabricating a wire grid polarizer and display panels including a wire grid polarizer are provided, the methods include preparing a mold having a lower surface in which a plurality of parallel fine grooves are formed, and arranging the mold on a transparent substrate. The plurality of parallel fine grooves are filled with a conductive liquid ink. A plurality of parallel conductive nano wires are formed on the transparent substrate by curing the conductive liquid ink. The mold is removed.
    Type: Grant
    Filed: January 16, 2012
    Date of Patent: October 14, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-seung Lee, Jun-seong Kim, Ki-deok Bae
  • Patent number: 8813363
    Abstract: A method of manufacturing a piezoelectric inkjet printhead includes processing a lower silicon-on-insulator substrate having a sequentially stacked structure with a first silicon layer, an intervening oxide layer, and a second silicon layer, processing the lower silicon-on-insulator substrate by etching the second silicon layer to form a manifold, a plurality of pressure chambers arranged along at least one side of the manifold and connected with the manifold, and a plurality of dampers connected with the pressure chambers, and by etching the first silicon layer and the intervening oxide layer to form a plurality of vertical nozzles through the first silicon layer and the intervening oxide layer to corresponding ones of the plurality of dampers, stacking and bonding an upper substrate on the lower substrate, reducing the upper substrate to a predetermined thickness, and forming a piezoelectric actuator on the upper substrate.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 26, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-chang Lee, Jae-woo Chung, Kyo-yool Lee, Chang-seung Lee, Sung-gyu Kang
  • Publication number: 20140191198
    Abstract: A graphene electronic device includes: a first conductive layer and a semiconductor layer on a first region of an intermediate layer; a second conductive layer on a second region of the intermediate layer; a graphene layer on the intermediate layer, the semiconductor layer, and the second conductive layer; and a first gate structure and a second gate structure on the graphene layer.
    Type: Application
    Filed: August 26, 2013
    Publication date: July 10, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-sung KIM, Chang-seung LEE, Joo-ho LEE
  • Patent number: 8742400
    Abstract: A graphene switching device includes a first electrode and an insulating layer in first and second regions of the semiconductor substrate, respectively, a plurality of metal particles on a surface of the semiconductor substrate between the first and second regions, a graphene layer on the plurality of metal particles and extending on the insulating layer, a second electrode on the graphene layer in the second region and configured to face the insulating layer, a gate insulating layer configured to cover the graphene layer, and a gate electrode on the gate insulating layer. The semiconductor substrate forms an energy barrier between the graphene layer and the first electrode.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: June 3, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: David Seo, Sang-wook Kim, Seong-jun Park, Young-jun Yun, Yung-hee Yvette Lee, Chang-seung Lee
  • Publication number: 20140125310
    Abstract: A nanogap device includes a first insulation layer having a nanopore formed therein, a first nanogap electrode which may be formed on the first insulation layer and may be divided into two parts with a nanogap interposed between the two parts, the nanogap facing the nanopore, a second insulation layer formed on the first nanogap electrode, a first graphene layer formed on the second insulation layer, a first semiconductor layer formed on the first graphene layer, a first drain electrode formed on the first semiconductor layer, and a first source electrode formed on the first graphene layer such as to be apart from the first semiconductor layer.
    Type: Application
    Filed: April 3, 2013
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-seung LEE, Yong-sung KIM, Jeo-young SHIM, Joo-ho LEE
  • Publication number: 20140125322
    Abstract: A nanogap device which may include a first insulation layer having a nanopore formed therein, a first channel layer which may be on the first insulation layer, a first source electrode and a first drain electrode which may be respectively in contact with both ends of the first channel layer, a second insulation layer which may cover the first channel layer, the first source electrode, and the first drain electrode, and a first nanogap electrode which may be on the second insulation layer and may be divided into two parts with a nanogap, which faces the nanopore, interposed between the two parts.
    Type: Application
    Filed: April 3, 2013
    Publication date: May 8, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-seung LEE, Yong-sung KIM, Jeo-young SHIM, Joo-ho LEE
  • Patent number: 8716766
    Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: May 6, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-seung Lee, Young Bae Kim, Young Jun Yun, Yong Sung Kim, David Seo, Joo-ho Lee
  • Publication number: 20140061590
    Abstract: The method of manufacturing a graphene device includes forming an insulating material layer on a substrate, forming first and second metal pads on the insulating material layer spaced apart from each other, forming a graphene layer having a portion defined as an active area between the first and second metal pads on the insulating material layer, forming third and fourth metal pads on the graphene layer spaced apart from each other with the active area therebetween, the third and fourth metal pads extending above the first metal pad and the second metal pad, respectively, forming a first protection layer to cover all the first and second metal pads, the graphene layer, and the third and fourth metal pads, and etching an entire surface of the first protection layer until only a residual layer made of a material for forming the first protection layer remains on the active area.
    Type: Application
    Filed: April 3, 2013
    Publication date: March 6, 2014
    Inventors: Joo-ho LEE, Tae-han JEON, Yong-sung KIM, Chang-seung LEE, Yong-seok JUNG
  • Publication number: 20140030857
    Abstract: A graphene device manufacturing apparatus includes an electrode, a graphene structure including a metal catalyst layer formed on a substrate, a protection layer, and a graphene layer between the protection layer and the metal catalyst layer, a power unit configured to apply a voltage between the electrode and the metal catalyst layer, and an electrolyte in which the graphene structure is at least partially submerged.
    Type: Application
    Filed: March 8, 2013
    Publication date: January 30, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Joo-ho LEE, Yong-seok JUNG, Yong-sung KIM, Chang-seung LEE, Chang-youl MOON
  • Publication number: 20140021446
    Abstract: Transistors, and methods of manufacturing the transistors, include graphene and a material converted from graphene. The transistor may include a channel layer including graphene and a gate insulating layer including a material converted from graphene. The material converted from the graphene may be fluorinated graphene. The channel layer may include a patterned graphene region. The patterned graphene region may be defined by a region converted from graphene. A gate of the transistor may include graphene.
    Type: Application
    Filed: March 11, 2013
    Publication date: January 23, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang-seung LEE, Yong-sung KIM, Joo-ho LEE, Yong-seok JUNG
  • Publication number: 20130277644
    Abstract: A graphene switching device includes a first electrode and an insulating layer in first and second regions of the semiconductor substrate, respectively, a plurality of metal particles on a surface of the semiconductor substrate between the first and second regions, a graphene layer on the plurality of metal particles and extending on the insulating layer, a second electrode on the graphene layer in the second region and configured to face the insulating layer, a gate insulating layer configured to cover the graphene layer, and a gate electrode on the gate insulating layer. The semiconductor substrate forms an energy barrier between the graphene layer and the first electrode.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 24, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: David SEO, Sang-wook KIM, Seong-jun PARK, Young-jun YUN, Yung-hee Yvette LEE, Chang-seung LEE
  • Publication number: 20130256629
    Abstract: Graphene semiconductor device, a method of manufacturing a graphene semiconductor device, an organic light emitting display and a memory, include forming a multilayered member including a sacrificial substrate, a sacrificial layer, and a semiconductor layer deposited in sequence, forming a transfer substrate on the semiconductor layer, forming a first laminate including the transfer substrate and the semiconductor layer by removing the sacrificial layer to separate the sacrificial substrate from the semiconductor layer, forming a second laminate by forming a graphene layer on a base substrate, combining the first laminate and the second laminate such that the semiconductor layer contacts the graphene layer, and removing the transfer substrate.
    Type: Application
    Filed: June 14, 2012
    Publication date: October 3, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Chang Seung LEE, Young Bae KIM, Young Jun YUN, Yong Sung KIM, David SEO, Joo Ho LEE
  • Publication number: 20130193412
    Abstract: Transistors and methods of manufacturing the same may include a gate on a substrate, a channel layer having a three-dimensional (3D) channel region covering at least a portion of a gate, a source electrode over a first region of the channel layer, and a drain electrode over a second region of the channel layer.
    Type: Application
    Filed: August 27, 2012
    Publication date: August 1, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-seung LEE, Joo-ho LEE, Yong-sung KIM, Jun-seong KIM, Chang-youl MOON
  • Publication number: 20130193411
    Abstract: A method of manufacturing a graphene device may include forming a device portion including a graphene layer on the first substrate; attaching a second substrate on the device portion of the first substrate; and removing the first substrate. The removing of the first substrate may include etching a sacrificial layer between the first substrate and the graphene layer. After removing the first substrate, a third substrate may be attached on the device portion. After attaching the third substrate, the second substrate may be removed.
    Type: Application
    Filed: July 11, 2012
    Publication date: August 1, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-seung Lee, Joo-ho Lee, Yong-sung Kim, Chang-youl Moon