Patents by Inventor Chang-sik Choi

Chang-sik Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200079056
    Abstract: Provided are a high manganese hot dip aluminum-plated steel sheet and a method for manufacturing the same, the steel sheet including: a base steel comprising, by wt %, 0.3-0.9% of C, 10-25% of Mn, 0.01-0.5% of Ti, 0.01-0.2% of Sn, 0.01-0.1% of Sb, and the balance of Fe and inevitable impurities; a hot dip aluminum-based steel plated layer formed on the base steel sheet and comprising 0.1 wt % or more of a sum of one or more types among Li, Na, and K, and the balance of Al and inevitable impurities; and an Al—Fe—Si—Mn based alloy layer formed between the base steel sheet and the aluminum-based plated layer, and having a dual structure with different average Fe amounts.
    Type: Application
    Filed: December 21, 2017
    Publication date: March 12, 2020
    Inventors: Young-Ha KIM, Chang-Sik CHOI, Yon-Kyun SONG, Kwang-Tai MIN
  • Publication number: 20190382861
    Abstract: Provided is a hot rolled steel sheet having excellent formability and fatigue properties comprising, in percentage by weight: 0.3-0.8% of C; 13-25% of Mn; 0.1-1.0% of V; 0.005-2.0% of Si; 0.01-2.5% of Al; 0.03% or less of P; 0.03% or less of S; 0.04% or less (excluding 0%) of N; and the balance being Fe and inevitable impurities, wherein, when viewed in a cross section in the thickness direction, the hot rolled steel sheet comprises, by area fraction, 20-70% of a non-recrystallized structure and 30-80% of a recrystallized structure.
    Type: Application
    Filed: December 12, 2017
    Publication date: December 19, 2019
    Inventors: Tae-Jin SONG, Jeong-Eun KIM, Chang-Sik CHOI
  • Publication number: 20190044667
    Abstract: A user equipment (UE) includes a controller configured to identify a pool of HARQ process numbers that is configured by a base station for transmission on a sidelink channel, search one or more a scheduling assignments of one or more other UEs to determine whether any of the HARQ process numbers are being used by other UEs, exclude HARQ process numbers that are being used from the configured pool of HARQ process numbers, select a HARQ process number from the remaining HARQ process numbers in the configured pool, generate a SCI to include the selected HARQ process number. The UE further includes a transmitter configured to perform a transmission or re-transmission of a packet over a sidelink to another UE(s), using the selected HARQ process number. Methods and apparatus for multi-beam based transmission for the sidelink and V2X communication are also disclosed.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 7, 2019
    Inventors: Li Guo, Chang-sik Choi, Le Liu
  • Patent number: 9797038
    Abstract: An apparatus for depositing an organic material includes: a main chamber; a first substrate loading section in which a first substrate is loaded in the first radial direction and seated; a second substrate loading section in which a second substrate is loaded in the second radial direction and seated; a scanner including a linear organic material deposition source, a source moving means to which the organic material deposition source is coupled to linearly move the organic material deposition source so that the organic material particles are injected onto the surface of the first substrate or the second substrate, and a rotating means for rotating the source moving means; and a scanner moving means for moving the scanner back and forth so that the scanner is positioned in the first deposition region or the second deposition region.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: October 24, 2017
    Assignee: SUNIC SYSTEMS, LTD.
    Inventors: Chang Sik Choi, Young Im, Young Jong Lee, Seong Ho Kim, Sun Hyuk Kim, Jung Gyun Lee, In Ho Hwang
  • Publication number: 20150203957
    Abstract: An apparatus for depositing an organic material includes: a main chamber; a first substrate loading section in which a first substrate is loaded in the first radial direction and seated; a second substrate loading section in which a second substrate is loaded in the second radial direction and seated; a scanner including a linear organic material deposition source, a source moving means to which the organic material deposition source is coupled to linearly move the organic material deposition source so that the organic material particles are injected onto the surface of the first substrate or the second substrate, and a rotating means for rotating the source moving means; and a scanner moving means for moving the scanner back and forth so that the scanner is positioned in the first deposition region or the second deposition region.
    Type: Application
    Filed: March 26, 2013
    Publication date: July 23, 2015
    Inventors: Chang Sik Choi, Young Im, Young Jong Lee, Seong Ho Kim, Sun Hyuk Kim, Jung Gyun Lee, In Ho Hwang
  • Publication number: 20130036693
    Abstract: The present invention relates to a lightweight bidirectional hollow core slab, and a doughnut-shaped hollow core body which may be advantageously used in the construction of a bidirectional hollow core slab. The doughnut-shaped hollow core body according to the present invention includes an outer case formed in a generally doughnut shape, wherein a hollow portion with a circular section is formed in the center thereof and corners are rounded with curved surfaces. The bidirectional hollow core slab according to the present invention is made by stably locating the doughnut-shaped hollow core bodies in concrete in such a manner that the doughnut-shaped hollow core body is restrained and mounted in steel bar cages or on the upper and lower steel bars.
    Type: Application
    Filed: October 21, 2010
    Publication date: February 14, 2013
    Inventors: Seung Chang Lee, Jeong Keun Oh, Chang Sik Choi, Hyun Ki Choi
  • Patent number: 7675562
    Abstract: The image senor includes a plurality of row lines and a plurality of column lines crossing the plurality of row lines. A pixel is formed at respective crossings of the row and column lines. Each pixel generates a charge based on light incident thereon and selectively transfers the charge to an associated column line based on a signal received from an associated row line. Each column line has a column driver circuit associated therewith. The column driver circuit is configured to generate an output voltage based on the charge on the associated column line.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: March 9, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yo-Jong Kim, Chang-Sik Choi, Chi-Young Choi
  • Publication number: 20080196799
    Abstract: A steel sheet for deep drawing used for automobiles, and a method for manufacturing the same are disclosed. The steel sheet comprises, by weight %, C: 0.010% or less, Si: 0.02% or less, Mn: 0.06˜1.5%, P: 0.15% or less, S: 0.020% or less, Sol. Al: 0.10˜0.40%, N: 0.010% or less, Ti: 0.003˜0.010%, Nb: 0.003˜0.040%, B: 0.0002˜0.0020%, and the balance of Fe and other unavoidable impurities, wherein the composition of Ti, Al, B, and N satisfies the relationship: 1.0<(Ti[%]+Al[%]/16+6B[%])/3.43N[%]<4.1, and wherein the composition of Nb, Al, and C satisfies the relationship; 0.7<(Nb[%]+Al[%]/20)/7.75C[%]<3.5. The steel sheet exhibits excellent secondary work embrittlement, fatigue properties of welded joints, and an appealing plated surface as well as excellent formability.
    Type: Application
    Filed: July 7, 2006
    Publication date: August 21, 2008
    Applicant: POSCO
    Inventors: Hee-Jae Kang, Kwang-Keun Chin, Sang-Ho Han, Chang-Sik Choi
  • Publication number: 20050041129
    Abstract: The image senor includes a plurality of row lines and a plurality of column lines crossing the plurality of row lines. A pixel is formed at respective crossings of the row and column lines. Each pixel generates a charge based on light incident thereon and selectively transfers the charge to an associated column line based on a signal received from an associated row line. Each column line has a column driver circuit associated therewith. The column driver circuit is configured to generate an output voltage based on the charge on the associated column line.
    Type: Application
    Filed: February 23, 2004
    Publication date: February 24, 2005
    Inventors: Yo-Jong Kim, Chang-Sik Choi, Chi-Young Choi
  • Patent number: 6316803
    Abstract: A method for manufacturing a semiconductor memory device in which a bit line and a storage electrode of a capacitor are connected to an active area of a semiconductor substrate, respectively, via a contact pad formed in a self-aligning manner. The method includes the steps of forming gate electrodes on the semiconductor substrate, the gate electrodes being covered with a nitride spacer. Then, a thermal oxide layer is formed on the exposed surface of the semiconductor substrate between the gate electrodes. Then, an etch stop layer is formed on the entire surface of the resultant structure having the thermal oxide layer to an appropriate thickness such that the space between the gate electrodes is not buried. Then, a first interlayer dielectric (ILD) film covering the space between the gate electrodes and the top of the gate electrodes is formed, and the first ILD film is then patterned to form a landing pad hole which exposes the spacer and the etch stop layer.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: November 13, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-dong Ban, Hyun-cheol Choe, Chang-sik Choi
  • Patent number: 6071802
    Abstract: A method for manufacturing a semiconductor memory device in which a bit line and a storage electrode of a capacitor are connected to an active area of a semiconductor substrate, respectively, via a contact pad formed in a self-aligning manner. The method includes the steps of forming gate electrodes on the semiconductor substrate, the gate electrodes being covered with a nitride spacer. Then, a thermal oxide layer is formed on the exposed surface of the semiconductor substrate between the gate electrodes. Then, an etch stop layer is formed on the entire surface of the resultant structure having the thermal oxide layer to an appropriate thickness such that the space between the gate electrodes is not buried. Then, a first interlayer dielectric (ILD) film covering the space between the gate electrodes and the top of the gate electrodes is formed, and the first ILD film is then patterned to form a landing pad hole which exposes the spacer and the etch stop layer.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: June 6, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-dong Ban, Hyun-cheol Choe, Chang-sik Choi
  • Patent number: 6015748
    Abstract: Integrated circuit memory devices are fabricated by fabricating an array of memory cell field effect transistors and peripheral circuit field effect transistors that are spaced-apart from the memory cell transistors, in an integrated circuit substrate. The memory cell transistors include spaced-apart memory cell transistor source and drain regions and a memory cell gate therebetween. The peripheral circuit transistors include spaced-apart peripheral circuit transistor source and drain regions and a peripheral circuit gate therebetween. A silicide blocking layer is formed on the memory cell transistor source and drain regions. The integrated circuit substrate is silicided to thereby form a silicide layer on the memory cell transistor gates, on the peripheral circuit source and drain regions and on the peripheral circuit gates, such that the memory cell transistor source and drain regions are free of the silicide layer thereon.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: January 18, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hong-Ki Kim, Duck-Hyung Lee, Chang-Sik Choi