Abstract: Disclosed is a device for sensing atmosphere temperature in a vehicle brake, the device including a space formed in a brake lining, the space being open toward a drum, a through-hole formed through a brake shoe, a case fitted in the through-hole, the case being fixed to the through-hole by a plurality of fixing means, an insertion recess formed in the case, the insertion recess being formed so as to be open to the rear, an aeration hole formed in a front end of the case, the aeration hole being configured to allow the space and the insertion recess to be connected to each other such that aeration is performed therebetween, a temperature sensor fitted in the insertion recess, the temperature sensor being configured to measure frictional braking temperature transferred to the space, and a fixing member configured to fix the temperature sensor.

Abstract: A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size.

Abstract: There is provided an insulated gate bipolar transistor including: a first semiconductor area of a first conductivity type; a second semiconductor area of a second conductivity type formed on one surface of the first semiconductor area; third semiconductor areas of the first conductivity type continuously formed in a length direction on one surface of the second semiconductor area; a plurality of trenches formed between the third semiconductor areas, extending to an inside of the second semiconductor area, and being continuous in the length direction; a fourth semiconductor area of the second conductivity type formed on one surface of the third semiconductor areas, insulation layers formed inside the trenches; gate electrodes buried inside the insulation layers; and a barrier layer formed in at least one of locations corresponding to the third semiconductor areas inside the second semiconductor area.

Abstract: A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer.

Abstract: A power semiconductor device may include: a base substrate including a first conductive type drift layer; a second conductive type semiconductor substrate disposed on the other surface of the base substrate; a first conductive type diffusion layer disposed in the base substrate and having an impurity concentration higher than that of the drift layer; a second conductive type well layer disposed inside of one surface of the base substrate; a trench formed from one surface of the base substrate including the well layer so as to penetrate through the diffusion layer in a depth direction; a first insulation film disposed on a surface of the base substrate; and a first electrode disposed in the trench. A peak point of an impurity doping concentration of the diffusion layer in a transverse direction may be positioned in a region contacting a side surface of the trench.

Abstract: A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size.

Abstract: A power semiconductor device may include a drift region including a base layer and a surface semiconductor layer disposed on the base layer and having a first conductivity type; a field insulating layer disposed on the base layer, embedded in the surface semiconductor layer, and including an opening portion; and a collector region disposed below the base layer and having a second conductivity type. The field insulating layer is formed in the drift region to limit movement of holes, whereby conduction loss of the power semiconductor device may be significantly decreased.

Abstract: A power semiconductor device may include: an n-drift part; a gate disposed in an upper portion of the n-drift part; an active part disposed to be in contact with the gate; an emitter part disposed in the active part and disposed to be in contact with the gate; an inactive part disposed to be spaced apart from the active part; a floating part disposed in the inactive part; and a dummy gate disposed to surround the inactive part in order to prevent a hole pass between the active part and the inactive part.

Abstract: Disclosed herein is a power semiconductor device. The power semiconductor device includes a second conductive type first junction termination extension (JTE) layer that is formed so as to be in contact with one side of the second conductive type well layer, a second conductive type second JTE layer that is formed on the same line as the second conductive type first JTE layer, and is formed so as to be spaced apart from the second conductive type first JTE layer in a length direction of the substrate, and a poly silicon layer that is formed so as to be in contact with the second conductive type well layer and an upper portion of the second conductive type first JTE layer.

Abstract: A semiconductor device may include a drift layer having a first conductivity-type; a body region having a second conductivity-type and disposed on the drift layer; first semiconductor regions having the second conductivity-type and disposed to be spaced apart from each other below the drift layer; and second semiconductor regions having the first conductivity-type and disposed between the first semiconductor regions below the drift layer.

Abstract: There is provided a power semiconductor device including a contact formed in an active region, a trench gate extendedly formed from the first region into a first termination region and formed alternately with the contact, a first conductive well formed between the contact of the active region and the trench gate, a first conductive well extending portion formed in the first termination region and a part of a second termination region, and a first conductive field limiting ring formed in the second termination region and contacting the well extending portion.

Abstract: There is provided a power semiconductor device, including: a first conductive type drift layer, a second conductive type termination layer formed on an upper portion of an edge of the drift layer, and a high concentration first conductive type channel stop layer formed on a side surface of the edge of the drift layer.

Abstract: A power semiconductor device may include: a semiconductor laminate formed by stacking a plurality of semiconductor layers each having an emitter metal layer formed on a top thereof and a collector metal layer formed on a bottom thereof; an insulating layer interposed between the semiconductor layers; and a first external electrode and a second external electrode formed on sides of the semiconductor laminate. The first external electrode is electrically connected to the emitter metal layer, and the second external electrode is electrically connected to the collector metal layer.

Abstract: A power semiconductor device may include: a first conductivity-type first semiconductor layer; a second conductivity-type second semiconductor layer disposed above the first semiconductor layer; and a heat dissipation trench disposed to penetrate from an upper surface of the second semiconductor layer into a portion of the second semiconductor layer and having an insulating layer disposed on a surface thereof.

Abstract: A provided a power semiconductor device may include: a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type formed on the first semiconductor region; a plurality of trench gates formed to penetrate through the second semiconductor region and lengthily formed in one direction; and a third semiconductor region of the first conductive type formed on the second semiconductor region, formed at least partially in a length direction between the plurality of trench gates, and formed to contact one side of an adjacent trench gate in a width direction.

Abstract: A method of manufacturing a semiconductor device may include: preparing a substrate formed of SiC; depositing crystalline or amorphous silicon (Si) on one surface of the substrate to form a first semiconductor layer; and performing a heat treatment under a nitrogen atmosphere to form a second semiconductor layer formed of SiCN between the substrate and the first semiconductor layer.

Abstract: A diode device may include: a first semiconductor area having a first conductivity type; a second semiconductor area having a second conductivity type, provided on the first semiconductor area and having a uniform impurity density; a trench provided to pass through the second semiconductor area to contact the first semiconductor area; and a first metal layer provided on surfaces of the trench and the second semiconductor area.

Abstract: A diode device may include a first conductivity type first semiconductor region, a second conductivity type second semiconductor region partially formed inside an upper portion of the first semiconductor region, and second conductivity type third semiconductor regions partially formed inside the upper portion of the first semiconductor region, formed on sides of the second semiconductor region, and having an impurity concentration higher than that of the second semiconductor region.

Abstract: A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; a termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; and a hole accumulating region formed in the active region and below the channel and having a first conductivity type. A trench disposed at a boundary between the termination region and the active region has a depth shallower than that of a trench adjacent thereto.

Abstract: A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; a termination region formed in the vicinity of the active region; a plurality of first trenches formed lengthwise in one direction in the active region; and at least one or more second trenches formed lengthwise in one direction in the termination region. The second trench has a depth deeper than that of the first trench.