Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.

Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.

Abstract: Methods of manufacturing semiconductor devices include forming an integrated structure and a first stopping layer pattern in a first region. A first insulating interlayer and a second stopping layer are formed. A second preliminary insulating interlayer is formed by partially etching the second stopping layer and the first insulating interlayer in the first region. A first polishing is performed to remove a protruding portion. A second polishing is performed to expose the first and second stopping layer patterns.

Abstract: In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution.

Abstract: A capacitor includes an object or a substrate including an insulation layer having an opening, an electrode structure having conductive patterns, a dielectric layer and an upper electrode. The electrode structure may have a first conductive pattern including metal and a second conductive pattern including metal oxide generated from the first conductive pattern. The first conductive pattern may fill the opening and may protrude over the insulation layer. The second conductive pattern may extend from the first conductive pattern. The electrode structure may additionally include a third conductive pattern disposed on the second conductive pattern. The capacitor including the electrode structure may ensure improved structural stability and electrical characteristics.

Abstract: Methods of manufacturing semiconductor devices include forming an integrated structure and a first stopping layer pattern in a first region. A first insulating interlayer and a second stopping layer are formed. A second preliminary insulating interlayer is formed by partially etching the second stopping layer and the first insulating interlayer in the first region. A first polishing is performed to remove a protruding portion. A second polishing is performed to expose the first and second stopping layer patterns.

Abstract: A method of fabricating a three-dimensional semiconductor memory device includes providing a substrate which includes a cell array region and a peripheral region. The method further includes a peripheral structure on the peripheral region of the substrate, where the peripheral structure includes peripheral circuits and is configured to expose the cell array region of the substrate. The method further includes forming a lower cell structure on the cell array region of the substrate, forming an insulating layer to cover the peripheral structure and the lower cell structure on the substrate, planarizing the insulating layer using top surfaces of the peripheral structure and the lower cell structure as a planarization stop layer, and forming an upper cell structure on the lower cell structure.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: A capacitor includes an object or a substrate including an insulation layer having an opening, an electrode structure having conductive patterns, a dielectric layer and an upper electrode. The electrode structure may have a first conductive pattern including metal and a second conductive pattern including metal oxide generated from the first conductive pattern. The first conductive pattern may fill the opening and may protrude over the insulation layer. The second conductive pattern may extend from the first conductive pattern. The electrode structure may additionally include a third conductive pattern disposed on the second conductive pattern. The capacitor including the electrode structure may ensure improved structural stability and electrical characteristics.

Abstract: In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution.

Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.

Abstract: Provided are an anionic surfactant-containing etching solution for removal of an oxide film, preparation methods thereof, and methods of fabricating a semiconductor device using the etching solution. The etching solution includes a hydrofluoric acid (HF), deionized water, and an anionic surfactant. The anionic surfactant is a compound in which an anime salt is added as a counter ion, as represented by R1—OSO3?HA+, R1—CO2?HA+,R1—PO42—(HA+)2,(R1)2—PO4—HA+, or R1—SO3—HA+ where R1 is a straight or branched hydrocarbon group of C4 to C22 and A is ammonia or amine. The etching solution provides a high etching selectivity ratio of an oxide film to a nitride film or a polysilicon film. Therefore, in a semiconductor device fabrication process such as a STI device isolation process or a capacitor formation process, when an oxide film is exposed together with a nitride film or a polysilicon film, the etching solution can be efficiently used in selectively removing only the oxide film.

Abstract: Disclosed are a cleaning solution for preventing damage of a silicon germanium layer when cleaning a semiconductor device including the silicon germanium layer and a cleaning method using the same. The cleaning solution of a silicon germanium layer includes from about 0.01 to about 2.5 percent by weight of a non-ionic surfactant with respect to 100 percent by weight of the cleaning solution, about 0.05 to about 5.0 percent by weight of an alkaline compound with respect to the cleaning solution and a remaining amount of pure water. The damage to an exposed silicon germanium layer can be prevented when cleaning a silicon substrate having a silicon germanium layer. Impurities present on the surface portion of the silicon germanium layer can be effectively removed.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: This invention provides methods of fabricating semiconductor devices, wherein an alloy layer is formed on a semiconductor substrate to form a substrate structure, which methods include using an aqueous solution diluted ammonia and peroxide mixture (APM) to perform cleaning and/or wet etching treatment steps on the substrate structure.

Abstract: A method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and method for fabricating a semiconductor device using the cleaning method are disclosed. The cleaning method comprises preparing a semiconductor substrate on which a silicon layer and a silicon germanium layer are formed and exposed; and performing a first cleaning sub-process that uses a first cleaning solution to remove a native oxide layer from the semiconductor substrate. The cleaning method further comprises performing a second cleaning sub-process on the semiconductor substrate after performing the first cleaning sub-process, wherein the second cleaning sub-process comprises using a second cleaning solution. In addition, the second cleaning solution comprises ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (H2O), and the second cleaning solution comprises at least 200 times more deionized water (H2O) than ammonium hydroxide (NH4OH) by volume.

Abstract: A method of forming fine pitch hardmask patterns includes forming a hardmask layer on a substrate and forming a plurality of first mask patterns on the hardmask layer. A buffer layer is formed on the plurality of first mask patterns, and has an upper surface defining recesses between adjacent first mask patterns. Second mask patterns are formed within the recesses formed in the upper surface of the buffer layer. The buffer layer is partially removed to expose upper surfaces of the plurality of first mask patterns, and the buffer layer is then partially removed using the first mask patterns and the second mask patterns as an etch mask to expose the hardmask layer between the first mask pattern and the second mask pattern. Using the first mask patterns and the second mask patterns as an etch mask, the hardmask layer is etched to form hardmask patterns.

Abstract: A cleaning composition comprises an alkali solution, pure water, and a surfactant represented by the following chemical formula: R1-OSO3—HA+ wherein R1 is one selected from a group consisting of a butyl group, an isobutyl group, an isooctyl group, a nonyl phenyl group, an octyl phenyl group, a decyl group, a tridecyl group, a lauryl group, a myristyl group, a cetyl group, a stearyl group, an oleyl group, a licenoleyl group and a behnyl group, and A is one selected from a group consisting of ammonia, ethanol amine, diethanol amine and triethanol amine.

Abstract: A method for cleaning a substrate on which a silicon layer and a silicon germanium layer are formed and exposed, and method for fabricating a semiconductor device using the cleaning method are disclosed. The cleaning method comprises preparing a semiconductor substrate on which a silicon layer and a silicon germanium layer are formed and exposed; and performing a first cleaning sub-process that uses a first cleaning solution to remove a native oxide layer from the semiconductor substrate. The cleaning method further comprises performing a second cleaning sub-process on the semiconductor substrate after performing the first cleaning sub-process, wherein the second cleaning sub-process comprises using a second cleaning solution. In addition, the second cleaning solution comprises ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2), and deionized water (H2O), and the second cleaning solution comprises at least 200 times more deionized water (H2O) than ammonium hydroxide (NH4OH) by volume.

Abstract: In a method for manufacturing a semiconductor device, a silicon oxide layer is formed on a substrate. The silicon oxide layer is treated with a solution comprising ozone. Then, a conductive layer is formed on the silicon oxide layer treated with the solution.