Patents by Inventor Chang-Tae Kim

Chang-Tae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040041161
    Abstract: The present invention relates to a semiconductor LED device comprising a pumping layer with high light emitting efficiency and an active layer with smaller bandgap converting the absorbed light into any kinds of light of wavelength as required, which generates light from the AlGaInN pumping layer containing less In, projects the rays of light on the active layer containing more In, lets the required light of wavelength emit and decreases the blue shift caused by electric current, thereby increasing the light emitting efficiency and emitting lights with more than two wavelengths from one Led device. This invention enables to obtain various light of wavelength from one device and form the element through only one epitaxy process, thereby increasing reproductivity, yield, and efficiency by not using the fluorescent materials lowering the efficiency when forming white light.
    Type: Application
    Filed: June 12, 2003
    Publication date: March 4, 2004
    Inventor: Chang Tae Kim
  • Publication number: 20040007786
    Abstract: The present invention provides a semiconductor device with InxGa1-xN crystal passivation layer and manufacturing method thereof which effectively blocks the leakage current between the surface & boundary of a device and a pn-junction boundary, and enhances the light emission efficiency as forming new structural semiconductor devices by removing the conventional dielectric passivation layer and using InxGa1-xN crystal layer instead.
    Type: Application
    Filed: February 28, 2003
    Publication date: January 15, 2004
    Inventor: Chang-Tae Kim
  • Patent number: 6046064
    Abstract: Method for fabricating a compound semiconductor device including the steps of forming an active layer on a substrate, forming a plurality of ohmic electrodes on predetermined regions of the active layer, forming a mask material layer on the entire surface of the active layer inclusive of the ohmic electrodes, removing the mask material layer from predetermined regions thereof to open regions of the active layer between the ohmic electrodes and at least any one of the ohmic electrodes, etching the opened regions of the active layer each to a predetermined depth, and removing the mask material layer and forming a gate electrode on each of the opened regions of the active layer each having been etched to the predetermined depth, whereby the possibility of forming devices having threshold voltages different from one another on the same substrate allows application of the device of the present invention to variety of MMIC.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: April 4, 2000
    Assignee: LG Electronics Inc.
    Inventors: Chang-Tae Kim, Ki-Woong Chung
  • Patent number: 6043711
    Abstract: A gate bias circuit of a power amplifier FET, for maintaining a constant operating point, by changing a gate bias voltage, corresponding to a fluctuation of threshold voltage in the respective products of FET, has a construction at least one gate bias FET having a threshold voltage the same with a threshold voltage of the power amplifier FET and having a gate width narrower than a gate width of the power amplifier FET, the bias FET being connected to the gate power amplifier FET which is adapted to receive an input signal, for obtaining a constant current.
    Type: Grant
    Filed: April 6, 1998
    Date of Patent: March 28, 2000
    Assignee: LG Electronics, Inc.
    Inventor: Chang Tae Kim
  • Patent number: 5776805
    Abstract: Method for manufacturing a metal semiconductor field-effect transistor (MESFET) in which a gate area contacting a semiconductor surface is diminished and a gate cross area is increased, to improve frequency characteristics of a device is disclosed, including the steps of: forming an n-type GaAs layer and a heavily doped n.sup.+ -type GaAs layer on a substrate, sequentially; forming a first insulating layer on the heavily doped n.sup.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: July 7, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventor: Chang Tae Kim