Abstract: A magnetic random access memory (MRAM) is disclosed. In order to achieve high integration, the MRAM includes a word line formed in an active region of a semiconductor substrate, and used as a read line and a write line; a ground line and a lower read layer positioned on opposite sides of the active region of the semiconductor substrate; a seed layer contacting the lower read layer, and being overlapped with the upper portion of the word line; an MTJ cell contacting the upper portion of the seed layer at the upper portion of the word line; and a bit line contacting the MTJ cell, and crossing the word line in a vertical direction.

Abstract: A method for manufacturing a semiconductor device capable of performing a writing operation with a small amount of current by forming a thin oxide film on the surface a word line being used as a write line so as to reduce the distance between an MTJ cell and the word line includes the steps of forming a word line on a semiconductor substrate, wherein the word line is used as a write line, forming a planarized layer insulating film exposing the surface of the word line, forming a dielectric film on the surface of the word line, forming a seed layer connected to the word line through the dielectric film and configuring a cell on the top of the seed layer and in an upper portion of the word line.

Abstract: A memory device and a fabrication method therefor. In order to improve an operation property of a magnetic RAM (abbreviated as ‘MRAM’) having a higher speed than an SRAM, integration as high as a DRAM, and a property of a nonvolatile memory such as a flash memory, an oxide film is thinly formed on a second word line which is a write line, and an MTJ cell is formed according to a succeeding process. The MRAM is formed by reducing a distance between the write line and the MTJ cell. It is thus possible to perform a write operation with a small current.

Abstract: A magnetic random access memory (MRAM) is disclosed. In order to achieve high integration, the MRAM includes a word line formed in an active region of a semiconductor substrate, and used as a read line and a write line; a ground line and a lower read layer positioned on opposite sides of the active region of the semiconductor substrate; a seed layer contacting the lower read layer, and being overlapped with the upper portion of the word line; an MTJ cell contacting the upper portion of the seed layer at the upper portion of the word line; and a bit line contacting the MTJ cell, and crossing the word line in a vertical direction.

Abstract: A magnetic random access memory (RAM) is implemented by a gate electrode formed on an active region in a semiconductor substrate and being a word line used as a write line, a ground line formed in one side of the word line, a lower lead layer formed in the other side of the word line, a seed layer connected to the lower lead layer and overlapped with the word line, a magnetic tunnel junction (MTJ) cell made on the seed layer and located in an upper portion of the word line and an upper lead layer being a bit line formed connected to the MTJ cell.

Abstract: A method for manufacturing a semiconductor device capable of performing a writing operation with a small amount of current by forming a thin oxide film on the surface a word line being used as a write line so as to reduce the distance between an MTJ cell and the word line includes the steps of forming a word line on a semiconductor substrate, wherein the word line is used as a write line, forming a planarized layer insulating film exposing the surface of the word line, forming a dielectric film on the surface of the word line, forming a seed layer connected to the word line through the dielectric film and configuring a cell on the top of the seed layer and in an upper portion of the word line.

Abstract: A semiconductor device having a recessed silicon on insulator (SOI) structure includes an SOI substrate having a cell region, a peripheral region and a field region, the SOI substrate having a first semiconductor layer, an insulating layer on the first semiconductor layer, and a second semiconductor layer on the insulating layer, a trench in the field region of the second semiconductor layer, a device isolation film within the trench, a peripheral region recessed in the second semiconductor layer, and an active semiconductor device on the cell region and the peripheral region of the second semiconductor layer.

Abstract: An improved borderless contact structure and method of making the structure including a substrate with side walls formed on the side of the shallow trench. An insulator is formed over the side walls and in the remainder of the trench such that the insulator extends above an upper surface of the substrate. The side walls are formed of a first etch selection type and the insulator is formed of a second etch selection type.

Abstract: A semiconductor device having a plurality of transistors connected in series in a semiconductor substrate, the device includes first and second gate electrodes on the semiconductor substrate, a punch-through stop layer in the semiconductor substrate below the first gate electrode at a predetermined depth, and first, second, and third heavily doped impurity regions in the semiconductor substrate at both sides of the first and second gate electrodes.

Abstract: A two-layer buried oxide enables fabrication of a silicon-on-insulator MOSFET with thick-film source/drain regions and a thin-film channel region. After a hole has been etched in the substrate above a first buried oxide layer (i.e., in the upper substrate), oxygen is implanted to form a second buried layer within the substrate below the first buried layer (i.e., within the lower substrate). After a hole (aligned with the hole through the upper substrate) has been etched in the first buried layer, p-type dopants are implanted to form upper doped regions within the upper substrate to either side of the holes and a lower doped region within the lower substrate below the holes but above the second buried layer. An epitaxial layer roughly as thick as first buried layer is grown on the upper and lower substrates, a conformal insulating film is deposited onto the epitaxial layer, and a gate electrode is formed on the on the insulating film.

Abstract: A voice announcement technique for directly accessing a memory containing voice announcement data stored therein at the final output stage of the base station unit of a CT-2 digital cordless telephone system includes: a memory for storing voice announcement data therein; a conversion unit for converting voice announcement data received from the memory into a radio signal according to a CT-2 format, and for outputting the radio signal, a direct memory access control unit for accessing the data from the memory in a direct memory access manner when receiving a transfer request signal, and for sending the accessed data to a data bus, and an interface unit coupled between the conversion unit and the direct memory access control unit, the interface unit dividing the frequency of a direct memory access clock output from the conversion unit, and for generating the transfer request signal, while sending the data on the data bus to the conversion unit when the direct memory access control unit generates a transfer ackn