Memory device and method of fabrication thereof
A memory device and a fabrication method therefor. In order to improve an operation property of a magnetic RAM (abbreviated as ‘MRAM’) having a higher speed than an SRAM, integration as high as a DRAM, and a property of a nonvolatile memory such as a flash memory, an oxide film is thinly formed on a second word line which is a write line, and an MTJ cell is formed according to a succeeding process. The MRAM is formed by reducing a distance between the write line and the MTJ cell. It is thus possible to perform a write operation with a small current.
[0001] A magnetic random access memory (abbreviated as ‘MRAM’) is disclosed more specifically, an improved MRAM having a higher speed than an SRAM, integration density as high as a DRAM, and a property of a nonvolatile memory such as a flash memory is disclosed.
DESCRIPTION OF THE RELATED ART[0002] Most of the semiconductor memory manufacturing companies have developed the MRAM using a ferromagnetic material as one of the next generation memory devices.
[0003] The MRAM is a memory device for reading and writing information by forming multi-layer ferromagnetic thin films, and for sensing current variations according to a magnetization direction of the respective thin film. The MRAM has a high speed, low power consumption and allows high integration density by the special properties of the magnetic thin film, and performs a nonvolatile memory operation such as a flash memory.
[0004] The MRAM embodies a memory device by using a giant magneto resistive (abbreviated as ‘GMR’) phenomenon or a spin-polarized magneto-transmission (SPMT) generated when the spin influences electron transmission.
[0005] The MRAM using the GMR utilizes the phenomenon that resistance is remarkably varied when spin directions are different in two magnetic layers having a non-magnetic layer disposed therebetween in a GMR magnetic memory device.
[0006] The MRAM using the SPMT utilizes the phenomenon that larger current transmission is generated when spin directions are identical in two magnetic layers having an insulating layer therebetween in a magnetic permeable junction memory device.
[0007] However, MRAM research is still in its early stage, and mostly concentrated on the formation of multi-layer magnetic thin films, less on the researches on a unit cell structure and a peripheral sensing circuit.
[0008] FIG. 1 is a cross-sectional diagram illustrating a conventional MRAM. A gate electrode 33, namely a first word line is formed on a semiconductor substrate 31.
[0009] Source/drain junction regions 35a and 35b are formed on the semiconductor substrate 31 at both sides of the first word line 33. A ground line 37a and a first conductive layer 37b are formed to contact the source/drain junction regions 35a and 35b. Here, the ground line 37a is formed in a patterning process of the first conductive layer 37b.
[0010] Thereafter, a first interlayer insulating film 39 is formed to planarize the whole surface of the resultant structure, and a first contact plug 41 is formed to expose the first conductive layer 37b.
[0011] A second conductive layer which is a lower read layer 43 contacting the first contact plug 41 is patterned.
[0012] A second interlayer insulating film 45 is formed to planarize the whole surface of the resultant structure, and a second word line which is a write line 47 is formed on the second interlayer insulating film 45.
[0013] A third interlayer insulating film 48 is formed to planarize the upper portion of the second word line which is the write line 47. A second contact plug 49 is formed to contact the second conductive layer 43.
[0014] A seed layer 51 is formed into contact the second contact plug 49. Here, the seed layer 51 is formed to overlap between the upper portion of the second contact plug 49 and the upper portion of the write line 47.
[0015] Thereafter, a semi-ferromagnetic layer (not shown), a pinned ferromagnetic layer 55, a tunnel junction layer 57 and a free ferromagnetic layer 59 are stacked on the seed layer 51, thereby forming a magnetic tunnel junction (MTJ) cell 100 to have a pattern size as large as the write line 47 and to overlap the write line 47.
[0016] At this time, the semi-ferromagnetic layer prevents the magnetization direction of the pinned layer from being changed, and the magnetization direction of the tunnel junction layer 57 fixed to one direction. The magnetization direction of the free ferromagnetic layer 59 can be changed by external magnetic field, and information of ‘0’ or ‘1’ can be stored according to the magnetization direction of the free ferromagnetic layer 59.
[0017] A fourth interlayer insulating film 60 is formed over the resultant structure, and planarized to expose the free ferromagnetic layer 59. An upper read layer, namely a bit line 61 is formed to contact the free ferromagnetic layer 59.
[0018] FIG. 2 is a detailed cross-sectional diagram illustrating portion of FIG. 1.
[0019] Referring to FIG. 2, the second word line 47 and the seed layer 51 maintain an interval of ‘d’, and the pinned ferromagnetic layer 55, the tunnel junction layer 57 and the free ferromagnetic layer 59 are stacked on the seed layer 51, thereby forming the MTJ cell.
[0020] Here, ‘d’ is formed in the third interlayer insulating film 48, and has a size ranging from 1000 to 2000 Å.
[0021] As described above, the conventional memory device and fabrication method therefor have a disadvantage in that a distance between the seed layer 51 of the lower portion of the MTJ cell 100 of the MRAM and the second word line 47 positioned therebelow is high, and thus power consumption is increased in a write operation.
SUMMARY OF THE DISCLOSURE[0022] Accordingly, a memory device and a fabrication method therefor are disclosed which can perform a write operation with a small current by decreasing a distance between an MTJ cell and a second word line which is a write line.
[0023] A disclosed memory device comprises: a write line formed on a semiconductor substrate; an oxide film formed on the surface of the write line; a seed layer contacting the oxide film; and an MTJ cell contacting the upper portion of the seed layer, and being overlapped with the write line.
[0024] A disclosed method for fabricating a memory device comprises: forming a write line on a semiconductor substrate; forming an oxide film by oxidizing the surface of the write line; forming a seed layer to contact the oxide film on the write line; and forming an MTJ cell to contact the upper portion of the seed layer, being overlapped with the write line.
[0025] In a refinement, a write operation is performed with a small current by reducing a distance between the second word line which is a write line and the MTJ cell. The oxide film is formed with a thickness ranging from about 100 to about 500 Å by oxidizing the surface of the write line, or depositing an oxide film on the surface of the write line.
BRIEF DESCRIPTION OF THE DRAWINGS[0026] The disclosed devices and methods will become better understood with reference to the accompanying drawings which are given only by way of illustration and thus are not limitative of the disclosure, wherein:
[0027] FIG. 1 is a cross-sectional view illustrating sequential steps of a conventional method for fabricating a memory device;
[0028] FIG. 2 is a detailed view illustrating a portion of FIG. 1; and
[0029] FIG. 3 is a cross-sectional view illustrating a method for fabricating a memory device in accordance with the disclosure.
DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENTS[0030] A memory device and a fabrication method therefor in accordance with a preferred embodiment will now be described in detail with reference to the accompanying drawings.
[0031] FIG. 3 is a cross-sectional diagram illustrating a method for fabricating the memory device in accordance with a preferred embodiment.
[0032] Referring to FIG. 3, a second word line 101 is formed on the second interlayer insulating film 45 of FIG. 1 by patterning. Here, the second word line 101 is formed by using an element selected from the group consisting of tungsten, aluminum, copper and combinations thereof for easy surface oxidation.
[0033] Thereafter, a third interlayer insulating film 102 is formed and planarized to expose the second word line 101. Here, the third interlayer insulating film 102 is formed by using an insulating film having a low dielectric constant. The third interlayer insulating film 102 is formed to cover the second word line 101, and then evenly etched by a chemical mechanical polishing process, thereby exposing the second word line 101.
[0034] The exposed surface of the second word line 101 is oxidized to form an oxide film 103 having a thickness ranging from about 100 to about 500 Å. Here, the oxide film 103 is composed of an insulating film such as a nitride film or alumina. When the second word line 101 is formed with copper, the surface is hardly oxidized due to strong oxidation resistance of copper, and thus a CVD oxide film is preferable. The oxide film 103 has a different dielectric constant from a peripheral insulating film formed as an interlayer insulating film. The alumina has a higher dielectric constant than the general interlayer insulating film.
[0035] A seed layer 105 is formed on the second word line 101 including the oxide film 103, and an MTJ cell having a stacked structure of a pinned ferromagnetic layer 107, a tunnel junction layer 109 and a free ferromagnetic layer 111 is formed thereon.
[0036] Since the oxide film 103 is thinly formed, the write operation can be performed with a small current.
[0037] In another preferred embodiment, a planarized interlayer insulating film 120 exposing the oxide film 103 is formed after the formation process of the oxide film 103, and a seed layer 105 and an MTJ cell are formed on the resultant planarized structure.
[0038] As discussed earlier, the write operation can be performed with a small current by reducing the distance between the second word line and the MTJ cell, thereby improving the property of the device.
[0039] As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiment is not limited by any of the details of the foregoing description, unless otherwise specified, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the metes and bounds of the claims, or equivalences of such metes and bounds are therefore intended to be embraced by the appended claims.
Claims
1. A memory device comprising:
- a write line formed on a semiconductor substrate;
- an oxide film formed on a surface of the write line;
- a seed layer contacting the oxide film; and
- an MTJ cell contacting the seed layer, the seed layer being sandwiched between the oxide film and MTJ cell.
2. The device according to claim 1, wherein the oxide film is selected from the group consisting of alumina, nitride film, CVD oxide film, and combinations thereof.
3. The device according to claim 1, wherein the oxide film has a thickness ranging from about 100 to about 500 Å.
4. A method for fabricating a memory device, comprising the steps of:
- forming a write line on a semiconductor substrate;
- forming an oxide film by oxidizing a surface of the write line;
- forming a seed layer in contact with the oxide film; and
- forming an MTJ cell in contact with the seed layer.
5. The method according to claim 4, wherein the write line is selected from the group consisting of tungsten, aluminum, copper, and combinations thereof.
6. The method according to claim 4, wherein the oxide film has a thickness ranging from about 100 to about 500 Å.
7. The method according to claim 4, wherein the oxide film is selected from the group consisting of alumina, nitride film, CVD oxide film, and combinations thereof.
8. A memory device comprising:
- a semiconductor substrate;
- a write line disposed on the semiconductor substrate:
- an oxide film coating on top of the write line;
- a seed layer stacked on top of the oxide film; and
- a MTJ cell stacked on top of the seed layer.
9. The device according to claim 8, wherein the oxide film is selected from the group consisting of alumina, nitride film, CVD oxide film, and combinations thereof.
10. The device according to claim 8, wherein the oxide film has a thickness ranging from about 100 to about 500 Å.
Type: Application
Filed: Dec 27, 2001
Publication Date: Aug 15, 2002
Inventors: Chang Yong Kang (Kyoungki-do), Young Gwan Kim (Kyoungki-do)
Application Number: 10033013
International Classification: H01L029/94;