Patents by Inventor Chang-Yong Park
Chang-Yong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250103468Abstract: A system on chip comprises a first core cluster including a plurality of cores and executing a first virtual machine including a first debug client, and a second core cluster including a plurality of cores and executing a second virtual machine including a second debug client. A first core of the first core cluster and a second core of the second cluster execute a hypervisor at a first exception level and detect unusual operation cores in each cluster. The first core and second core execute the debug server at the first exception level and call the debug clients. The first core and second core execute the debug clients at a second exception level and output stack information of the unusual operation cores.Type: ApplicationFiled: June 10, 2024Publication date: March 27, 2025Inventors: Bo Youn Park, Chung Woo Park, Chang Yong Park, Gang Li, Lei Wang
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Patent number: 12056210Abstract: An AI-based pre-training model determination system is proposed. When determination type information is input, the AI-based pre-training model determination system extracts a candidate model among a plurality of learning models on the basis of determination type information, and the candidate model determines new training data. An uppermost candidate model whose determination accuracy is greater than or equal to a first reference value preset on the basis of the determination accuracy of the candidate model is determined as a pre-training model for generation of a new learning model, thereby improving the determination accuracy of the new learning model.Type: GrantFiled: August 19, 2019Date of Patent: August 6, 2024Assignee: LG ELECTRONICS INC.Inventors: Kyong Pil Tae, Young Wook Kim, Bong Su Cho, Chang Yong Park
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Patent number: 12051187Abstract: An AI-based new learning model generation system for vision inspection on a product production line is proposed. In the AI-based new learning model generation system, the candidate set extraction module extracts two or more candidate data sets on the basis of determination type information from among a plurality of training data sets that have been applied to learning of existing learning models previously generated for the vision inspection on the product production line. In addition, an additional set determination module calculates similarity between training images of new training data and a candidate data set, and determines any one greater than or equal to a reference value as an additional training data. In addition, the new model generation module may generate a new learning model by training the additional training data set and the new training data as a pre-training model.Type: GrantFiled: August 19, 2019Date of Patent: July 30, 2024Assignee: LG ELECTRONICS INC.Inventors: Kyong Pil Tae, Young Wook Kim, Chang Yong Park, Bong Su Cho
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Publication number: 20220245402Abstract: An AI-based pre-training model determination system is proposed. When determination type information is input, the AI-based pre-training model determination system extracts a candidate model among a plurality of learning models on the basis of determination type information, and the candidate model determines new training data. An uppermost candidate model whose determination accuracy is greater than or equal to a first reference value preset on the basis of the determination accuracy of the candidate model is determined as a pre-training model for generation of a new learning model, thereby improving the determination accuracy of the new learning model.Type: ApplicationFiled: August 19, 2019Publication date: August 4, 2022Applicant: LG ELECTRONICS INC.Inventors: Kyong Pil TAE, Young Wook KIM, Bong Su CHO, Chang Yong PARK
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Publication number: 20220222807Abstract: An AI-based new learning model generation system for vision inspection on a product production line is proposed. In the AI-based new learning model generation system, the candidate set extraction module extracts two or more candidate data sets on the basis of determination type information from among a plurality of training data sets that have been applied to learning of existing learning models previously generated for the vision inspection on the product production line. In addition, an additional set determination module calculates similarity between training images of new training data and a candidate data set, and determines any one greater than or equal to a reference value as an additional training data. In addition, the new model generation module may generate a new learning model by training the additional training data set and the new training data as a pre-training model.Type: ApplicationFiled: August 19, 2019Publication date: July 14, 2022Applicant: LG ELECTRONICS INC.Inventors: Kyong Pil TAE, Young Wook KIM, Chang Yong PARK, Bong Su CHO
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Publication number: 20200048498Abstract: The present invention relates to a chemical mechanical polishing slurry composition, and more specifically, to a chemical mechanical polishing slurry composition that can polish an insulating film such as a silicon nitride film or a metal film such as tungsten alone or simultaneously, and particularly, can easily control the polishing speed, and thus minimize an interlayer step difference of a semiconductor device by using a compound having a phosphate group as an agent for controlling polishing selectivity, and selectively using a tertiary amine compound together with the agent for controlling polishing selectivity, and a method for polishing a semiconductor substrate using the same.Type: ApplicationFiled: February 22, 2018Publication date: February 13, 2020Inventors: Hyejung Park, Mingun Lee, Chang Yong Park, Min-Sung Park, Sunghoon Jin, Goo-Hwa Lee, Jongdai Park, Jaehyun Kim
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Patent number: 10043678Abstract: The present invention relates to a slurry composition for reducing scratches generated when polishing the metal film in a manufacturing process of a semiconductor integrated circuit, by lowering frictional force so that a temperature of the composition which may rise during the polishing is lowered, the thermal stability of the slurry is improved and the size increase of particles in the slurry is suppressed, and a method for reducing scratches using the same. The method comprises the steps of applying a slurry composition for polishing a metal film to a substrate on which the metal film is formed, the slurry composition containing an organic solvent including a nitrogen atom and a glycol-based organic solvent; and making a polishing pad to be contacted to the substrate and moving the polishing pad with respect to the substrate, thereby removing at least part of the metal film from the substrate.Type: GrantFiled: October 21, 2014Date of Patent: August 7, 2018Assignee: DONGJIN SEMICHEM CO., LTD.Inventors: Chang Yong Park, Jong Dai Park, Jong Chul Shin, Jae Hyun Kim, Goo Hwa Lee, Min Sung Park
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Patent number: 9887164Abstract: A semiconductor package includes a semiconductor chip mounted on a substrate. The semiconductor package further includes an electromagnetic wave shielding member. The electromagnetic wave shielding member includes an upper surface and a plurality of side surfaces. The electromagnetic wave shielding member surrounds an upper surface and side surfaces of the semiconductor chip. The semiconductor package further includes a hooking member formed from a deformation of a lower end of one of the side surfaces of the electromagnetic wave shielding member. The hooking member is interposed between the semiconductor chip and the substrate to fix the electromagnetic wave shielding member.Type: GrantFiled: January 27, 2017Date of Patent: February 6, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Hoon Choi, Dong-Woo Shin, Chang-Yong Park
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Patent number: 9786624Abstract: A semiconductor package includes a substrate having a groove in an upper surface. A semiconductor device is mounted on the substrate to cover one portion of the groove and leaving another portion exposed.Type: GrantFiled: July 28, 2016Date of Patent: October 10, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-chan Lee, Chang-yong Park, Hun Han, Jae-hoon Choi
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Patent number: 9761519Abstract: A package substrate includes: a body layer; and a pattern layer formed on a surface of the body layer. The pattern layer includes: a wire pattern; a solder pad connected to the wire pattern; and a through hole adjacent to a boundary between the wire pattern and the solder pad and vertically penetrating the pattern layer. A semiconductor package and an electronic device are disclosed.Type: GrantFiled: May 14, 2016Date of Patent: September 12, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-hoon Choi, Chang-yong Park, Dong-woo Shin
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Publication number: 20170229400Abstract: A semiconductor package includes a semiconductor chip mounted on a substrate. The semiconductor package further includes an electromagnetic wave shielding member. The electromagnetic wave shielding member includes an upper surface and a plurality of side surfaces. The electromagnetic wave shielding member surrounds an upper surface and side surfaces of the semiconductor chip. The semiconductor package further includes a hooking member formed from a deformation of a lower end of one of the side surfaces of the electromagnetic wave shielding member. The hooking member is interposed between the semiconductor chip and the substrate to fix the electromagnetic wave shielding member.Type: ApplicationFiled: January 27, 2017Publication date: August 10, 2017Inventors: JAE-HOON CHOI, DONG-WOO SHIN, CHANG-YONG PARK
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Publication number: 20170084511Abstract: A semiconductor package includes a substrate having a groove in an upper surface. A semiconductor device is mounted on the substrate to cover one portion of the groove and leaving another portion exposed.Type: ApplicationFiled: July 28, 2016Publication date: March 23, 2017Inventors: Jae-chan Lee, Chang-yong Park, Hun Han, Jae-hoon Choi
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Publication number: 20160372412Abstract: A package substrate includes: a body layer; and a pattern layer formed on a surface of the body layer. The pattern layer includes: a wire pattern; a solder pad connected to the wire pattern; and a through hole adjacent to a boundary between the wire pattern and the solder pad and vertically penetrating the pattern layer. A semiconductor package and an electronic device are disclosed.Type: ApplicationFiled: May 14, 2016Publication date: December 22, 2016Inventors: Jae-hoon CHOI, Chang-yong PARK, Dong-woo SHIN
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Publication number: 20160247693Abstract: The present invention relates to a slurry composition for reducing scratches generated when polishing the metal film in a manufacturing process of a semiconductor integrated circuit, by lowering frictional force so that a temperature of the composition which may rise during the polishing is lowered, the thermal stability of the slurry is improved and the size increase of particles in the slurry is suppressed, and a method for reducing scratches using the same. The method comprises the steps of applying a slurry composition for polishing a metal film to a substrate on which the metal film is formed, the slurry composition containing an organic solvent including a nitrogen atom and a glycol-based organic solvent; and making a polishing pad to be contacted to the substrate and moving the polishing pad with respect to the substrate, thereby removing at least part of the metal film from the substrate.Type: ApplicationFiled: October 21, 2014Publication date: August 25, 2016Inventors: Chang Yong PARK, Jong Dai PARK, Jong Chul SHIN, Jae Hyun KIM, Goo Hwa LEE, Min Sung PARK
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Publication number: 20160111169Abstract: A memory test apparatus includes a test board unit including a first test board configured to load for testing a first memory system including a plurality of memory modules. A second test board is configured to load for testing a second memory system including a plurality of memory modules. A power unit comprises a first power supply unit configured to supply the first test board with a first power for testing the first memory system, a second power supply unit configured to supply the second test board with a second power for testing the second memory system, and a power supply control unit configured to control at least one of a supply timing of the first power and a supply timing of the second power.Type: ApplicationFiled: October 13, 2015Publication date: April 21, 2016Inventors: Min-woo Kim, Chang-ho Lee, Chang-yong Park, Bo-won Han
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Patent number: 7705449Abstract: A cooling apparatus for a circuit module having a substrate extending axially with an IC chip of a first type and IC chips of a second type mounted thereon, comprising: a first heat spreading element disposed to form a heat conduction path with the IC chip of the first type; and a second heat spreading element disposed to form a heat conduction path with the IC chips of the second type, wherein there is at least one IC chip of the second type mounted axially away from opposite sides of the IC chip of the first type, wherein the first type of IC chip is capable of generating a larger amount of heat than the second type of IC chips, and the first heat spreading element has a higher thermal conductivity than the second heat spreading element.Type: GrantFiled: September 27, 2006Date of Patent: April 27, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Joong Hyun Baek, Yong Hyun Kim, Kwang Ho Chun, Chang Yong Park, Hae Hyung Lee, Hee Jin Lee
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Patent number: 7675176Abstract: Provided are a semiconductor package and a module printed circuit board (PCB) for mounting the same. Each of the semiconductor package and the module PCB includes a substrate, a first-type pad structure disposed in a first region of the substrate, and a second-type pad structure disposed in a second region of the package substrate. The first-type pad includes a first conductive pad disposed on the package substrate and a first insulating layer coated on the package substrate. The first insulating layer has a first opening by which a portion of a sidewall of the first conductive pad is exposed, and partially covers the first conductive pad. The second-type pad includes a second insulating layer coated on the package substrate to have a second opening and a second conductive pad disposed on the package substrate in the second opening to have an exposed sidewall.Type: GrantFiled: December 31, 2007Date of Patent: March 9, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Chang-Yong Park, Kwang-Ho Chun, Dong-Chun Lee, Yong-Hyun Kim
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Patent number: 7606035Abstract: Provided are a heat sink and a memory module using the heat sink. In one embodiment, the heat sink includes a first and second guide pin respectively disposed in first and second heat spreaders placed around an object to be cooled. The first and second guide pins help prevent misalignment problems from occurring between the first and second heat spreaders, as well, as helping prevent the first and second heat spreaders from contacting each other when the first and second heat spreaders are pressed by pressure applied from the outside.Type: GrantFiled: September 21, 2007Date of Patent: October 20, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chang-Yong Park, Yong-Hyun Kim, Kwang-Ho Chun, Hyun-Jong Oh
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Patent number: 7518873Abstract: A heat spreader includes a heat sinking plate and a pressure clip. The heat sinking plate radiates the heat away from a heat source. The pressure clip fixes the heat sinking plate to the heat source. The pressure clip includes a spine (pressing part), one or more ribs and hook parts. The spine is arranged on the heat sinking plate. The one or more ribs extend from the spine and contact the heat source. The hook parts extend from the spine and are supported by the heat source. The pressure clip further includes mounting parts that couple the spine to the hook parts. A bending space is formed between the spine and the heat sinking plate. The heat spreader may be attached to a printed circuit board (PCB) with, e.g., a one-touch method, so that assembling processes of the memory module may be automated.Type: GrantFiled: July 6, 2006Date of Patent: April 14, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Chang-Yong Park, Hyun-Jong Oh, Yong-Hyun Kim, Dong-Woo Shin, Kyung-Du Kim, Dong-Chun Lee, Kwang-Ho Chun
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Publication number: 20080289356Abstract: The invention is an apparatus for producing an ice vessel, in which the lumps of ice spread uniformly so that each portion of the vessel can be molded uniformly. The invention includes a main body (20), upper mold and lower mold (24 and 26) mounted to the main body (20) and having convex portion (22) and concave portion (23) of shape of the ice vessel respectively so as to mold the ice vessel (18) by coupling the upper mold (24) or the lower mold (26) and pressing lumps of ice (2) poured into the molds (22 and 24), pushers (32 and 34) liftably mounted to the convex portion (22) of the upper mold (24), and resilient members (36 and 38) mounted to press the pushers (32 and 34) downward, wherein when the upper and lower molds (24 and 26) are coupled with each other, the pushers (32 and 34) push the lumps of ice (2) laterally in the concave portion (23) of the lower mold (26) so that the lumps of ice (2) are uniformly dispersed.Type: ApplicationFiled: November 3, 2006Publication date: November 27, 2008Inventor: Chang Yong Park