Patents by Inventor Chang-Yong Park

Chang-Yong Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080289356
    Abstract: The invention is an apparatus for producing an ice vessel, in which the lumps of ice spread uniformly so that each portion of the vessel can be molded uniformly. The invention includes a main body (20), upper mold and lower mold (24 and 26) mounted to the main body (20) and having convex portion (22) and concave portion (23) of shape of the ice vessel respectively so as to mold the ice vessel (18) by coupling the upper mold (24) or the lower mold (26) and pressing lumps of ice (2) poured into the molds (22 and 24), pushers (32 and 34) liftably mounted to the convex portion (22) of the upper mold (24), and resilient members (36 and 38) mounted to press the pushers (32 and 34) downward, wherein when the upper and lower molds (24 and 26) are coupled with each other, the pushers (32 and 34) push the lumps of ice (2) laterally in the concave portion (23) of the lower mold (26) so that the lumps of ice (2) are uniformly dispersed.
    Type: Application
    Filed: November 3, 2006
    Publication date: November 27, 2008
    Inventor: Chang Yong Park
  • Publication number: 20080157389
    Abstract: Provided are a semiconductor package and a module printed circuit board (PCB) for mounting the same. Each of the semiconductor package and the module PCB includes a substrate, a first-type pad structure disposed in a first region of the substrate, and a second-type pad structure disposed in a second region of the package substrate. The first-type pad includes a first conductive pad disposed on the package substrate and a first insulating layer coated on the package substrate. The first insulating layer has a first opening by which a portion of a sidewall of the first conductive pad is exposed, and partially covers the first conductive pad. The second-type pad includes a second insulating layer coated on the package substrate to have a second opening and a second conductive pad disposed on the package substrate in the second opening to have an exposed sidewall.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 3, 2008
    Inventors: Chang-Yong Park, Kwang-Ho Chun, Dong-Chun Lee, Yong-Hyun Kim
  • Publication number: 20080074848
    Abstract: Provided are a heat sink and a memory module using the heat sink. In one embodiment, the heat sink includes a first and second guide pin respectively disposed in first and second heat spreaders placed around an object to be cooled. The first and second guide pins help prevent misalignment problems from occurring between the first and second heat spreaders, as well, as helping prevent the first and second heat spreaders from contacting each other when the first and second heat spreaders are pressed by pressure applied from the outside.
    Type: Application
    Filed: September 21, 2007
    Publication date: March 27, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chang-Yong PARK, Yong-Hyun KIM, Kwang-Ho CHUN, Hyun-Jong OH
  • Publication number: 20080044951
    Abstract: A semiconductor package may include a substrate having external contact terminals. A semiconductor chip having bonding pads may be formed on the substrate. Conductive bumps may connect the external contact terminals of the substrate to the bonding pads of the semiconductor chip. An underfill may be interposed between the substrate and the semiconductor chip. The underfill may include a first underfill region composed of a first material adjacent to the semiconductor chip and a second underfill region composed of a second material adjacent to the substrate, the first material having a higher glass transition temperature than the second material.
    Type: Application
    Filed: June 15, 2007
    Publication date: February 21, 2008
    Inventors: Hyo-jae Bang, Dong-chun Lee, Seong-chan Han, Chang-yong Park, Hun Han
  • Publication number: 20070161224
    Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.
    Type: Application
    Filed: March 16, 2007
    Publication date: July 12, 2007
    Inventors: Chang-Yong Park, Byung-Man Kim, Dong-Chun Lee, Yong-Hyun Kim, Kwang-Seop Kim, Dong-Woo Shin, Kwang-Ho Chun
  • Patent number: 7215026
    Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: May 8, 2007
    Assignee: Samsung Electonics Co., Ltd
    Inventors: Chang-Yong Park, Byung-Man Kim, Dong-Chun Lee, Yong-Hyun Kim, Kwang-Seop Kim, Dong-Woo Shin, Kwang-Ho Chun
  • Publication number: 20070069378
    Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.
    Type: Application
    Filed: November 28, 2006
    Publication date: March 29, 2007
    Inventors: Chang-Yong Park, Byung-Man Kim, Dong-Chun Lee, Yong-Hyun Kim, Kwang-Seop Kim, Dong-Woo Shin, Kwang-Ho Chun
  • Patent number: 7172106
    Abstract: A printed circuit board that can be connected with a pin connector and a method of manufacturing the printed circuit board are provided. Solidified solder can be formed on the tap unit without the need for additional processes, by applying solder printing to the tap unit at the same time it is applied to pads of the printed circuit board and, for example, by performing high temperature reflow. In addition, reliability and reduction in cost of a pin connector can be ensured without using a pin connector into which a high-priced wired solder is inserted. Rather a general pin connector can be used because the pin connector and the tap unit are connected to each other through the solidified solder formed on the tap unit.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: February 6, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Soo Choi, Byung-Man Kim, Joung-Rhang Lee, Chang-Yong Park
  • Publication number: 20070008703
    Abstract: A heat spreader includes a heat sinking plate and a pressure clip. The heat sinking plate radiates the heat away from a heat source. The pressure clip fixes the heat sinking plate to the heat source. The pressure clip includes a spine (pressing part), one or more ribs and hook parts. The spine is arranged on the heat sinking plate. The one or more ribs extend from the spine and contact the heat source. The hook parts extend from the spine and are supported by the heat source. The pressure clip further includes mounting parts that couple the spine to the hook parts. A bending space is formed between the spine and the heat sinking plate. The heat spreader may be attached to a printed circuit board (PCB) with, e.g., a one-touch method, so that assembling processes of the memory module may be automated.
    Type: Application
    Filed: July 6, 2006
    Publication date: January 11, 2007
    Inventors: Chang-Yong Park, Hyun-Jong Oh, Yong-Hyun Kim, Dong-Woo Shin, Kyung-Du Kim, Dong-Chun Lee, Kwang-Ho Chun
  • Publication number: 20060231949
    Abstract: In one embodiment, a semiconductor module includes at least one semiconductor chip package, a board having functional pads and dummy pads, and at least one solder joint electrically connecting the semiconductor chip package and one of the functional pads of the board. Furthermore, at least one supporting solder bump is formed on one of the dummy pads and disposed under a portion of the semiconductor chip package. For example, the supporting solder bump may be disposed under a peripheral area of the semiconductor chip package.
    Type: Application
    Filed: October 11, 2005
    Publication date: October 19, 2006
    Inventors: Chang-Yong Park, Byung-Man Kim, Dong-Chun Lee, Yong-Hyun Kim, Kwang-Seop Kim, Dong-Woo Shin, Kwang-Ho Chun
  • Publication number: 20060228878
    Abstract: A lower-melting-point solder having a lower melting point than solder balls is used to bond the solder balls with a module substrate. The lower-melting-point solder has a melting point lower than the solder balls. A bonding temperature is at a temperature between the melting point of the lower-melting-point solder and the melting point of the solder balls.
    Type: Application
    Filed: March 24, 2006
    Publication date: October 12, 2006
    Inventors: Chang-Yong Park, Kyung-Du Kim, Kwang-Ho Chun, Byung-Man Kim, Yong-Hyun Kim, Hyun-Jong Oh
  • Patent number: 7005735
    Abstract: The array printed circuit board includes at least one circuit board having a first surface. A first layout of first and second chip mounting regions is formed on a first half of the first surface and a second layout of first, and second chip mounting regions is formed on a second half of the first surface. The first and second layouts have opposite first and second chip mounting region patterns.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: February 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chang-Yong Park, Byung-Man Kim, Jong-Soo Choi, Kwang-Ho Chun, Se-Hyung Ryu
  • Publication number: 20040238932
    Abstract: The array printed circuit board includes at least one circuit board having a first surface. A first layout of first and second chip mounting regions is formed on a first half of the first surface and a second layout of first, and second chip mounting regions is formed on a second half of the first surface. The first and second layouts have opposite first and second chip mounting region patterns.
    Type: Application
    Filed: February 11, 2004
    Publication date: December 2, 2004
    Inventors: Chang-Yong Park, Byung-Man Kim, Jong-Soo Choi, Kwang-Ho Chun, Se-Hyung Ryu
  • Publication number: 20040222016
    Abstract: A printed circuit board that can be connected with a pin connector and a method of manufacturing the printed circuit board are provided. Solidified solder can be formed on the tap unit without the need for additional processes, by applying solder printing to the tap unit at the same time it is applied to pads of the printed circuit board and, for example, by performing high temperature reflow. In addition, reliability and reduction in cost of a pin connector can be ensured without using a pin connector into which a high-priced wired solder is inserted. Rather a general pin connector can be used because the pin connector and the tap unit are connected to each other through the solidified solder formed on the tap unit.
    Type: Application
    Filed: December 29, 2003
    Publication date: November 11, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jong-Soo Choi, Byung-Man Kim, Joung-Rhang Lee, Chang-Yong Park
  • Patent number: 6259751
    Abstract: A circuit for removing interference in a digital communications system includes: a signal processing unit for receiving a given signal and limiting the band of the signal, thereby distributing the signal to be outputted; a local oscillator for producing a carrier wave signal to be outputted; a signal mixer for receiving the signal outputted from the processing unit and the carrier wave signal outputted from the local oscillator and mixing the two signals for output; an A/D converter for receiving the mixed signal outputted from the signal mixer and converting the mixed signal into a digital signal to be outputted; an equalizer for receiving the converted signal outputted from said A/D converter and compensating for distortion of the converted signal to be outputted; and a signal restoring unit for receiving the distortion-compensated signal outputted from the equalizer, detecting the phase of the distortion-compensated signal and restoring the signal to an original signal.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: July 10, 2001
    Assignee: SamSung Electronics Co., Ltd.
    Inventors: Chang-Yong Park, Kyoung-Whoan Suh