Abstract: The present invention provides a composition for developing a photoresist containing a carboxyl group (—COOH) and a method of developing a photoresist using the composition. The composition includes: a first solution including a salt containing a monovalent cationic component; and a second solution including a salt containing a bivalent cationic component. The composition for photoresist development is advantageous in that the developing depth of a photoresist can be controlled, and the developed surface of a photoresist is flat, thereby enabling the photoresist to be developed to realize precise three-dimensional packaging.

Abstract: A method for forming bumps and a substrate including the bumps. The method includes: coating a solder resist on a substrate and electrodes formed on the substrate: performing laser etching treatment on the solder resist to form openings for forming bumps; printing a composition for forming bumps in the openings for forming bumps; and performing a reflowing process. Accordingly, the method can decrease the number of processes and realize a fine bump pitch of 90 ?m or less at the time of forming bumps. Further, the method can also decrease the number of times that alignment is performed, due to the decrease in the number of processes.

Abstract: The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided.

Abstract: The preferred embodiment of the present invention can prevent signal distortions such as stress, or the like, occurring at the time of power delivery due to the difference in the lengths of the metal wires for electrically connecting each of the plurality of semiconductor chips formed on the dual die package substrate.

Abstract: The present invention provides a composition for developing a photoresist containing a carboxyl group (—COOH) and a method of developing a photoresist using the composition. The composition includes: a first solution including a salt containing a monovalent cationic component; and a second solution including a salt containing a bivalent cationic component. The composition for photoresist development is advantageous in that the developing depth of a photoresist can be controlled, and the developed surface of a photoresist is flat, thereby enabling the photoresist to be developed to realize precise three-dimensional packaging.

Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same, including: forming a protective layer on which a cover film is stacked on a base substrate; exposing the protective layer on which the cover film is stacked to photosensitize the protective layer and photodegrade the cover film; and developing the photodegraded cover film and the photosensitized protective layer to form an opening exposing a pad unit of a circuit layer which is an outermost layer of the base substrate on the protective layer, whereby the productivity of the printed circuit board can be improved without performing a process of separating a cover film.

Abstract: The present invention relates to a package substrate, a method for manufacturing the same, and a package on package substrate. In accordance with an embodiment of the present invention, a package substrate including: an inner insulating layer; a circuit pattern layer formed on the inner insulating layer; an outer insulating layer formed on the inner insulating layer to protect the circuit pattern layer and expose portions of external and internal patterns of the circuit pattern layer; a mixed pattern layer consisting of post bumps and outermost layer patterns formed on the portions of the internal and external patterns exposed by the outer insulating layer; and a resist layer formed on the outer insulating layer to protect the outermost layer patterns of the mixed pattern layer and expose the outermost layer patterns by an open region.

Abstract: The present invention relates to a basket jig for an electroless plating apparatus and an electroless plating method. A basket jig for an electroless plating apparatus in accordance with the present invention includes a basket loaded thereon a plurality of printed circuit boards, a rotating structure coupled to top portions of both sides of the basket and a tube in a shape of a rectangular plate coupled to bottom portions of the basket.

Abstract: There is provided a method of forming a gold thin film, the method including: forming a nickel plating layer on a surface of an object through electroless nickel (Ni) plating; forming a palladium-copper mixture plating layer on the nickel plating layer through electroless plating using a palladium-copper (Pd—Cu) mixture; and forming a first gold thin film by immersing the palladium-copper mixture plating layer in a gold (Au) galvanic electrolytic liquid to replace a portion of copper (Cu) particles in the palladium-copper mixture plating layer with gold particles through a replacement reaction.

Abstract: The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided.

Abstract: Disclosed herein is a flat dam formed in a package region of an insulation layer provided on a board to limit movement of an underfill and made of the hydrophobic material including any one of or at least two of perfluorooctyl acrylate (PFAC), polypropylene, polytetrafluoroethylene (PTFE), and fluorine compound.

Abstract: Disclosed herein is a method for manufacturing a printed circuit board for forming a solder resist of an outermost layer having a step structure by performing laser machining or exposing and developing processes.

Abstract: A method of manufacturing a printed circuit board, including: applying a conductive paste including carbon nanotubes and a photosensitive binder on a bump-forming area of a circuit substrate having a circuit layer for transferring electrical signals; and patterning the conductive paste, thus forming bumps.

Abstract: This invention relates to an etching solution including hydrogen peroxide, sulfuric acid, chlorine ions, benzotriazole and pyrazole, and to a method of manufacturing a printed wiring substrate wherein the surface of the metal wiring of the printed wiring substrate is treated with an alkali solution, roughened using the etching solution and then subjected to anti-rust treatment, thus forming porous surface irregularities and micro anchors even with a small etching amount of the metal (Cu) to thereby obtain a high force of adhesion between the metal and an insulating material.

Abstract: Disclosed herein are a printed circuit substrate and a method of manufacturing the same. The printed circuit substrate includes an insulating layer, and a circuit layer that includes a circuit pattern disposed on the insulating layer and a barrier layer that is disposed to cover at least one surface of the circuit pattern and suppresses electrochemical migration from the circuit pattern, thereby making it possible to achieve high-density and secure reliability, and the method of manufacturing the same.

Abstract: A method of manufacturing a cooling fin and package substrate that includes preparing a mold, which has a support base and a resin layer formed on the support base and including on a side thereof a groove, which is configured to form a cooling fin; printing fireable paste containing a carbon component on a side of the mold that has the groove configured to form a cooling fin; removing the support base to leave a cooling object; and firing the cooling object.

Abstract: Disclosed herein are a method for forming bumps and a substrate including the bumps. The method includes: coating a solder resist on a substrate and electrodes formed on the substrate: performing laser etching treatment on the solder resist to form openings for forming bumps; printing a composition for forming bumps in the openings for forming bumps; and performing a reflowing process. The present invention can decrease the number of processes and realize a fine bump pitch of 90 ?m or less at the time of forming bumps. Further, the present invention can also decrease the number of times that alignment is performed, due to the decrease in the number of processes.

Abstract: A printed circuit board and a method of manufacturing the printed circuit board, in which the printed circuit board includes an insulating layer, a circuit layer embedded in the insulating layer and having a connection pad that is embedded in the insulating layer such that one side of the connection pad is flush with a surface of the insulating layer, and insulating materials configured to protect the circuit layer from an external environment and having an opening through which the connection pad is exposed. The printed circuit board is made slim, and reliability and the degree of design freedom are increased.

Abstract: Disclosed herein are a multi-layer printed circuit board and a method of manufacturing the same. In the multi-layer printed circuit board and the method of manufacturing the same, circuit layers formed in a plurality of insulating layers are electrically interconnected through vias formed in a lump, thereby making it possible to secure bonding reliability of an interlayer circuit layer and more stably secure performance of the printed circuit board. In addition, since a stacked type via structure may be implemented by performing a via hole drilling process, a desmear process, and a copper plating process only one time after an insulating layer and an circuit layer are stacked, a manufacturing process, a manufacturing time, and manufacturing costs of the stacked type via structure may be reduced.

Abstract: The preferred embodiment of the present invention can prevent signal distortions such as stress, or the like, occurring at the time of power delivery due to the difference in the lengths of the metal wires for electrically connecting each of the plurality of semiconductor chips formed on the dual die package substrate.