Patents by Inventor Chang Sup Ryu

Chang Sup Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110303636
    Abstract: A method of manufacturing a mounting substrate, the method including: providing an insulation layer, the insulation layer having a circuit pattern formed in one side thereof; forming at least one bonding pad in the other side of the insulation layer, the bonding pad electrically connected with the circuit pattern; and etching the bonding pad such that a surface of the bonding pad is recessed from a surface of the insulation layer by a predetermined depth.
    Type: Application
    Filed: August 22, 2011
    Publication date: December 15, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin-Yong Ahn, Chang-Sup Ryu, Byung-Youl Min, Myung-Sam Kang
  • Publication number: 20110253431
    Abstract: Disclosed herein are a printed circuit substrate and a method of manufacturing the same. The printed circuit substrate includes an insulating layer, and a circuit layer that includes a circuit pattern disposed on the insulating layer and a barrier layer that is disposed to cover at least one surface of the circuit pattern and suppresses electrochemical migration from the circuit pattern, thereby making it possible to achieve high-density and secure reliability, and the method of manufacturing the same.
    Type: Application
    Filed: June 22, 2010
    Publication date: October 20, 2011
    Applicants: SNU R&DB FOUNDATION, SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Hyung Wook Park, Young Chang Joo, Hong Seok Min, Young Gwan Ko, Chang Sup Ryu, Ho Young Lee, Shin Bok Lee, Min Suk Jung
  • Patent number: 8039174
    Abstract: Through holes for flow paths of the fuel cell are formed in a thermoplastic polymer film by a process selected from a group consisting of laser drilling, etching and lithography, an inner side surface of the thermoplastic polymer film is coated with a metal layer, and the through holes are filled with a fuel diffusion material and a catalyst to provide an anode. The procedure is repeated to provide a cathode. Then, the anode and the cathode are placed to oppose each other. A cation conducting polymer membrane is disposed, between the anode and the cathode, and the anode, the cation conducting polymer membrane and the cathode are hot-pressed.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: October 18, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hye Yeon Cha, Tae Hoon Kim, Chang Sup Ryu, Sam Jin Her, Sung Han Kim
  • Patent number: 8022553
    Abstract: A mounting substrate and a method of manufacturing the mounting substrate. The mounting substrate can include an insulation layer, a bonding pad buried in one side of the insulation layer in correspondence with a mounting position of a chip, and a circuit pattern electrically connected to the bonding pad. By utilizing certain embodiments of the invention, the process for stacking a solder resist layer can be omitted, as the bonding pads can be implemented in a form recessed from the surface of the insulation layer. In this way, the manufacturing process can be simplified and manufacturing costs can be reduced. Since the surface of the mounting-substrate on which to mount a chip can be kept flat without any protuberances, the occurrence of voids in the underfill can be minimized. This is correlated to obtaining a high degree of reliability, and leads to a greater likelihood of successful mounting.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: September 20, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin-Yong Ahn, Chang-Sup Ryu, Byung-Youl Min, Myung-Sam Kang
  • Publication number: 20110221074
    Abstract: A board on chip package including a photo solder resist having a cavity and a pattern on one side, the pattern corresponding to a circuit wire; a solder ball pad accommodated in the cavity; a circuit wire electrically connected with the solder ball pad, and formed on the other side of the photo solder resist; a semiconductor chip mounted on the solder ball pad by a flip chip bonding; and a passivation material to mold the semiconductor chip.
    Type: Application
    Filed: May 17, 2011
    Publication date: September 15, 2011
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung-Sam Kang, Chang-Sup Ryu, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
  • Patent number: 8003439
    Abstract: A method of manufacturing a board on chip package including laminating a dry film on a carrier film, one side of which is laminated by a thin metal film; patterning the dry film in accordance with a circuit wire through light exposure and developing process, and forming a solder ball pad and a circuit wire; removing the dry film; laminating an upper photo solder resist excluding a portion where the solder ball pad is formed; etching the thin metal film formed on a portion where the upper photo solder resist is not laminated; mounting a semiconductor chip on the solder ball pad by a flip chip bonding; molding the semiconductor chip with a passivation material; removing the carrier film and the thin metal film; and laminating a lower photo solder resist under the solder ball pad. The board on chip package provides a high density circuit since a circuit pattern is formed using a seed layer.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: August 23, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myung-Sam Kang, Chang-Sup Ryu, Jung-Hyun Park, Hoe-Ku Jung, Ji-Eun Kim
  • Publication number: 20110197409
    Abstract: A method of fabricating a cavity capacitor embedded in a printed circuit board including two conductive layers to be used as a power layer and a ground layer, respectively, and a first dielectric layer, placed between the two conductive layers, the method including: removing an upper conductive layer and the first dielectric layer excluding a lower conductive layer of the two conductive layers to allow a cavity to be formed between the two conductive layers, the lower conductive layer being supposed to be used as any one of electrodes of the cavity capacitor; stacking a dielectric material on the cavity to allow a second dielectric layer having a lower stepped portion than the first dielectric layer to be formed in the cavity; and stacking a conductive material on an upper part of the second dielectric layer and side parts of the cavity to allow the upper conductive layer to be used as the other electrode of the cavity capacitor.
    Type: Application
    Filed: April 20, 2011
    Publication date: August 18, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Han Kim, Je-Gwang Yoo, Chang-Sup Ryu
  • Patent number: 7983055
    Abstract: A printed circuit board having an embedded cavity capacitor is disclosed. According to an embodiment of the present invention, the printed circuit board having the embedded cavity capacitor, the printed circuit board can include two conductive layers to be used as a power layer and a ground layer, respectively; and a first dielectric layer, placed between the two conductive layers, wherein at least one cavity capacitor is arranged in a noise-transferable path between a noise source and a noise prevented destination which are placed on the printed circuit board, the cavity capacitor being formed to allow a second dielectric layer to have a lower stepped region than the first dielectric layer, the second dielectric layer using the two conductive layers as a first electrode and a second electrode, respectively, and placed between the first electrode and the second electrode.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 19, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Je-Gwang Yoo, Chang-Sup Ryu
  • Patent number: 7973248
    Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: July 5, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
  • Publication number: 20110147724
    Abstract: There is provided an organic thin film transistor and a method of manufacturing the same. The organic thin film transistor includes: an insulating substrate on which a plurality of barrier ribs and a plurality of grooves partitioned by the barrier ribs are formed; source and drain electrodes each formed on the grooves spaced apart from each other among the plurality of grooves; a gate electrode formed on the groove between the source and drain electrodes; an opening formed by etching the barrier ribs between the source electrode and the gate electrode and between the gate electrode and the drain electrode; a gate insulating film formed on the opening; and an organic semiconductor layer formed on the gate insulating film. The organic thin film transistor is capable of mass production and has excellent electrical characteristics.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 23, 2011
    Applicants: SAMSUNG ELECTRO-MECHANICS CO., LTD., SUNGKYUNKWAN UNIVERSITY Foundation for Corporate Collaboration
    Inventors: Sang Won HA, Il Sub Chung, Jin Hee Heo, Kyo Hyeok Kim, Jung Min Kwon, Kyu Hag Eum, Sang Il Yim, Chang Sup Ryu
  • Patent number: 7943864
    Abstract: In accordance with an embodiment, the printed circuit board, having an analog circuit and a digital circuit includes: a first metal layer and a second metal layer, one of the first metal layer and the second metal layer being a power layer and the other being a ground layer; a third metal layer, layer-built between the first metal layer and the second metal layer; and a mushroom type structure including a via connected to a metal plate, the metal plate being arranged in a space between circuit patterns of the third metal layer.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: May 17, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Hak-Sun Kim, Chang-Sup Ryu
  • Publication number: 20110079349
    Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.
    Type: Application
    Filed: December 17, 2009
    Publication date: April 7, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Suk Hyeon Cho, Chang Sup Ryu, Jin Yong An, Soon Oh Jung, Sung Won Jeong, Byung Moon Kim, Dong Ju Jeon, Seok Kyu Lee, Jin Ho Kim
  • Publication number: 20110061907
    Abstract: A printed circuit board according to an aspect of the invention may include: a board portion having an electrode portion provided on a surface thereof; a solder resist layer provided on the surface of the board portion and having an opening therein to expose the electrode portion to the outside; and a bump layer having the same diameter as the opening and providing an electrical connection with an external chip component.
    Type: Application
    Filed: December 22, 2009
    Publication date: March 17, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myung Sam Kang, Chang Sup Ryu
  • Patent number: 7901985
    Abstract: A manufacturing method of a package on package with a cavity. The method can include forming a first upper substrate cavity in one side of an upper substrate; mounting an upper semiconductor chip on the other side of the upper substrate; forming a lower substrate cavity in one side of a lower substrate; mounting a lower semiconductor chip in the lower substrate cavity formed in the lower substrate; and stacking the upper substrate above the lower substrate such that the first upper substrate cavity accommodates a part of the lower semiconductor chip. The package on package and a manufacturing method thereof can reduce the overall thickness of the package by forming cavities in both upper and lower substrates to accommodate a semiconductor chip mounted in the lower substrate.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: March 8, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Chang-Sup Ryu, Dong-Jin Park
  • Publication number: 20110039076
    Abstract: An optical wiring board having a core, the optical wiring board including: a lower cladding; a side cladding formed over the lower cladding and having an indentation formed therein, the indentation being in correspondence with the core; a core embedded in the indentation; and an upper cladding covering the core, wherein a height of the core is different from a depth of the indentation
    Type: Application
    Filed: October 19, 2010
    Publication date: February 17, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Joon-Sung Kim, Je-Gwang Yoo, Chang-Sup Ryu, Han-Seo Cho, Sang-Hoon Kim
  • Publication number: 20110026234
    Abstract: A printed circuit board and an electronic product are disclosed. In accordance with an embodiment of the present invention, the printed circuit board includes a first board, which has an electronic component mounted thereon, and a second board, which is positioned on an upper side of the first board and covers at least a portion of an upper surface of the first board and in which an EBG structure is inserted into the second board such that a noise radiating upwards from the first board is shielded. Thus, the printed circuit board can readily absorb various frequencies, be easily applied without any antenna effect and be cost-effective in manufacturing.
    Type: Application
    Filed: December 22, 2009
    Publication date: February 3, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Han Kim, Chang-Sup Ryu
  • Publication number: 20110018123
    Abstract: The present invention relates to a semiconductor package and a method of manufacturing the same. The semiconductor package may include: an insulator that has first and second opening parts; an active element that is disposed inside the first opening part; a passive element that is disposed inside the second opening part; a protective member that is disposed at a lower part of the insulator and covers a lower part of the passive element; a build-up layer that is disposed on the insulator and electrically connected to the active element; and an external connection unit that is electrically connected to the build-up layer.
    Type: Application
    Filed: November 16, 2009
    Publication date: January 27, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Yong An, Chang Sup Ryu
  • Patent number: 7859106
    Abstract: A core substrate using paste bumps, the core substrate including a first paste bump board having a plurality of first paste bumps joined to a surface thereof; a second paste bump board having a plurality of second paste bumps facing the first paste bumps joined thereto; and an insulation element placed between the first paste bump board and the second paste bump board. In the core substrate, the first paste bumps and the second paste bumps are electrically interconnected.
    Type: Grant
    Filed: October 6, 2009
    Date of Patent: December 28, 2010
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
  • Publication number: 20100230146
    Abstract: Disclosed herein is a circuit layer including CNTs including an electroless copper plating layer formed on an insulating layer, and a CNT layer deposited on the electroless copper plating layer, thus the circuit layer has excellent electrical properties.
    Type: Application
    Filed: August 20, 2009
    Publication date: September 16, 2010
    Inventors: Eung Suek LEE, Je Gwang Yoo, Chang Sup Ryu, Jun Oh Hwang, Jee Soo Mok
  • Publication number: 20100212951
    Abstract: An EMI noise reduction board using an electromagnetic bandgap structure is disclosed. In the EMI noise reduction board according to an embodiment of the present invention, an electromagnetic bandgap structure having band stop frequency properties can be inserted into an inner portion of the board so as to shield an EMI noise, in which the portion corresponds to an edge of the board and in which the EMI noise is conducted from the inside to the edge of the board and radiates to the outside of the board.
    Type: Application
    Filed: December 31, 2009
    Publication date: August 26, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Han Kim, Je-Gwang Yoo, Chang-Sup Ryu