Patents by Inventor Chao-Cheng Chen
Chao-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240124844Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.Type: ApplicationFiled: October 4, 2023Publication date: April 18, 2024Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
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Publication number: 20240115616Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
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Patent number: 11951122Abstract: Provided is a use of fibers formed of ?-1-4-glucan in manufacturing a composition for preventing or treating diarrhea, constipation or irritable bowel syndrome, wherein the fibers have a diameter between 15 nm to 35 nm and a mean length of between 1.5 ?m and 3.5 ?m. Also provided is a method for preventing or treating diarrhea, constipation or irritable bowel syndrome with the fibers formed of ?-1-4-glucan.Type: GrantFiled: July 30, 2021Date of Patent: April 9, 2024Inventor: Chao-Cheng Chen
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Publication number: 20240103520Abstract: A method of controlling movement of an autonomous mobile apparatus including a driving module, a processor, and a positioning module includes steps of: the processor moving the autonomous mobile apparatus at a default speed from a first location toward a second location along a straight path; the positioning module obtaining data related to a current location; when the processor determines that a distance between the current location and the second location is greater than a predetermined distance, the processor obtaining a deviating direction and a minimum distance of the current location relative to the straight path; the processor setting a movement speed and an angular velocity based on the deviating direction, a tolerant distance, the minimum distance, and the default speed; and the processor controlling the driving apparatus to move the autonomous mobile apparatus at the movement speed and turning the autonomous mobile apparatus at the angular velocity.Type: ApplicationFiled: September 21, 2023Publication date: March 28, 2024Inventors: Chien-Tung CHEN, Chung-Hou WU, Chao-Cheng CHEN, Wen-Wei CHIANG
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Publication number: 20240096893Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.Type: ApplicationFiled: November 24, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company LimitedInventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao
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Publication number: 20240088124Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.Type: ApplicationFiled: November 24, 2023Publication date: March 14, 2024Inventors: HSIANG-TAI LU, SHUO-MAO CHEN, MILL-JER WANG, FENG-CHENG HSU, CHAO-HSIANG YANG, SHIN-PUU JENG, CHENG-YI HONG, CHIH-HSIEN LIN, DAI-JANG CHEN, CHEN-HUA LIN
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Publication number: 20240087356Abstract: A display apparatus and an fingerprint sensing method thereof are provided. A display panel of the display apparatus has a pixel circuit array, an in-display touch sensor array, and an in-display fingerprint sensor array. A driving circuit drives the in-display fingerprint sensor array to read a fingerprint image. A current display frame period is divided into a plurality of unit periods, each of the unit periods includes at least one fingerprint sensing period and one or both of a display driving period and a touch sensing period. The driving circuit resets a current fingerprint sensor in the in-display fingerprint sensor array during a first fingerprint sensing period among these fingerprint sensing periods of the first display frame period. The driving circuit reads a sensing result of the current fingerprint sensor during a second fingerprint sensing period succeeding to the first fingerprint sensing period.Type: ApplicationFiled: November 16, 2023Publication date: March 14, 2024Applicant: Novatek Microelectronics Corp.Inventors: Cho-Hsuan Jhang, Chao-Yu Meng, Shih-Cheng Chen, Chih-Peng Hsia
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Patent number: 11908903Abstract: A method of fabricating a semiconductor structure includes selective use of a cladding layer during the fabrication process to provide critical dimension uniformity. The cladding layer can be formed before forming a recess in an active channel structure or can be formed after filling a recess in an active channel structure with dielectric material. These techniques can be used in semiconductor structures such as gate-all-around (GAA) transistor structures implemented in an integrated circuit.Type: GrantFiled: July 8, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Kuei-Yu Kao, Shih-Yao Lin, Chen-Ping Chen, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Patent number: 11908920Abstract: A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal gate.Type: GrantFiled: April 18, 2022Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Yao Lin, Kuei-Yu Kao, Chih-Han Lin, Ming-Ching Chang, Chao-Cheng Chen
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Patent number: 11908746Abstract: A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. The semiconductor device includes a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers. The semiconductor device includes a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface. A portion of the bottom surface of the gate spacer and a top surface of a topmost one of the plurality of semiconductor layers form an angle that is less than 90 degrees.Type: GrantFiled: August 28, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuei-Yu Kao, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Shih-Yao Lin, Chih-Chung Chiu
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Patent number: 11908939Abstract: A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.Type: GrantFiled: August 16, 2021Date of Patent: February 20, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia Tai Lin, Yih-Ann Lin, An-Shen Chang, Ryan Chen, Chao-Cheng Chen
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Publication number: 20240055526Abstract: A semiconductor device and a method of fabricating a semiconductor device are provided herein. The semiconductor device includes a substrate; a fin structure arranged on the substrate and including a ridge portion and a bottom portion between the ridge portion and the substrate, wherein the ridge portion comprises a channel region and a fin region between the channel region and the bottom portion, a critical dimension of the bottom portion in a cross-fin direction is gradually increased toward the substrate to twice or more of a critical dimension of the channel region in the cross-fin direction; a metal gate structure disposed on the fin structure extending the cross-fin direction; and an epitaxy region disposed beside the metal gate structure in a lengthwise direction of the fin structure and connected to the fin structure.Type: ApplicationFiled: August 11, 2022Publication date: February 15, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chi LIN, Yu-Ting WENG, Chiung Wen Hsu, Chao-Cheng Chen
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Publication number: 20240045442Abstract: A method for controlling a plurality of mobile robots is to be implemented by a server that communicates with the plurality of mobile robots and a communication device. The server stores a predetermined working route related to a target area. The method includes steps of: receiving a working instruction from the communication device, the working instruction including area information related to the target area and an input quantity of mobile robots; in response to receipt of the working instruction, dividing the predetermined working route into a plurality of sub-routes, wherein a quantity of the sub-routes equals the input quantity of mobile robots; and sending the sub-routes respectively to a plurality of selected robots that are selected from among the plurality of mobile robots to make the selected robots cooperatively implement a task on the target area by moving along the sub-routes, respectively.Type: ApplicationFiled: July 31, 2023Publication date: February 8, 2024Applicant: URSrobot AI Inc.Inventors: Chien-Tung CHEN, Chung-Hou WU, Chao-Cheng CHEN, Wen-Wei CHIANG, Yi-Jin LIN
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Publication number: 20240045443Abstract: A method for controlling a plurality of autonomous robots for performing environment maintenance operations includes: generating a setup command that indicates a selected location, a plurality of selected robots, an available time slot, and a distribution mode signal that indicates whether the selected robots are to be controlled based on the available time slot or an inputted priority section; and generating a plurality of sub-routes based on different parameters, depending on the distribution mode signal. The sub-routes are generated to be connected into an unbroken trail. Then, the sub-routes are transmitted to the selected robots, respectively, so as to control each of the selected robots to move along the respective one of the sub-routes.Type: ApplicationFiled: July 31, 2023Publication date: February 8, 2024Applicant: URSrobot AI Inc.Inventors: Chien-Tung Chen, Chung-Hou Wu, Chao-Cheng Chen, Wen-Wei Chiang, Yi-Jin Lin
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Patent number: 11894443Abstract: A method of making a semiconductor device includes depositing a TiN layer over a substrate. The method further includes doping a first portion of the TiN layer using an oxygen-containing plasma treatment. The method further includes doping a second portion of the TiN layer using a nitrogen-containing plasma treatment, wherein the second portion of the TiN layer directly contacts the first portion of the TiN layer. The method further includes forming a first metal gate electrode over the first portion of the TiN layer. The method further includes forming a second metal gate electrode over the second portion of the TiN layer, wherein the first metal gate electrode has a different work function from the second metal gate electrode, and the second metal gate electrode directly contacts the first metal gate electrode.Type: GrantFiled: June 16, 2022Date of Patent: February 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ming Zhu, Hui-Wen Lin, Harry Hak-Lay Chuang, Bao-Ru Young, Yuan-Sheng Huang, Ryan Chia-Jen Chen, Chao-Cheng Chen, Kuo-Cheng Ching, Ting-Hua Hsieh, Carlos H. Diaz
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Publication number: 20240014293Abstract: Provided are devices with replacement structures and methods for fabricating such structures. A method includes forming a layer over a semiconductor material having a top surface in a horizontal plane; forming a dummy structure over the layer, wherein the dummy structure has sidewall, wherein the dummy structure lies directly over a first region of the layer and over a first region of the semiconductor material under the first region of the layer, and wherein the dummy structure does not lie directly over a second region of the layer or over a second region of the semiconductor material under the second region of the layer, and removing the second region of the layer and forming a side edge of the first region of the layer, wherein the side edge forms an angle of from 90 to 100 degrees with the horizontal plane.Type: ApplicationFiled: July 11, 2022Publication date: January 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Yu Kao, Shih-Yao Lin, Chen-Ping Chen, Chih-Chung Chiu, Chih-Han Li, Ming-Ching Chang, Chao-Cheng Chen
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Publication number: 20240014073Abstract: A method of fabricating a semiconductor device is described. A plurality of fins is formed over a substrate. Dummy gates are formed patterned over the fins, each dummy gate having a spacer on sidewalls of the patterned dummy gates. Recesses are formed in the fins using the patterned dummy gates as a mask. A passivation layer is formed over the fins and in the recesses in the fins. The passivation layer is patterned to leave a remaining passivation layer only in some of the recesses in the fins. Source and drain regions are epitaxially formed only in the recesses in the fins without the remaining passivation layer.Type: ApplicationFiled: August 9, 2023Publication date: January 11, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Chia-Hao Yu, Hsiao Wen Lee
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Patent number: 11859980Abstract: A method of movement tracking includes: performing, when it is determined that a strength of an external signal is greater than a threshold, positioning based on the signal to generate a first record; performing, when it is determined that the strength is not greater than the threshold, measurement of a movement variation to generate a second record; performing, when it is determined that the strength increases from being not greater than the threshold to being greater than the threshold, positioning based on the signal to obtain coordinates of an exact position; and computing corrected data based on the second record and the coordinates, and generating a movement path record based on the first record and the corrected data.Type: GrantFiled: October 27, 2020Date of Patent: January 2, 2024Assignee: URSROBOT INC.Inventors: Yaun-Ren Yang, Chung-Hou Wu, Chao-Cheng Chen
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Patent number: 11854899Abstract: A method of fabricating a semiconductor device is described. A plurality of fins is formed over a substrate. Dummy gates are formed patterned over the fins, each dummy gate having a spacer on sidewalls of the patterned dummy gates. Recesses are formed in the fins using the patterned dummy gates as a mask. A passivation layer is formed over the fins and in the recesses in the fins. The passivation layer is patterned to leave a remaining passivation layer only in some of the recesses in the fins. Source and drain regions are epitaxially formed only in the recesses in the fins without the remaining passivation layer.Type: GrantFiled: July 15, 2021Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Chen-Ping Chen, Ming-Ching Chang, Chia-Hao Yu, Hsiao Wen Lee
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Patent number: 11855093Abstract: A semiconductor device includes a substrate. The semiconductor device includes a fin that is formed over the substrate and extends along a first direction. The semiconductor device includes a gate structure that straddles the fin and extends along a second direction perpendicular to the first direction. The semiconductor device includes a first source/drain structure coupled to a first end of the fin along the first direction. The gate structure includes a first portion protruding toward the first source/drain structure along the first direction. A tip edge of the first protruded portion is vertically above a bottom surface of the gate structure.Type: GrantFiled: July 9, 2021Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Shih-Yao Lin, Chao-Cheng Chen, Chih-Han Lin, Ming-Ching Chang, Wei-Liang Lu, Kuei-Yu Kao