Patents by Inventor Chao-Chi Chen

Chao-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230378115
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.
    Type: Application
    Filed: July 23, 2023
    Publication date: November 23, 2023
    Inventors: Hsin-Chi CHEN, Hsun-Ying HUANG, Chih-Ming LEE, Shang-Yen WU, Chih-An YANG, Hung-Wei HO, Chao-Ching CHANG, Tsung-Wei HUANG
  • Patent number: 11824447
    Abstract: An example redundant power supply system comprises a power supply input to receive power from a power supply; a buck-boost converter coupled to the power supply input; and a controller coupled to the buck-boost converter. The controller is to receive a power supply identification signal from the power supply. The controller is also to enable or disable the buck-boost converter based on the power supply identification signal.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: November 21, 2023
    Assignee: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Chao-Wen Cheng, Ying-Chi Chou, Feng Ming Lu, Chien Fa Huang, Chieh-Shen Huang, Tsung Yen Chen, Peter Seiler, Poying Chih
  • Publication number: 20230341654
    Abstract: An optical system includes an optical module with a main axis is provided. The optical module includes a fixed portion, a movable portion, and a driving mechanism. The movable portion is connected to an optical element and is movable relative to the fixed portion. The driving mechanism drives the movable portion to move relative to the fixed portion. When viewed along a direction that is parallel with the main axis, the fixed portion is a polygonal structure with a first side, a second side, a third side, and a fourth side. The first side is parallel with the third side, the second side is parallel with the fourth side, and the first side is not parallel with the second side.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Chan-Jung HSU, I-Mei HUANG, Yi-Ho CHEN, Shao-Chung CHANG, Ichitai MOTO, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Wei-Jhe SHEN, Chao-Chang HU, Che-Wei CHANG, Sin-Jhong SONG, Shu-Shan CHEN, Chih-Wei WENG, Chao-Hsi WANG
  • Publication number: 20230341653
    Abstract: An optical system includes an optical module with a main axis is provided. The optical module includes a fixed portion, a movable portion, a driving mechanism, and a supporting assembly. The movable portion is connected to an optical element and is movable relative to the fixed portion. The driving mechanism drives the movable portion to move relative to the fixed portion. The supporting assembly is connected to the movable portion and the fixed portion. When viewed along a direction that is parallel with the main axis, the fixing portion is a polygonal structure with a first side, a second side, a third side, and a fourth side. The first side is parallel with the third side, the second side is parallel with the fourth side, and the first side is not parallel with the second side.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Chan-Jung HSU, I-Mei HUANG, Yi-Ho CHEN, Shao-Chung CHANG, Ichitai MOTO, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Wei-Jhe SHEN, Chao-Chang HU, Che-Wei CHANG, Sin-Jhong SONG, Shu-Shan CHEN, Chih-Wei WENG, Chao-Hsi WANG
  • Publication number: 20230335603
    Abstract: The present disclosure describes a semiconductor structure with a metal ion capture layer and a method for forming the structure. The method includes forming a first fin structure and a second fin structure on a substrate and forming a first gate structure over the first fin structure and a second gate structure over the second fin structure, where the first gate structure adjoins the second gate structure. The method further includes forming a dielectric layer on the first and second gate structures, removing a portion of the dielectric layer above an adjoining portion of the first and second gate structures to form an opening, and forming a metal ion capture layer in the opening.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi Ting Liao, Chao-Chi Chen, Bo-Wei Chen, Shi Sheng Hu, Shun Chi TSAI
  • Patent number: 11756913
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Chi Chen, Hsun-Ying Huang, Chih-Ming Lee, Shang-Yen Wu, Chih-An Yang, Hung-Wei Ho, Chao-Ching Chang, Tsung-Wei Huang
  • Publication number: 20230261580
    Abstract: An asymmetric half-bridge converter is provided. The asymmetric half-bridge converter includes a switch circuit, a resonance tank, a current sensor, and a controller. The current sensor senses a waveform of a resonance current flowing through the resonance tank to generate a sensing result. The controller determines the sensing result. When the sensing result indicates that an ending current value of a primary resonance waveform of the resonance current is greater than a predetermined value, the controller performs a first switching operation on the switch circuit. When the sensing result indicates that the ending current value of the primary resonance waveform is less than or equal to the predetermined value, the controller performs a second switching operation on the switch circuit.
    Type: Application
    Filed: March 24, 2022
    Publication date: August 17, 2023
    Applicant: Power Forest Technology Corporation
    Inventors: Chao-Chang Chiu, Kuan-Chun Fang, Yueh-Chang Chen, Tzu-Chi Huang, Che-Hao Meng
  • Publication number: 20230204141
    Abstract: A quickconnect structure having a fitting connector, a connector, and U-shaped positioning snap pin. The fitting connector has a connector part, a fitting connector body part coupled to the connector part, and a fitting part coupled to the fitting connector. The connector part, the fitting connector body part, and the fitting part define a fitting hole extending therethrough, and the fitting part defines positioning groove, a longitudinal snap hole, and a side snap opening in communication with the longitudinal snap hole. The connector has a connection end, a connector body part coupled to the connection end, and a positioning bump. The connection end and the connector body part define a duct hole extending therethrough, the connection end defines a positioning snap groove, and the fitting connector is configured to accept the connection end in the fitting hole.
    Type: Application
    Filed: March 7, 2023
    Publication date: June 29, 2023
    Inventors: Chao-Chi CHEN, Shen-En CHIANG
  • Publication number: 20230204903
    Abstract: An optical system is provided, including a first movable part for connecting an optical element; a first base, wherein the first movable part is movable relative to the first base; and a first driving assembly for driving the movable part to move relative to the first base. The optical system further includes a light quantity control mechanism for controlling the quantity of light entering the optical element. The light quantity control mechanism further includes a base seat and a light quantity control assembly at least partially movable relative to the base seat. The optical system further includes a second driving assembly for controlling the light quantity control assembly.
    Type: Application
    Filed: March 3, 2023
    Publication date: June 29, 2023
    Inventors: Yi-Ho CHEN, Chen-Hsin HUANG, Chao-Chang HU, Chen-Chi KUO, Ying-Jen WANG, Ya-Hsiu WU, Sin-Jhong SONG, Che-Hsiang CHIU, Kuen-Wang TSAI, Mao-Kuo HSU, Tun-Ping HSUEH, I-Hung CHEN, Chun-Chia LIAO, Wei-Zhong LUO, Wen-Chang LIN
  • Publication number: 20230197847
    Abstract: The present disclosure relates to a method for forming a ferroelectric memory device. The method includes forming a dielectric layer over a semiconductor substrate and forming a first conductive layer over the dielectric layer. The first conductive layer has a first overall electronegativity. A ferroelectric layer is formed on the first conductive layer. The ferroelectric layer has a second overall electronegativity less than or equal to the first overall electronegativity. A second conductive layer is formed on the ferroelectric layer. The second conductive layer has a third overall electronegativity greater than or equal to the second overall electronegativity. The second conductive layer, the ferroelectric layer, and the first conductive layer are etched to form a polarization switching structure. An ILD layer is formed over the polarization switching structure, and a planarization process is performed on the ILD layer. A first conductive via is formed over the polarization switching structure.
    Type: Application
    Filed: February 23, 2023
    Publication date: June 22, 2023
    Inventors: Mickey Hsieh, Chun-Yang Tsai, Kuo-Ching Huang, Kuo-Chi Tu, Pili Huang, Cheng-Jun Wu, Chao-Yang Chen
  • Patent number: 11676682
    Abstract: Disclosed herein are methods of determining the sequence and/or positions of modified bases in a nucleic acid sample present in a circular molecule with a nucleic acid insert of known sequence comprising obtaining sequence data of at least two insert-sample units. In some embodiments, the methods comprise obtaining sequence data using circular pair-locked molecules. In some embodiments, the methods comprise calculating scores of sequences of the nucleic acid inserts by comparing the sequences to the known sequence of the nucleic acid insert, and accepting or rejecting repeats of the sequence of the nucleic acid sample according to the scores of one or both of the sequences of the inserts immediately upstream or downstream of the repeats of the sequence of the nucleic acid sample.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: June 13, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Chao-Chi Pan, Jenn-Yeh Fann, Chung-Fan Chiou, Hung-Chi Chien, Hui-Ling Chen
  • Patent number: 11598465
    Abstract: A quick connector structure includes a fitting connector, a connector, and a U-shaped positioning snap pin. The fitting connector is a pipe connector, a three-way valve connector, or a washing machine valve connector. The fitting connector is combined with a pipe body. The U-shaped positioning snap pin ensures the stability of the connection between the fitting connector and the connector. The quick connector structure enables rapid positioning and assembly, reducing the assembly difficulty in a smaller or concealed space and achieving the effects of assembly stability and convenience.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: March 7, 2023
    Inventors: Chao-Chi Chen, Shen-En Chiang
  • Patent number: 11139744
    Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: October 5, 2021
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Wei-Hsu Chang, Ta-Yung Yang, Yu-Chang Chen, Chao-Chi Chen, Chuh-Ching Li, Li-Di Lo, Hao-Wen Chung
  • Patent number: 11139742
    Abstract: A switching controller circuit for controlling a flyback power converter includes: a power transformer, a primary side controller circuit and a secondary side controller circuit. The power transformer is coupled between the input voltage and the output voltage in an isolated manner. The primary side controller circuit controls a primary side switch of the flyback power converter. The secondary side controller circuit generates a synchronous rectification (SR) signal, to control an SR switch of the flyback power converter. The SR signal includes an SR pulse and a soft switching (SS) pulse. The SR pulse controls the SR switch to be ON for an SR period, to achieve synchronous rectification at the secondary side. The SS pulse controls the SR switch to be ON for an SS period, to achieve soft switching of the primary side switch.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: October 5, 2021
    Inventors: Wei-Hsu Chang, Ta-Yung Yang, Yu-Chang Chen, Chao-Chi Chen, Chuh-Ching Li, Li-Di Lo, Hao-Wen Chung
  • Patent number: 11047494
    Abstract: An air admittance valve preventing mephitis overflow, having a main body with an air entry guide base defining an air entry guide; a pivot support; and a valve seat. A sealing valve group having a sealing valve body that defines a recess; a flexible member; a pivot housing; and a pivot. The valve seat is located about the air entry guide. The pivot is located in the pivot housing and the pivot support, and the pivot is located along, or adjacent to, the center of gravity of the sealing valve body. The flexible member is at least partially located in the recess and abuts the main body; and when the air admittance valve is closed, the sealing valve body abuts the valve seat.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: June 29, 2021
    Inventors: Chao Chi Chen, Michael Chiang
  • Patent number: 11018597
    Abstract: A flyback power converter circuit includes: a transformer; a primary side switch, for controlling a primary winding to convert an input voltage to an output voltage and an internal voltage; a primary side control circuit, which is powered by the internal voltage; the primary side control circuit generates a switching signal according to a feedback signal, to operate the primary side switch; a secondary side control circuit, which generates the feedback signal according the output voltage; and a dummy load circuit, which is coupled to the output voltage, wherein when the output voltage drops to or is lower than a predetermined threshold, the dummy load circuit generates a dummy load current, to determine the feedback signal, so that the internal voltage is not undesirably low. When the output voltage exceeds the predetermined threshold, the dummy load circuit adjusts the dummy load current to zero current.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: May 25, 2021
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ta-Yung Yang, Chao-Chi Chen, Chen-Hung Tsai, Chuh-Ching Li
  • Publication number: 20210126543
    Abstract: A switching controller circuit for controlling a flyback power converter includes: a power transformer, a primary side controller circuit and a secondary side controller circuit. The power transformer is coupled between the input voltage and the output voltage in an isolated manner. The primary side controller circuit controls a primary side switch of the flyback power converter. The secondary side controller circuit generates a synchronous rectification (SR) signal, to control an SR switch of the flyback power converter. The SR signal includes an SR pulse and a soft switching (SS) pulse. The SR pulse controls the SR switch to be ON for an SR period, to achieve synchronous rectification at the secondary side. The SS pulse controls the SR switch to be ON for an SS period, to achieve soft switching of the primary side switch.
    Type: Application
    Filed: May 20, 2020
    Publication date: April 29, 2021
    Inventors: Wei-Hsu Chang, Ta-Yung Yang, Yu-Chang Chen, Chao-Chi Chen, Chuh-Ching Li, Li-Di Lo, Hao-Wen Chung
  • Publication number: 20210111634
    Abstract: A flyback power converter includes a primary side controller circuit for controlling a primary side switch; and a secondary side controller circuit for generating an SR (Synchronous Rectification) signal to control an SR switch. The SR signal includes an SR pulse and a ZVS (Zero Voltage Switching) pulse. The SR pulse controls the SR switch for synchronous rectification at the secondary side. The secondary side controller circuit samples and holds a voltage at a first end of the SR switch as a first voltage at a timing between the end of the ZVS pulse and the beginning of the SR pulse, and determines a length of the ZVS pulse so as to control the SR switch to be conductive for a ZVS time period, whereby the primary side switch achieves ZVS. The first voltage is proportional to an input voltage.
    Type: Application
    Filed: June 1, 2020
    Publication date: April 15, 2021
    Inventors: Wei-Hsu Chang, Ta-Yung Yang, Yu-Chang Chen, Chao-Chi Chen, Chuh-Ching Li, Li-Di Lo, Hao-Wen Chung
  • Patent number: D989651
    Type: Grant
    Filed: December 5, 2020
    Date of Patent: June 20, 2023
    Assignee: ORIGIN WIRELESS, INC.
    Inventors: Chao-Lun Mai, Wang Yin Chen, Beibei Wang, Oscar Chi-Lim Au, K. J. Ray Liu
  • Patent number: D997162
    Type: Grant
    Filed: December 5, 2020
    Date of Patent: August 29, 2023
    Assignee: ORIGIN WIRELESS, INC.
    Inventors: Chao-Lun Mai, Wang Yin Chen, Beibei Wang, Oscar Chi-Lim Au, K. J. Ray Liu