Patents by Inventor Chao-Ching Chang
Chao-Ching Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11189654Abstract: A plurality of radiation-sensing doped regions are formed in a substrate. A trench is formed in the substrate between the radiation-sensing doped regions. A SiOCN layer is filled in the trench by reacting Bis(tertiary-butylamino)silane (BTBAS) and a gas mixture comprising N2O, N2 and O2 through a plasma enhanced atomic layer deposition (PEALD) method, to form an isolation structure between the radiation-sensing doped regions.Type: GrantFiled: June 14, 2020Date of Patent: November 30, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chao-Ching Chang, Sheng-Chan Li, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Chia-Hsing Chou, Yi-Ming Lin, Min-Hui Lin, Chin-Szu Lee
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Publication number: 20210050460Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.Type: ApplicationFiled: April 9, 2020Publication date: February 18, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Cheng-Han LIN, Chao-Ching CHANG, Yi-Ming LIN, Yen-Ting CHOU, Yen-Chang CHEN, Sheng-Chan LI, Cheng-Hsien CHOU
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Publication number: 20200312894Abstract: A plurality of radiation-sensing doped regions are formed in a substrate. A trench is formed in the substrate between the radiation-sensing doped regions. A SiOCN layer is filled in the trench by reacting Bis(tertiary-butylamino)silane (BTBAS) and a gas mixture comprising N2O, N2 and O2 through a plasma enhanced atomic layer deposition (PEALD) method, to form an isolation structure between the radiation-sensing doped regions.Type: ApplicationFiled: June 14, 2020Publication date: October 1, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chao-Ching Chang, Sheng-Chan Li, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Chia-Hsing Chou, Yi-Ming Lin, Min-Hui Lin, Chin-Szu Lee
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Publication number: 20200115823Abstract: A method for preparing hydrophobic fibers by electrospinning of polymer is provided, which may include the following steps: providing a polymer material including poly(methyl methacrylate); providing a solvent including 2-propanol and water; adding the polymer material into the solvent to form a mixed solution; heating and stirring the mixed solution; electrospinning the mixed solution to generate polymer fibers.Type: ApplicationFiled: August 5, 2019Publication date: April 16, 2020Inventors: CHAO-CHING CHANG, HUI-YI CHANG, LIAO-PING CHENG
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Patent number: 10497729Abstract: An image sensor includes a substrate having a first region and a second region. The image sensor further includes a dielectric layer over the substrate. The image sensor further includes a conductive layer over the dielectric layer, wherein in the first region the conductive layer has a grid shape and in the second region a portion of the conductive layer is concave toward the substrate. The image sensor further includes a protective layer, wherein the protective layer is over the conductive layer in the first region, and over a top surface and along sidewalls of the conductive layer in the second region.Type: GrantFiled: November 19, 2018Date of Patent: December 3, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Yi Wu, Chun-Chih Lin, Jian-Shin Tsai, Min-Hui Lin, Wen-Shan Chang, Yi-Ming Lin, Chao-Ching Chang, C. H. Chen, Chin-Szu Lee, Y. T. Tsai
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Patent number: 10325949Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.Type: GrantFiled: August 6, 2018Date of Patent: June 18, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
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Publication number: 20190088692Abstract: An image sensor includes a substrate having a first region and a second region. The image sensor further includes a dielectric layer over the substrate. The image sensor further includes a conductive layer over the dielectric layer, wherein in the first region the conductive layer has a grid shape and in the second region a portion of the conductive layer is concave toward the substrate. The image sensor further includes a protective layer, wherein the protective layer is over the conductive layer in the first region, and over a top surface and along sidewalls of the conductive layer in the second region.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
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Publication number: 20190035829Abstract: An image sensor device is provided. The image sensor device includes a substrate having a first surface, a second surface, and a light-sensing region. The image sensor device includes a first isolation structure in the substrate and adjacent to the first surface. The first isolation structure surrounds the light-sensing region. The image sensor device includes a second isolation structure passing through the first isolation structure and the substrate under the first isolation structure. The second isolation structure surrounds the light-sensing region and a portion of the first isolation structure.Type: ApplicationFiled: August 6, 2018Publication date: January 31, 2019Inventors: Chao-Ching CHANG, Sheng-Chan LI, Cheng-Hsien CHOU, Tsung-Wei HUANG, Min-Hui LIN, Yi-Ming LIN
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Patent number: 10186454Abstract: A semiconductor structure includes a first dielectric layer, a first conductive via, a second conductive via and an etch stop layer. The first conductive via and the second conductive via are respectively disposed in the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and contacts the first and second conductive vias. The etch stop layer includes nitrogen-and-oxygen-doped silicon carbide (NODC).Type: GrantFiled: June 15, 2017Date of Patent: January 22, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Cheng-Han Lin, Han-Sheng Weng, Chao-Ching Chang, Jian-Shin Tsai, Yi-Ming Lin, Min-Hui Lin
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Publication number: 20180366369Abstract: A semiconductor structure includes a first dielectric layer, a first conductive via, a second conductive via and an etch stop layer. The first conductive via and the second conductive via are respectively disposed in the first dielectric layer. The etch stop layer is disposed on the first dielectric layer and contacts the first and second conductive vias. The etch stop layer includes nitrogen-and-oxygen-doped silicon carbide (NODC).Type: ApplicationFiled: June 15, 2017Publication date: December 20, 2018Inventors: Cheng-Han LIN, Han-Sheng WENG, Chao-Ching CHANG, Jian-Shin TSAI, Yi-Ming LIN, Min-Hui LIN
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Publication number: 20180337203Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.Type: ApplicationFiled: May 17, 2017Publication date: November 22, 2018Inventors: Cheng-Yi WU, Chun-Chih LIN, Jian-Shin TSAI, Min-Hui LIN, Wen-Shan CHANG, Yi-Ming LIN, Chao-Ching CHANG, C. H. CHEN, Chin-Szu LEE, Y. T. TSAI
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Patent number: 10134790Abstract: A method of fabricating an image sensor includes depositing a first dielectric layer over a substrate, removing a portion of the first dielectric layer from the substrate to form a trench, depositing a conductive layer over the first dielectric layer and in the trench, forming a protective layer lining a top surface of the conductive layer and sidewalls and a bottom surface of the groove in the conductive layer, and removing a portion of the conductive layer to form a grid structure. A groove corresponding to the trench is formed in the conductive layer.Type: GrantFiled: May 17, 2017Date of Patent: November 20, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Cheng-Yi Wu, Chun-Chih Lin, Jian-Shin Tsai, Min-Hui Lin, Wen-Shan Chang, Yi-Ming Lin, Chao-Ching Chang, C. H. Chen, Chin-Szu Lee, Y. T. Tsai
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Patent number: 10062656Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.Type: GrantFiled: August 15, 2016Date of Patent: August 28, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chao-Ching Chang, Sheng-Chan Li, Wen-Jen Tsai, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Yi-Ming Lin, Min-Hui Lin
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Patent number: 10050102Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.Type: GrantFiled: January 15, 2016Date of Patent: August 14, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chao-Ching Chang, Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Yi-Ming Lin, Chin-Szu Lee, Wen-Shan Chang, Yi-Hui Chen
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Patent number: 10043841Abstract: A method for forming an image sensor device is provided. The method includes providing a substrate having a front surface and a back surface. The method includes removing a first portion of the substrate to form a first trench. The method includes forming a first isolation structure in the first trench. The first isolation structure has a top surface. The method includes removing a second portion of the first isolation structure and a third portion of the substrate to form a second trench passing through the first isolation structure and extending into the substrate. The method includes forming a second isolation structure in the second trench. The method includes forming a light-sensing region in the substrate. The method includes removing a fourth portion of the substrate to expose a first bottom portion of the second isolation structure and a backside of the light-sensing region.Type: GrantFiled: July 31, 2017Date of Patent: August 7, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chao-Ching Chang, Sheng-Chan Li, Cheng-Hsien Chou, Tsung-Wei Huang, Min-Hui Lin, Yi-Ming Lin
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Patent number: 10038000Abstract: A memory cell includes a selector, a fuse connected to the selector in series, a contact etch stop layer formed on the selector and the fuse, a bit line connected to the fuse, and a word line connected to the selector. The contact etch stop layer includes a high-k dielectric for improving the ability of capturing the electrons, thus the retention time of the memory cell is increased.Type: GrantFiled: September 17, 2015Date of Patent: July 31, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Cheng-Yi Wu, Jian-Shin Tsai, Kuo-Hsien Cheng, Min-Hui Lin, Wei-Li Chen, Chao-Ching Chang, Chung-Yu Hsieh, Chin-Szu Lee
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Publication number: 20180047682Abstract: A semiconductor device includes a substrate, a dielectric structure, a top metal layer and a bonding structure. The dielectric structure is disposed on the substrate. The top metal layer is disposed in the dielectric structure. The bonding structure is disposed on the dielectric structure and the top metal layer. The bonding structure includes a silicon oxide layer, a silicon oxy-nitride layer, a conductive bonding layer and a barrier layer. The silicon oxide layer is disposed on the dielectric structure. The silicon oxy-nitride layer covers the silicon oxide layer. The conductive bonding layer is disposed in the silicon oxide layer and the silicon oxy-nitride layer. The barrier layer covers a sidewall and a bottom of the conductive bonding layer.Type: ApplicationFiled: August 15, 2016Publication date: February 15, 2018Inventors: Chao-Ching Chang, Sheng-Chan Li, Wen-Jen Tsai, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Yi-Ming Lin, Min-Hui Lin
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Publication number: 20170250211Abstract: Semiconductor image sensor devices and manufacturing method of the same are disclosed. The semiconductor image sensor device includes a substrate, a first pixel and a second pixel, and an isolation structure. The first pixel and second pixel are disposed in the substrate, wherein the first and second pixels are neighboring pixels. The isolation structure is disposed in the substrate and between the first and second pixels, wherein the isolation structure includes a dielectric layer, and the dielectric layer includes silicon oxycarbonitride (SiOCN).Type: ApplicationFiled: February 25, 2016Publication date: August 31, 2017Inventors: Chao-Ching Chang, Sheng-Chan Li, Chih-Hui Huang, Jian-Shin Tsai, Cheng-Yi Wu, Chia-Hsing Chou, Yi-Ming Lin, Min-Hui Lin, Chin-Szu Lee
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Publication number: 20170207298Abstract: Semiconductor devices and manufacturing method thereof are disclosed. The semiconductor device includes a substrate, a device layer, first and second conductive layers, first and second vias, and a MIM capacitor structure. The substrate includes active and passive regions. The device layer is in the active region. The first conductive layer is over the device layer. The second conductive layer is over the first conductive layer, wherein the first conductive layer is disposed between the device layer and the second conductive layer. The first via electrically connects the first and the second conductive layers. The MIM capacitor structure is between the first and the second conductive layers and in the passive region, and includes first and second electrodes and a capacitor dielectric layer therebetween. The capacitor dielectric layer includes Group IIIA-metal oxide or nitride. The second via electrically connects the second conductive layer and one of the first and second electrodes.Type: ApplicationFiled: January 15, 2016Publication date: July 20, 2017Inventors: Chao-Ching Chang, Cheng-Yi Wu, Jian-Shin Tsai, Min-Hui Lin, Yi-Ming Lin, Chin-Szu Lee, Wen-Shan Chang, Yi-Hui Chen
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Publication number: 20170084620Abstract: A memory cell includes a selector, a fuse connected to the selector in series, a contact etch stop layer formed on the selector and the fuse, a bit line connected to the fuse, and a word line connected to the selector. The contact etch stop layer includes a high-k dielectric for improving the ability of capturing the electrons, thus the retention time of the memory cell is increased.Type: ApplicationFiled: September 17, 2015Publication date: March 23, 2017Inventors: Cheng-Yi WU, Jian-Shin TSAI, Kuo-Hsien CHENG, Min-Hui LIN, Wei-Li CHEN, Chao-Ching CHANG, Chung-Yu HSIEH, Chin-Szu LEE