Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV.

Abstract: A display apparatus includes a backlight module with backlight zones, a panel over the backlight module, and a circuit configured to generate compensated pixel data for the panel based on image data and an arrangement of the zones of the backlight module, in which the image data has image areas respectively corresponding to the backlight zones. For a first image area being a low-luminance image area and a luminance intensity of a first zone of the zones corresponding to the first image area being less than a luminance intensity of a second zone corresponding to a second image area neighboring the first image area, the circuit performs first pixel compensation for high-luminance pixels in the second image area and second pixel compensation on low-luminance pixels in the second image area, in which the second pixel compensation is greater than the first pixel compensation.

Abstract: The present invention is a semiconductor device having a defect blocking region. The semiconductor device includes a substrate, a defect source region, a semiconductor layer and a defect blocking region. The defect source region is on the substrate, wherein the defect source region is a metamorphic buffer layer or a buffer layer, the semiconductor layer over the defect source region, wherein a lattice constant of the semiconductor layer is different from a lattice constant of the substrate. The defect blocking region is disposed on the substrate and below the semiconductor layer, wherein the defect blocking region includes a superlattice structure, wherein at least one of two adjacent layers of the superlattice structure has strain relative to the semiconductor layer, or a lattice constant of the superlattice structure is close to or equal to the lattice constant of the semiconductor layer.

Abstract: A heterojunction bipolar transistor structure is provided, including a substrate and a multi-layer structure formed on the substrate. The multi-layer structure includes a current clamping layer, and the current clamping layer can be disposed in a collector layer, disposed in a sub-collector layer, or interposed between a collector layer and a sub-collector layer. An electron affinity of the current clamping layer is less than an electron affinity of an epitaxial layer formed on the current clamping layer.

Abstract: A semiconductor laser diode includes a substrate; a lower epitaxial region located on the substrate, wherein the lower epitaxial region includes a lower DBR layer; an active region located on the lower epitaxial region; and an upper epitaxial region located on the substrate, wherein the upper epitaxial region includes a lower DBR layer; wherein the lower DBR layer includes a P-type lower DBR region and the upper DBR layer includes an N-type upper DBR region.

Abstract: Provided is a semiconductor laser diode, including a GaAs/In P substrate and a multi-layer structure on the GaAs/InP substrate. The multi-layer structure includes a lower epitaxial region, an active region and an upper epitaxial region. The active region comprises a first active layer, an epitaxial region and a second active layer, the epitaxial region is disposed between the first active layer and the second active layer, the first active layer comprises one or more quantum well structures or one or more quantum dot structures, and the second active layer comprises one or more quantum well structures or one or more quantum dot structures.

Abstract: A semiconductor laser epitaxial structure includes a horizontal cavity configured to generate an optical field distribution, a grating layer located within the optical field distribution, a first semiconductor optical amplifier disposed between a light-emitting surface of the semiconductor laser epitaxial structure and the horizontal cavity, and a first tunnel junction layer disposed between the horizontal cavity and the first semiconductor optical amplifier. The grating layer is configured to convert a horizontal light to a vertical light. The semiconductor laser epitaxial structure does not require alignment, the yield rate of manufacturing the semiconductor laser is increased, and the manufacturing cost and manufacturing processes can be reduced.

Abstract: Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

Abstract: Provided is a heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a bandgap graded layer. A quasi-electric field generated by the bandgap graded layer will enable electrons in the bandgap graded layer to be accelerated. The bandgap graded layer includes a semiconductor material in which an electron velocity peaks at a certain quasi-electric field strength when an quasi-electric field strength is varied, wherein the certain quasi-electric field strength is referred to as a peak electric field strength. The strength of the quasi-electric field is more than 2 times the peak electric field strength.

Abstract: A vertical cavity surface-emitting laser epitaxial structure having a current spreading layer is disclosed. The vertical cavity surface-emitting laser epitaxial structure includes a substrate, a first epitaxial region on the substrate, an active region on the first epitaxial region, and a current spreading layer disposed in the first epitaxial region. The current spreading layer includes an N-type dopant, and the N-type dopant is selected from a group consisting of Si, Se, and the combination thereof. The current spreading layer does not directly contact the active region.

Abstract: Provided is a vertical cavity surface emitting laser diode (VCSEL) with low compressive strain DBR layer, including a GaAs substrate, a lower DBR layer, a lower spacer layer, an active region, an upper spacer layer and an upper DBR layer. The lower or the upper DBR layer includes multiple low refractive index layers and multiple high refractive index layers. The lower DBR layer, the lower spacer layer, the upper spacer layer or the upper DBR layer contains AlxGa1-xAs1-yPy, where the lattice constant of AlxGa1-xAs1-yPy is greater than that of the GaAs substrate. This can moderately reduce excessive compressive strain due to lattice mismatch or avoid tensile strain during the epitaxial growth, thereby reducing the chance of deformation and bowing of the VCSEL epitaxial wafer or cracking during manufacturing. Additionally, the VCSEL epitaxial layer can be prevented from generating excessive compressive strain or tensile strain during the epitaxial growth.

Abstract: Provided is a vertical cavity surface emitting laser diode (VCSEL) with a small divergence angle. The VCSEL includes a multi-layer structure on a substrate. The multi-layer structure includes an active region and current confinement layers. Each of the current confinement layers has an optical aperture (OA). When the area of the OA of the current confinement layer outside the active region is larger than the areas of the OAs of the current confinement layers inside the active region, such that the VCSEL has a small divergence angle in the short pulse mode.

Abstract: Provided is a vertical-cavity surface-emitting semiconductor laser diode, including a substrate and an epitaxial stack structure disposed on the substrate. The epitaxial stack structure includes an active region, a current confinement layer and a mode filter layer. The mode filter layer includes an optical aperture, and the mode filter layer is able to be oxidized. Accordingly, the optical aperture of the mode filter layer is formed by oxidizing the mode filter layer.

Abstract: A measurement method for a vertical cavity surface emitting laser diode (VCSEL) and an epitaxial wafer test fixture are provided, especially the Fabry-Perot Etalon of the bottom-emitting VCSEL can be measured. When the Fabry-Perot Etalon of the bottom-emitting VCSEL is measured by a measurement apparatus, a light of the test light source of the measurement apparatus is incident from the substrate surface of the VCSEL epitaxial wafer such that the Fabry-Perot Etalon of the bottom-emitting VCSEL is acquired. Through the VCSEL epitaxial wafer test fixture, the bottom-emitting VCSEL can be directly measured by the existing measurement apparatus such that there is no need to change the optical design of the measurement apparatus, and it can prevent the VCSEL epitaxial wafer from being scratched or contaminated.

Abstract: Provided is a semiconductor epitaxial wafer, including a substrate, a first epitaxial structure, a first ohmic contact layer and a second epitaxial stack structure. It is characterized in that the ohmic contact layer includes a compound with low nitrogen content, and the ohmic contact layer does not induce significant stress during the crystal growth process. Accordingly, the second epitaxial stack structure formed on the ohmic contact layer can have good epitaxial quality, thereby providing a high-quality semiconductor epitaxial wafer for fabricating a GaAs integrated circuit or a InP integrated circuit. At the same time, the ohmic contact properties of ohmic contact layers are not affected, and the reactants generated during each dry etching process are reduced.

Abstract: A laser diode is provided, including at least a defect blocking layer deposited between the GaAs substrate and the active layer, so that the crystal defects of the GaAs substrate can be blocked or reduced from propagation to the active layer when the epitaxial layer is formed on the GaAs substrate. As such, the crystal quality of the active layer can be improved, thereby improving the reliability and optical property of the laser diode.

Abstract: Provided is a high ruggedness HBT, including a first emitter cap layer and a second emitter cap layer formed between an emitter layer and an ohmic contact layer, or only an emitter cap layer is formed between them. When the first and second emitter cap layers are provided, bandgaps of the first or second emitter cap layer are changed, and the ruggedness of the HBT is improved. When an emitter cap layer is provided, an electron affinity of at least a portion of the emitter cap layer is less than or approximately equal to an electron affinity of the emitter layer, and the ruggedness of the HBT is improved.

Abstract: Provided is a heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a bandgap graded. A quasi-electric field generated by the bandgap graded will enable electrons in the bandgap graded layer to be accelerated.

Abstract: Provided is a high ruggedness heterojunction bipolar transistor (HBT), including a collector layer. The collector layer includes a InGaP layer or a wide bandgap layer. The bandgap of the InGaP layer is greater than 1.86 eV.

Abstract: The disclosure provides a high ruggedness HBT structure, including: a sub-collector layer on a substrate and formed of an N-type III-V semiconductor material; a collector layer on the sub-collector layer and formed of a III-V semiconductor material; a base layer on the collector layer and formed of a P-type III-V semiconductor material; an emitter layer on the base layer and formed of one of N-type semiconductor materials of InGaP, InGaAsP and InAlGaP; a first emitter cap layer on the emitter layer and formed of one of undoped or N-type semiconductor materials of AlxGa1-xAs, AlxGa1-xAs1-yNy, AlxGa1-xAs1-zPz, AlxGa1-xAs1-wSbw, and InrAlxGa1-x-rAs, x having a highest value between 0.05?x?0.4, and y, z, r, w?0.1; a second emitter cap layer on the first emitter cap layer and formed of an N-type III-V semiconductor material; and an ohmic contact layer on the second emitter cap layer and formed of an N-type III-V semiconductor material.