Patents by Inventor Chao Min
Chao Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12124307Abstract: A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.Type: GrantFiled: August 23, 2022Date of Patent: October 22, 2024Assignee: Realtek Semiconductor CorporationInventors: Chao-Min Lai, Chia-Chi Yeh, Chieh-Lung Hsieh, Chih-Feng Lin
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Patent number: 12103142Abstract: A screwdriver tip structure includes a main body provided with an operation end. The operation end is provided with multiple first working sections and multiple second working sections. Each of the first working sections has a convex shape. Each of the second working sections has a concave shape. Each of the first working sections is provided with multiple grooves. Each of the first working sections has a first end and a second end. The second end has a diameter more than that of the first end. Each of the first working sections has a periphery provided with a phantom side face. The side face extends from the second end to the first end. Each of the grooves is provided with a first concave face. The first concave face of each of the grooves includes a first single arc.Type: GrantFiled: July 7, 2022Date of Patent: October 1, 2024Inventors: Chao-Min Hung, Bo-Wei Chen
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Publication number: 20240316144Abstract: The present invention provides a method for inhibiting angiogenesis in a subject, which comprises administering said subject a pharmaceutical composition comprising beauvericin at a therapeutically effective concentration ranging from 0.1 ?M to 5 ?M. Also provides is the pharmaceutical composition comprising beauvericin at a therapeutically effective concentration ranging from 0.1 ?M to 5 ?M, and a pharmaceutically acceptable carrier.Type: ApplicationFiled: February 6, 2024Publication date: September 26, 2024Applicant: ZIH YUAN TANG Biotechnology Co, Ltd.Inventors: Ming-Jai SU, Shoei-Sheng LEE, Feng-Chiao TSAI, Hou-Jen CHEN, Chao-Min HSU
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Publication number: 20240322801Abstract: A multimedia device comprises a power input interface, a computing circuit and a load circuit. The power input interface is configured to receive an operating voltage. The computing circuit is configured to receive the operating voltage from the power input interface, and configured to output a pulse-width modulation (PWM) signal. The load circuit is configured to receive a test current from the power input interface, receive the PWM signal, and determine a magnitude of the test current according to a duty ratio of the PWM signal. The computing circuit is configured to monitor the variation of the operating voltage while adjusting the duty ratio of the PWM signal step by step. The computing circuit is configured to determine an upper bound of a power consumption of the computing circuit according to the relationship between the operating voltage and the duty ratio of the PWM signal.Type: ApplicationFiled: March 22, 2024Publication date: September 26, 2024Inventors: Chao-Min LAI, Chien-Liang CHEN, Chia-Chi YEH
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Patent number: 12046543Abstract: A package substrate and a chip package structure using the same are provided. The package substrate includes a laminated board including first to third wiring layers, a pad array, a plurality of ground conductive structures, and a plurality of power conductive structures. At least one of the ground (or power) conductive structures includes two first ground (or power) conductive posts and a second ground (or power) conductive post. The two first ground (or power) conductive posts and the second ground (or power) conductive post are arranged along a first direction, and the second ground (or power) conductive post is located between two orthographic projections of the two first ground (or power) conductive posts. Each of the ground conductive structures in a first column and each of the power conductive structures in a second column are offset from each other in a second direction.Type: GrantFiled: February 24, 2022Date of Patent: July 23, 2024Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Han-Chieh Hsieh, Chao-Min Lai, Cheng-Chen Huang, Nan-Chin Chuang
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Patent number: 11983271Abstract: A processor may generate an enforcement point. The enforcement point may include one or more adversarial detection models. The processor may receive user input data. The processor may analyze, at the enforcement point, the user input data. The processor may determine, from the analyzing, whether there is an adversarial attack in the user input data. The processor may generate an alert based on the determining.Type: GrantFiled: November 19, 2020Date of Patent: May 14, 2024Assignee: International Business Machines CorporationInventors: Bruno dos Santos Silva, Cheng-Ta Lee, Ron Williams, Bo-Yu Kuo, Chao-Min Chang, Sridhar Muppidi
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Publication number: 20240045820Abstract: A system on a chip (SoC) with a Universal Asynchronous Receiver/Transmitter (UART) interface includes a UART interface circuit, a detection circuit, and a control circuit. The UART interface circuit includes: a plurality of UART signal pads for receiving and transmitting signals; and a UART voltage pad for receiving an external operating voltage. The detection circuit is configured to detect the magnitude of the external operating voltage and thereby generate a detection result. The control circuit is configured to determine setting of a supply voltage for the plurality of UART signal pads according to the detection result. The control circuit makes the setting of the supply voltage be compatible with the external operating voltage according to the detection result, wherein the external operating voltage is a lower first voltage or a higher second voltage, and the first lower voltage is equal to an internal device operating voltage of the SoC.Type: ApplicationFiled: August 2, 2023Publication date: February 8, 2024Inventors: CHAO-MIN LAI, YU-JEN LIN, HUNG-WEI WANG, HUANG-LIN KUO
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Publication number: 20240009811Abstract: A screwdriver tip structure includes a main body provided with an operation end. The operation end is provided with multiple first working sections and multiple second working sections. Each of the first working sections has a convex shape. Each of the second working sections has a concave shape. Each of the first working sections is provided with multiple grooves. Each of the first working sections has a first end and a second end. The second end has a diameter more than that of the first end. Each of the first working sections has a periphery provided with a phantom side face. The side face extends from the second end to the first end. Each of the grooves is provided with a first concave face. The first concave face of each of the grooves includes a first single arc.Type: ApplicationFiled: July 7, 2022Publication date: January 11, 2024Inventors: Chao-Min Hung, Bo-Wei Chen
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Patent number: 11854571Abstract: Apparatuses and methods of transmitting and receiving a speech signal. The method of transmitting a speech signal includes extracting low frequency feature information from an input speech signal by using a first feature extracting network; and transmitting a speech signal corresponding to the low frequency feature information to a receiving end. The method of receiving a speech signal includes receiving a first speech signal transmitted by a transmitting end; extracting low frequency feature information from the first speech signal and recovering high frequency feature information based on the low frequency feature information, by using a second feature extracting network; and outputting a second speech signal including the low frequency feature information and the high frequency feature information.Type: GrantFiled: November 27, 2020Date of Patent: December 26, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Liang Wen, Lizhong Wang, Anxi Yi, Chao Min, Liangxi Yao
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Publication number: 20230376319Abstract: An electronic system includes a main chip, a non-volatile storage circuit, and a detector circuit. The main chip is configured to read first time of a clock circuit. The non-volatile storage circuit is coupled to the main chip. The main chip stores the first time into the non-volatile storage circuit. The detector circuit includes a first output terminal. The first output terminal is coupled to the main chip. When a cold boot event occurs, the main chip reads the first time from the non-volatile storage circuit, and determines a reason of the cold boot event according to the first time, a second time of the clock circuit, and a logic value at the first output terminal.Type: ApplicationFiled: January 3, 2023Publication date: November 23, 2023Inventors: Chao-Min LAI, Chien-Liang CHEN, Ming-Tsung TSAI
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Patent number: 11768903Abstract: A computer-implemented method for automatically adjusting a Uniform Resource Locator (URL) seed list. The method includes crawling for documents based on a seed URL list. The method generates relations data from the documents using a Natural Language Processing (NLP) model. The method analyzes the relations data using an auto-seed model. The method modifies the seed URL list.Type: GrantFiled: June 19, 2020Date of Patent: September 26, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Chao-Min Chang, Ying-Chen Yu, June-Ray Lin, Kuei-Ching Lee, Curtis C H Wei
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Publication number: 20230299242Abstract: Discloded is a light emitting devices including an electroluminescent unit that emits the light of wavelength I, and a color conversion layer that absorbs the light of wavelength I and emits the light of wavelength II are disclosed. The color conversion layer comprises at least one color conversion material having a structural unit of formula (1) or (2). Display devices containing the light emitting devices are also disclosed.Type: ApplicationFiled: April 14, 2023Publication date: September 21, 2023Applicant: Zhejiang Brilliant Optoelectronic Technology Co.,Ltd.Inventors: Chao MIN, Chacai LIANG, Caifa PAN
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Patent number: 11764676Abstract: A power supply circuit includes a first regulator and a second regulator. The first regulator is configured to generate a first output signal according to an input signal. A voltage value of the first output signal decreases according to the input signal and a first voltage threshold value at a power-off stage. The second regulator is configured to be enabled according to the first output signal to generate a second output signal according to the input signal. A voltage value of the second output signal decreases according to the input signal and a second voltage threshold value at the power-off stage. The second voltage threshold value is greater than the first voltage threshold value.Type: GrantFiled: June 25, 2021Date of Patent: September 19, 2023Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Chao-Min Lai, Chien-Liang Chen, Hung-Wei Wang, Shih-An Yang
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Publication number: 20230216904Abstract: A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.Type: ApplicationFiled: August 23, 2022Publication date: July 6, 2023Inventors: Chao-Min LAI, Chia-Chi YEH, Chieh-Lung HSIEH, Chih-Feng LIN
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Patent number: 11663402Abstract: An approach for a fast and accurate word embedding model, “desc2vec,” for out-of-dictionary (OOD) words with a model learning from the dictionary descriptions of the word is disclosed. The approach includes determining that a target text element is not in a set of reference text elements, information describing the target text element is obtained. The information comprises a set of descriptive text elements. A set of vectorized representations for the set of descriptive text elements is determined. A target vectorized representation for the target text element is determined based on the set of vectorized representations using a machine learning model. The machine learning model is trained to represent a predetermined association between the set of vectorized representations for the set of descriptive text elements describing the target text element and the target vectorized representation.Type: GrantFiled: July 21, 2020Date of Patent: May 30, 2023Assignee: International Business Machines CorporationInventors: Chao-Min Chang, Kuei-Ching Lee, Ci-Hao Wu, Chia-Heng Lin
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Patent number: 11646738Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.Type: GrantFiled: March 15, 2022Date of Patent: May 9, 2023Assignee: Realtek Semiconductor Corp.Inventors: Chao-Min Lai, Han-Chieh Hsieh, Tang-Hung Chang, Hung-Wei Wang, Chun-Yi Kuo
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Publication number: 20230087097Abstract: A booster engine enhances the quality of a frame sequence. The booster engine receives, from a first stage circuit, the frame sequence with quality degradation in at least a frame. The the quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine queries an information repository for reference information on the frame, using a query input based on at least a region of the frame to obtain a query output. The booster engine then applies a neural network to the query input and the query output to generate an optimized frame, and sends an enhanced frame sequence including the optimized frame to a second stage circuit.Type: ApplicationFiled: September 7, 2022Publication date: March 23, 2023Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiani Lu, Chao-Min Chang, Yu-Sheng Lin, Wai Mun Wong
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Publication number: 20230092969Abstract: An embodiment of the present invention is directed toward machine learning to produce results encompassing a new output. A machine learning model is trained to determine a candidate output from among a plurality of candidate outputs. First embeddings associated with the plurality of candidate outputs are generated from a first set of training data by an intermediate layer of the trained machine learning model. Second embeddings associated with a new candidate output are generated from a second set of training data by the intermediate layer of the trained machine learning model. A third embedding is determined for input data by the intermediate layer of the trained machine learning model. A resulting candidate output for the input data is predicted from a group of the plurality of candidate outputs and the new candidate output based on distances for the third embedding to the first and second embeddings.Type: ApplicationFiled: September 20, 2021Publication date: March 23, 2023Inventors: CHAO-MIN CHANG, Bo-Yu Kuo, Yu-Jin Chen, Yu-Chi Tang
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Publication number: 20230067568Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.Type: ApplicationFiled: August 24, 2022Publication date: March 2, 2023Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiung-Fu Chen, Wai Mun Wong, Chao-Min Chang, Yu-Sheng Lin, Chiani Lu, Chih-Cheng Chen
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Patent number: 11579643Abstract: The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.Type: GrantFiled: November 3, 2020Date of Patent: February 14, 2023Assignee: Realtek Semiconductor Corp.Inventors: Chao-Min Lai, Hung-Wei Wang, Tang-Hung Chang, Han-Chieh Hsieh, Chun-Yi Kuo