Abstract: An electronic system includes a main chip, a non-volatile storage circuit, and a detector circuit. The main chip is configured to read first time of a clock circuit. The non-volatile storage circuit is coupled to the main chip. The main chip stores the first time into the non-volatile storage circuit. The detector circuit includes a first output terminal. The first output terminal is coupled to the main chip. When a cold boot event occurs, the main chip reads the first time from the non-volatile storage circuit, and determines a reason of the cold boot event according to the first time, a second time of the clock circuit, and a logic value at the first output terminal.

Abstract: A computer-implemented method for automatically adjusting a Uniform Resource Locator (URL) seed list. The method includes crawling for documents based on a seed URL list. The method generates relations data from the documents using a Natural Language Processing (NLP) model. The method analyzes the relations data using an auto-seed model. The method modifies the seed URL list.

Abstract: Discloded is a light emitting devices including an electroluminescent unit that emits the light of wavelength I, and a color conversion layer that absorbs the light of wavelength I and emits the light of wavelength II are disclosed. The color conversion layer comprises at least one color conversion material having a structural unit of formula (1) or (2). Display devices containing the light emitting devices are also disclosed.

Abstract: A power supply circuit includes a first regulator and a second regulator. The first regulator is configured to generate a first output signal according to an input signal. A voltage value of the first output signal decreases according to the input signal and a first voltage threshold value at a power-off stage. The second regulator is configured to be enabled according to the first output signal to generate a second output signal according to the input signal. A voltage value of the second output signal decreases according to the input signal and a second voltage threshold value at the power-off stage. The second voltage threshold value is greater than the first voltage threshold value.

Abstract: A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.

Abstract: An approach for a fast and accurate word embedding model, “desc2vec,” for out-of-dictionary (OOD) words with a model learning from the dictionary descriptions of the word is disclosed. The approach includes determining that a target text element is not in a set of reference text elements, information describing the target text element is obtained. The information comprises a set of descriptive text elements. A set of vectorized representations for the set of descriptive text elements is determined. A target vectorized representation for the target text element is determined based on the set of vectorized representations using a machine learning model. The machine learning model is trained to represent a predetermined association between the set of vectorized representations for the set of descriptive text elements describing the target text element and the target vectorized representation.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

Abstract: A booster engine enhances the quality of a frame sequence. The booster engine receives, from a first stage circuit, the frame sequence with quality degradation in at least a frame. The the quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine queries an information repository for reference information on the frame, using a query input based on at least a region of the frame to obtain a query output. The booster engine then applies a neural network to the query input and the query output to generate an optimized frame, and sends an enhanced frame sequence including the optimized frame to a second stage circuit.

Abstract: An embodiment of the present invention is directed toward machine learning to produce results encompassing a new output. A machine learning model is trained to determine a candidate output from among a plurality of candidate outputs. First embeddings associated with the plurality of candidate outputs are generated from a first set of training data by an intermediate layer of the trained machine learning model. Second embeddings associated with a new candidate output are generated from a second set of training data by the intermediate layer of the trained machine learning model. A third embedding is determined for input data by the intermediate layer of the trained machine learning model. A resulting candidate output for the input data is predicted from a group of the plurality of candidate outputs and the new candidate output based on distances for the third embedding to the first and second embeddings.

Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.

Abstract: The present invention discloses an AVS scanning method, wherein the AVS scanning method includes the steps of: mounting a system on chip (SoC) on a printed circuit board (PCB), and connecting the SoC to a storage unit; enabling the SoC to read a boot code from the storage unit, and executing the boot code to perform an AVS scanning operation on the SoC to determine a plurality of target supply voltages respectively corresponding to a plurality of operating frequencies of the SoC to establish an AVS look-up table; and storing the AVS look-up table into the SoC or the storage unit.

Abstract: A method for receiving a full training data set including a plurality of individual training data set, dividing the plurality of individual training sets into N classes, where N is an integer greater than three, dividing the N classes into M full data classes and N-M partial data classes, performing training to obtain a trained fixed size machine learning (ML) classification model and a trained in-class confidence model, outputting a first set of prediction value(s) based on the performance of training, distributing each class of the N classes of individual training data sets to a different node of a distributed machine learning system; and outputting, from the nodes of the distributed machine learning system, a second set of prediction value(s) for each class of the N classes.

Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

Abstract: Net-based checking of a circuit design includes obtaining a circuit design comprising a plurality of polygons. Further, a shape of a first polygon of the plurality of polygons, and a shape of a second polygon of the plurality of polygons is determined. The shape of the first polygon differs from a shape of the second polygon. Violations within the circuit design are detected based on a comparison of the first polygon with the second polygon.

Abstract: An impact tool is provided, including a working portion and a handle. The working portion includes a housing which is made of rubber and a filler. The housing defines an inner space, and the filler is stuffed with the inner space. The filler is shear thickening non-Newtonian fluid. The handle is connected with the working potion.

Abstract: The present disclosure discloses an organic light-emitting device, which includes a first electrode and a hole injection layer laminated with each other and formed an ohmic contact therebetween. The hole injection layer is characterized by a carrier mobility of less than 2×10?5 CM2V?1S?1.

Abstract: A package substrate and a chip package structure using the same are provided. The package substrate includes a laminated board including first to third wiring layers, a pad array, a plurality of ground conductive structures, and a plurality of power conductive structures. At least one of the ground (or power) conductive structures includes two first ground (or power) conductive posts and a second ground (or power) conductive post. The two first ground (or power) conductive posts and the second ground (or power) conductive post are arranged along a first direction, and the second ground (or power) conductive post is located between two orthographic projections of the two first ground (or power) conductive posts. Each of the ground conductive structures in a first column and each of the power conductive structures in a second column are offset from each other in a second direction.

Abstract: An analog circuit is calibrated to perform neural network computing. Calibration input is provided to a pre-trained neural network that includes at least a given layer having pre-trained weights stored in the analog circuit. The analog circuit performs tensor operations of the given layer using the pre-trained weights. Statistics of calibration output from the analog circuit is calculated. Normalization operations to be performed during neural network inference are determined. The normalization operations incorporate the statistics of the calibration output and are performed at a normalization layer that follows the given layer. A configuration of the normalization operations is written into memory while the pre-trained weights stay unchanged.

Abstract: An audio receiver includes a first signal port, a second signal port, a power supply port, a power ground port, and an amplifier circuit. The first signal port is coupled to an audio signal line of a transmission interface. The second signal port is coupled to an audio ground line of the transmission interface. The power supply port is coupled to a power supply line of the transmission interface to generate a power supply level to the power supply line. The power ground port is connected to the ground level and to a power ground line of the transmission interface. When the audio receiver is outputting a power supply current to the audio source device through the power supply port via the power supply line, a connection state between the second signal port and the power ground port is at a high impedance state.

Abstract: A power supply circuit includes a first regulator and a second regulator. The first regulator is configured to generate a first output signal according to an input signal. A voltage value of the first output signal decreases according to the input signal and a first voltage threshold value at a power-off stage. The second regulator is configured to be enabled according to the first output signal to generate a second output signal according to the input signal. A voltage value of the second output signal decreases according to the input signal and a second voltage threshold value at the power-off stage. The second voltage threshold value is greater than the first voltage threshold value.