Patents by Inventor Chao-Min Chen

Chao-Min Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146205
    Abstract: A flyback power converter includes a power transformer, a first lossless voltage conversion circuit, a first low-dropout linear regulator and a secondary side power supply circuit. The first low-dropout linear regulator (LDO) generates a first operation voltage as power supply for being supplied to a sub-operation circuit. The secondary side power supply circuit includes a second lossless voltage conversion circuit and a second LDO. The second LDO generates a second operation voltage. The first operation voltage and the second operation voltage are shunted to a common node. When a first lossless conversion voltage is greater than a first threshold voltage, the second LDO is enabled to generate the second operation voltage to replace the first operation voltage as power supply supplied to the sub-operation circuit; wherein the second lossless conversion voltage is lower than the first lossless switching voltage.
    Type: Application
    Filed: September 23, 2023
    Publication date: May 2, 2024
    Inventors: Shin-Li Lin, He-Yi Shu, Shih-Jen Yang, Ta-Yung Yang, Yi-Min Shiu, Chih-Ching Lee, Yu-Chieh Hsieh, Chao-Chi Chen
  • Publication number: 20240088804
    Abstract: Provided is a motor braking device for a N-phase brushless motor. The motor braking device includes a switching circuit adapted to connect the N-phase brushless motor to a power supply, the switching circuit comprising a high side switch group and a low side switch group, each of the high side switch group and the low side switch group comprising N switching elements, and a control unit configured to control the switching circuit to brake the motor based on occurrence of a first event, the first event chosen from a group consisting of release of a trigger by a user, and occurrence of a predetermined condition as detected by a sensor. The control unit is configured to, upon occurrence of the first event, switch all the switching elements of one of the high side switch group or the low side switch group to an on-state, and simultaneously switch all the switching elements of the other one of the high side switch group and the lower side switch group to an off-state.
    Type: Application
    Filed: February 10, 2021
    Publication date: March 14, 2024
    Inventors: Bao An ZHANG, Zi Cong CHEN, Li Hua XIE, Chao WEN, Yong Min LI
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20180280476
    Abstract: The present invention provides novel methods of inhibiting fibrosis, as well as methods of treating or inhibiting fibrotic disorders, using BMP9 and/or BMP10 antagonists. The present invention also provides methods of assessing whether a subject has or is at risk of developing a fibrotic disorder by detecting levels of BMP9 and/or BMP10. Further provided are methods of assessing the efficacy of a treatment regimen for treating a fibrotic disorder by detecting and comparing pre-treatment levels of BMP9 and BMP10 with post-treatment levels of BMP9 and BMP10.
    Type: Application
    Filed: June 8, 2018
    Publication date: October 4, 2018
    Applicant: NOVARTIS AG
    Inventors: Alan Buckler, Chao-Min Chen, Chantale T. Guy, Jeffrey Hewett, Chris Xiangyang Lu, Jing Wu
  • Publication number: 20160228509
    Abstract: The present invention provides novel methods of inhibiting fibrosis, as well as methods of treating or inhibiting fibrotic disorders, using BMP9 and/or BMP10 antagonists. The present invention also provides methods of assessing whether a subject has or is at risk of developing a fibrotic disorder by detecting levels of BMP9 and/or BMP10. Further provided are methods of assessing the efficacy of a treatment regimen for treating a fibrotic disorder by detecting and comparing pre-treatment levels of BMP9 and BMP10 with post-treatment levels of BMP9 and BMP10.
    Type: Application
    Filed: March 28, 2013
    Publication date: August 11, 2016
    Inventors: Alan Buckler, Chao-Min Chen, Chantale T. Guy, Jeffrey Hewett, Chris Lu, Jing Wu
  • Publication number: 20130209490
    Abstract: The present invention provides novel methods of inhibiting fibrosis, as well as methods of treating or inhibiting fibrotic disorders, using BMP9 and/or BMP10 antagonists. The present invention also provides methods of assessing whether a subject has or is at risk of developing a fibrotic disorder by detecting levels of BMP9 and/or BMP10. Further provided are methods of assessing the efficacy of a treatment regimen for treating a fibrotic disorder by detecting and comparing pre-treatment levels of BMP9 and BMP10 with post-treatment levels of BMP9 and BMP10.
    Type: Application
    Filed: March 28, 2013
    Publication date: August 15, 2013
    Inventors: Alan Buckler, Chao-Min Chen, Chantale T. Guy, Jeffrey Hewett, Chris Lu, Jing Wu
  • Publication number: 20120183543
    Abstract: The present invention provides novel methods of inhibiting fibrosis, as well as methods of treating or inhibiting fibrotic disorders, using BMP9 and/or BMP10 antagonists. The present invention also provides methods of assessing whether a subject has or is at risk of developing a fibrotic disorder by detecting levels of BMP9 and/or BMP10. Further provided are methods of assessing the efficacy of a treatment regimen for treating a fibrotic disorder by detecting and comparing pre-treatment levels of BMP9 and BMP10 with post-treatment levels of BMP9 and BMP10.
    Type: Application
    Filed: May 7, 2010
    Publication date: July 19, 2012
    Applicant: NOVARTIS AG
    Inventors: Alan Buckler, Chao-Min Chen, Chantale T. Guy, Jeffrey Hewett
  • Publication number: 20120056223
    Abstract: A LED package structure includes a supporting substrate, a first electrically-conductive structure, a LED chip, an insulating layer and a second electrically-conductive structure. The supporting substrate includes a top surface, a bottom surface and a first channel. The first electrically-conductive structure is filled in the first channel and partially formed on the top and bottom surfaces of the supporting substrate. The LED chip is disposed over the supporting substrate. The insulating layer is formed over the supporting substrate and on bilateral sides of the LED chip. The insulating layer has a second channel corresponding to the first electrically-conductive structure. The second electrically-conductive structure is filled in the second channel and partially formed on the insulating layer, and connected with an electrode of the LED chip. The LED chip and the top and bottom surfaces of the supporting substrate are connected with each other through the first and second electrically-conductive structures.
    Type: Application
    Filed: May 9, 2011
    Publication date: March 8, 2012
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Hsieh-Shen Hsieh, Chao-Min Chen, Li-Fan Lin, Shih-Peng Chen, Huang-Kun Chen
  • Publication number: 20120012882
    Abstract: A light emitting diode (LED) device includes a stacked epitaxial structure, a heat-conductive plate and a seed layer. The stacked epitaxial structure sequentially includes a first semiconductor layer (N—GaN), a light emitting layer, and a second semiconductor layer (P—GaN). The heat-conductive plate is disposed on the first semiconductor layer, and the seed layer is disposed between the first semiconductor layer and the heat-conductive plate. Also, the present invention discloses a manufacturing method thereof including the steps of: forming at least one temporary substrate, which is made by a curable polymer material, on an LED device, and forming at least a heat-conductive plate on the LED device.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Inventors: Ching-Chuan Shiue, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen
  • Patent number: 8048696
    Abstract: A light emitting diode (LED) device includes a stacked epitaxial structure, a heat-conductive plate and a seed layer. The stacked epitaxial structure sequentially includes a first semiconductor layer (N—GaN), a light emitting layer, and a second semiconductor layer (P—GaN). The heat-conductive plate is disposed on the first semiconductor layer, and the seed layer is disposed between the first semiconductor layer and the heat-conductive plate. Also, the present invention discloses a manufacturing method thereof including the steps of: forming at least one temporary substrate, which is made by a curable polymer material, on an LED device, and forming at least a heat-conductive plate on the LED device.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: November 1, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Ching-Chuan Shiue, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen
  • Patent number: 7910941
    Abstract: A light-emitting diode (LED) apparatus includes an epitaxial multilayer, a micro/nano rugged layer and an anti-reflection layer. The epitaxial multilayer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The micro/nano rugged layer is disposed on the first semiconductor layer of the epitaxial multilayer. The anti-reflection layer is disposed on the micro/nano rugged layer. In addition, a manufacturing method of the LED apparatus is also disclosed.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: March 22, 2011
    Assignee: Delta Electronics, Inc.
    Inventors: Shih-Peng Chen, Ching-Chuan Shiue, Chao-Min Chen, Horng-Jou Wang, Huang-Kun Chen
  • Patent number: 7867795
    Abstract: A manufacturing method of a light emitting diode (LED) apparatus includes the steps of: forming at least one temporary substrate, which is made by a curable material, on a LED device; and forming at least a thermal-conductive substrate on the LED device. The manufacturing method does not need the step of adhering the semiconductor structure onto another substrate by using an adhering layer, and can make the devices to be in sequence separated after removing the temporary substrate, thereby obtaining several LED apparatuses. As a result, the problem of current leakage due to the cutting procedure can be prevented so as to reduce the production cost and increase the production yield.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: January 11, 2011
    Assignee: Delta Electronics Inc.
    Inventors: Ching-Chuan Shiue, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen
  • Patent number: 7816703
    Abstract: A light-emitting diode device includes an epitaxial layer, a current blocking layer and a current spreading layer. The current blocking layer is disposed on one side of the epitaxial layer and contacts with a portion of the epitaxial layer. The current spreading layer is disposed on one side of the epitaxial layer and contacts with at least a portion of the current blocking layer.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: October 19, 2010
    Assignee: Delta Electronics, Inc.
    Inventors: Chao-Min Chen, Shih-Peng Chen, Ching-Chuan Shiue, Huang-Kun Chen
  • Publication number: 20090152583
    Abstract: A light-emitting diode device includes an epitaxial layer, a current blocking layer and a current spreading layer. The current blocking layer is disposed on one side of the epitaxial layer and contacts with a portion of the epitaxial layer. The current spreading layer is disposed on one side of the epitaxial layer and contacts with at least a portion of the current blocking layer.
    Type: Application
    Filed: November 12, 2008
    Publication date: June 18, 2009
    Inventors: Chao-Min Chen, Shih-Peng Chen, Ching-Chuan Shiue, Huang-Kun Chen
  • Publication number: 20090090930
    Abstract: A manufacturing method of an epitaxial substrate includes the steps of: forming a sacrificial layer, which has a first micro/nano structure, on a substrate; and forming a buffer layer on the sacrificial layer. The sacrificial layer comprises a plurality of micro/nano particles, and the first micro/nano structure is formed after the plurality of micro/nano particles are removed. An epitaxial substrate and a manufacturing method of a light emitting diode (LED) apparatus are also disclosed.
    Type: Application
    Filed: August 26, 2008
    Publication date: April 9, 2009
    Inventors: Shih-Peng Chen, Ching-Chuan Shiue, Chao-Min Chen, Cheng-Huang Kuo, Huang-Kun Chen
  • Publication number: 20090050909
    Abstract: A light-emitting diode (LED) apparatus includes an epitaxial layer and an etching mask layer. The epitaxial layer has a first semiconductor layer, an active layer and a second semiconductor layer in sequence. The etching mask layer is disposed on the epitaxial layer and has a plurality of hollows. The second semiconductor layer includes a roughing structure.
    Type: Application
    Filed: July 24, 2008
    Publication date: February 26, 2009
    Inventors: Chao-Min CHEN, Shih-Peng Chen, Ching-Chuan Shiue, Huang-Kun Chen
  • Publication number: 20090014738
    Abstract: A light emitting diode (LED) device includes a stacked epitaxial structure, a heat-conductive plate and a seed layer. The stacked epitaxial structure sequentially includes a first semiconductor layer (N—GaN), a light emitting layer, and a second semiconductor layer (P—GaN). The heat-conductive plate is disposed on the first semiconductor layer, and the seed layer is disposed between the first semiconductor layer and the heat-conductive plate. Also, the present invention discloses a manufacturing method thereof including the steps of: forming at least one temporary substrate, which is made by a curable polymer material, on an LED device, and forming at least a heat-conductive plate on the LED device.
    Type: Application
    Filed: February 7, 2008
    Publication date: January 15, 2009
    Inventors: Ching-Chuan Shiue, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen
  • Publication number: 20090014747
    Abstract: A manufacturing method of a light emitting diode (LED) apparatus includes the steps of: forming at least one temporary substrate, which is made by a curable material, on a LED device; and forming at least a thermal-conductive substrate on the LED device. The manufacturing method does not need the step of adhering the semiconductor structure onto another substrate by using an adhering layer, and can make the devices to be in sequence separated after removing the temporary substrate, thereby obtaining several LED apparatuses. As a result, the problem of current leakage due to the cutting procedure can be prevented so as to reduce the production cost and increase the production yield.
    Type: Application
    Filed: June 20, 2008
    Publication date: January 15, 2009
    Inventors: Ching-Chuan SHIUE, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen
  • Publication number: 20080296598
    Abstract: A light-emitting diode (LED) apparatus includes an epitaxial layer and a current spreading layer. The epitaxial layer has a first semiconductor layer, an active layer and a second semiconductor layer. The current spreading layer is disposed on the first semiconductor layer of the epitaxial layer and has a micro/nano roughing structure layer and a transparent conductive layer. The micro/nano roughing structure layer has a plurality of hollow parts, and the transparent conductive layer covers a surface of the micro/nano roughing structure layer and is filled within the hollow parts. In addition, a manufacturing method of the LED apparatus and a current spreading layer with a micro/nano structure are also disclosed.
    Type: Application
    Filed: February 12, 2008
    Publication date: December 4, 2008
    Inventors: Horng-Jou WANG, Ching-Chuan Shiue, Shih-Peng Chen, Chao-Min Chen, Huang-Kun Chen