Patents by Inventor Chao Yu

Chao Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060027654
    Abstract: A structurally integrated and simplified card reader includes a data I/O interface, via which data are input or output to or from the card reader; a managing system for controlling and managing data input/output to/from the card reader; at least one data reading device adapted to connect to at least one type of memory device for controlling access of data input/output to/from the memory device; and at least one data-sharing control device for providing a path for accessing data input/output to/from the memory device. When the data I/O interface is connected to a computer system, and the memory device is connected to the data reading device and the data-sharing control device, the managing system and the computer system cooperate to detect and control data input/output to/from the memory device via the path provided by the data-sharing control device.
    Type: Application
    Filed: August 4, 2004
    Publication date: February 9, 2006
    Inventors: Chi-Tung Chang, Wen-Chao Tseng, Chao-Yu Chen
  • Patent number: 6991935
    Abstract: The invention provides adenoviral vectors (preferably replication competent) comprising both an E3 sequence and at least one adenoviral gene under transcriptional control of a target cell-specific transcriptional response element. These vectors display significantly improved cytotoxicity, which is especially useful in the cancer context, in which selective destruction of target cells is desirable. The invention further provides host cells comprising the vectors. The invention further provides methods of using the adenoviral vectors.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: January 31, 2006
    Assignee: Cell Genesys, Inc.
    Inventors: Daniel R. Henderson, De-Chao Yu
  • Publication number: 20060006233
    Abstract: A method of self-detecting and dynamically displaying detected results for a card reader used to read flash memory cards includes the steps of sending out a detecting code to each card slot or any flash memory card inserted therein via detecting circuits provided on and controlled by a control chip in the card reader; storing a detected state code sent back by the detecting circuits in a state register of the control chip; sending the state code from the state register to a computer; comparing and determining the state code in the computer; displaying a current state of the card slot or the flash memory card inserted therein on a screen of the computer; and periodically repeating the self-detecting and displaying to always show the most current state of the card slots on the card reader or the inserted flash memory card.
    Type: Application
    Filed: July 12, 2004
    Publication date: January 12, 2006
    Inventors: Chi-Tung Chang, Hung-Chou Tsai, Chao-Yu Chen
  • Publication number: 20060006232
    Abstract: A card reader includes at least one card slot for a memory card to insert therein, a USB plug allowing hot attach and detach to and from a computer, and an IDE slot provided at one side of the card reader for a hard disk having an IDE slot to connect thereto. Therefore, with the card reader, a general hard disk may be treated as a high-capacity memory card and connected to the card reader in the manner of hot attach and detach.
    Type: Application
    Filed: July 12, 2004
    Publication date: January 12, 2006
    Inventors: Chi-Tung Chang, I-Chieh Lin, Chao-Yu Chen
  • Patent number: 6959066
    Abstract: The present invention relates to a programmable frequency divider having one n-bit adder and one n-bit D Flip Flop. These are used to transform the import clock to the target clock. The adder takes one adjustment parameter and one return signal as a basis to create the first output signal, with the possibility to program the adjustment parameter. The D Flip Flop and the adder create a cycle, which is used to receive the first output signal and its import clock to create the second output signal. The second output signal is separated into a return signal and the target signal. The D Flip Flop sends the return signal back to the adder, which will make addition calculations under the adjustment parameter, finally giving out the target clock with the target signal as a calculation basis.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: October 25, 2005
    Assignee: Elan Microelectronics Corp.
    Inventors: Jung-Chih Wang, Chao-Yu Hu
  • Patent number: 6957116
    Abstract: A quality assurance system and method for use between a service provider having a sequence of process stages and a quality assurance stage, and a control center. The service provider performs a plurality of processes on goods at the process stages, transfers engineering data corresponding to the processes to the control center via Internet, and holds the goods at the quality assurance. The control center compares the engineering data with a standard specification, and transfers a confirmation message to the service provider if the engineering data conforms to the standard specification. The service provider may ship the goods to customers after the confirmation message is received.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: October 18, 2005
    Assignee: Taiwan Semiconductor Manufcturing Co., Ltd.
    Inventors: Jung-Yi Tsai, Chao-Yu Chang, Chui-Chung Chiu, Shu-Jung Tseng
  • Publication number: 20050212403
    Abstract: A process for producing an active matrix organic light-emitting diode (AMOLED) display is provided. The process includes steps of providing a substrate; forming an active matrix structure having a first semiconductor layer on the substrate; and forming a driving circuit structure having a second semiconductor layer on the substrate wherein the grain size of the second semiconductor layer is larger than that of the first semiconductor layer. The planar display with improved uniform luminance generated from the process is also provided. It includes the substrate; the active matrix structure having the first semiconductor layer with smaller grain size; and the driving circuit structure having the second semiconductor with larger grain size.
    Type: Application
    Filed: September 10, 2004
    Publication date: September 29, 2005
    Inventors: Yaw-Ming Tsai, Shih-Chang Chang, An Shih, Chao-Yu Meng
  • Patent number: 6916918
    Abstract: Enhancers which preferentially increase the transcription of cis-linked coding sequences in prostate cells are provided. Methods of using DNA constructs comprising the enhancers to control transcription of heterologous polynucleotides are also provided. Delivery vehicles comprising the enhancers and methods of using the vehicles are also provided. Adenovirus vectors in which one or more genes are under transcriptional control of the enhancers of the invention are also provided. Further provided are methods of using the adenovirus vectors of the invention to confer selective cytotoxicity in mammalian cells.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: July 12, 2005
    Assignee: Cell Genesys, Inc.
    Inventors: De Chao Yu, Daniel R. Henderson, Eric R. Schuur
  • Patent number: 6911200
    Abstract: The invention provides methods of treating neoplasia using combinations of target cell-specific replication competent adenoviral vectors and chemotherapy, radiation therapy or combinations thereof. The adenoviral vectors are target cell-specific for the particular type of neoplasia for which treatment is necessary and the combination with the chemotherapy and/or radiation leads to synergistic treatment over existing adenoviral therapy or traditional chemotherapy and radiation therapy.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: June 28, 2005
    Assignee: Cell Genesys, Inc.
    Inventors: De-Chao Yu, Yu Chen, Daniel R. Henderson
  • Patent number: 6900049
    Abstract: The present invention provides adenoviral vectors comprising cell status-specific transcriptional regulatory elements which confer cell status-specific transcriptional regulation on an adenoviral gene. A “cell status” is generally a reversible physiological and/or environmental state. The invention further provides compositions and host cells comprising the vectors, as well as methods of using the vectors.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: May 31, 2005
    Assignee: Cell Genesys, Inc.
    Inventors: De Chao Yu, Daniel R. Henderson
  • Publication number: 20050099376
    Abstract: An image sticking elimination circuit is provided for an abnormal power-off of a display unit. The image sticking elimination circuit comprises: a charge storage device and an isolation device. The isolation device being turned on when the abnormal power-off of a display occurs; wherein the charge storage device releases charges stored therein when the isolation device is turned on.
    Type: Application
    Filed: October 7, 2004
    Publication date: May 12, 2005
    Inventors: An Shih, Wenlong Weng, Chien-Chih Chen, Chao-Yu Meng
  • Patent number: 6891719
    Abstract: A panel antenna (2) and a method for installing the same on an electronic device (not labeled), includes a panel (101), an antenna body (21), a cable (23), and a connector (22). The electronic device includes a case (1), with at least an expansion slot (100) openable on a surface of the case. The antenna body is mounted on the panel and the panel antenna is received in the expansion slot. The installation method includes the following steps: attaching the antenna body and the connector to either end of the cable; attaching the antenna body to the inside wall of the panel; electrically connecting the connector of the panel antenna to the mating connector (not labeled) of the electronic device; mounting the panel with the antenna body attached thereon in one of the expansion slots of the computer, with the engaging sides screwed or engaging with the opening of the expansion slot and the panel covering the opening.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: May 10, 2005
    Assignee: Hon Hai Precision Ind. Co., Ltd.
    Inventors: Hsien-Chu Lin, Chieh Chao Yu, Yung-Chien Chung
  • Publication number: 20050080938
    Abstract: A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state.
    Type: Application
    Filed: December 3, 2004
    Publication date: April 14, 2005
    Inventors: Jen-Pin Su, Chun-Chieh Wu, Chao-Yu Chen
  • Publication number: 20050077914
    Abstract: A non-destructive contact test method for testing an electric characteristic of a test object is provided. The method includes providing an apparatus having a conductor, wherein the conductor is in a liquid state; and using the conductor to contact a surface of the test object for testing the electric characteristic of the test object. Thus, damage to the test object during the test can be effectively avoided.
    Type: Application
    Filed: May 18, 2004
    Publication date: April 14, 2005
    Inventors: Wen-Yuan Guo, Chao-Yu Meng
  • Publication number: 20050075749
    Abstract: A quality assurance system and method for use between a service provider having a sequence of process stages and a quality assurance stage, and a control center. The service provider performs a plurality of processes on goods at the process stages, transfers engineering data corresponding to the processes to the control center via Internet, and holds the goods at the quality assurance. The control center compares the engineering data with a standard specification, and transfers a confirmation message to the service provider if the engineering data conforms to the standard specification. The service provider may ship the goods to customers after the confirmation message is received.
    Type: Application
    Filed: October 3, 2003
    Publication date: April 7, 2005
    Inventors: Jung-Yi Tsai, Chao-Yu Chang, Chui-Chung Chiu, Shu-Jung Tseng
  • Patent number: 6852528
    Abstract: The invention provides new urothelial cell specific transcriptional regulatory sequences derived from human uroplakin II (hUPII), as well as polynucleotide constructs such as adenoviral vectors and methods of using hUPII-derived TREs. Additionally, the invention provides adenoviral vectors comprising a gene, preferably an adenovirus gene, under transcriptional control of a urothelial cell-specific transcriptional regulatory element (TRE). These vectors display urothelial cell-specific cytotoxicity, which is especially useful in the context of bladder cancer, in which destruction of these cells is desirable. The invention further provides compositions and host cells comprising the vectors, as well as method of using the adenoviral vectors.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: February 8, 2005
    Assignee: Cell Genesys, Inc.
    Inventors: De-Chao Yu, Hong Zhang, Daniel R. Henderson
  • Patent number: 6845444
    Abstract: A method is provided to reduce strapping devices in a computer system having at least one configurable device, which includes the following steps. A configuration value stored in a non-volatile memory is first provided. During power-up and reset of the computer system, a processor reset signal and a bus reset signal of a high-speed peripheral bus are both asserted, wherein the high-speed peripheral bus is included in the computer system. When an operation clock of the high-speed peripheral bus reaches its working voltage and frequency, the configuration value is fetched from the non-volatile memory. The fetching step is repeated until a most significant bit (MSB) of a fetched configuration value changes from a first state to a second state.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: January 18, 2005
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Jen-Pin Su, Chun-Chieh Wu, Chao-Yu Chen
  • Patent number: 6845415
    Abstract: A computing system is adapted for use with an optical disk drive, and includes a motherboard and a control key. The motherboard is adapted to be coupled electrically to the optical disk drive. The control key is coupled electrically to the motherboard, and is operable so as to provide a control signal to the motherboard. The motherboard is adapted to control disk loading and disk unloading operations of the optical disk drive in accordance with the control signal provided by the control key.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: January 18, 2005
    Assignee: Micro-Star Int'l Co., Ltd.
    Inventors: Chao-Yu Chen, Simon Fang, Hen-Yu Neo
  • Publication number: 20040238822
    Abstract: The present invention provides a thin film transistor circuit having high aperture ratio. The circuit includes a first thin film transistor, a data line, and an adjusting capacitor. The first thin film transistor includes a semiconductor layer and a gate electrode. The semiconductor layer includes a drain region and a source region. The data line is connected to the source region of the first thin film transistor. The adjusting capacitor includes a first electrode plate connected to the drain region of the first thin film transistor. And the adjusting capacitor is covered by the data line.
    Type: Application
    Filed: May 14, 2004
    Publication date: December 2, 2004
    Inventors: Chao-Yu Meng, An Shih
  • Publication number: 20040236870
    Abstract: A computing system is adapted for use with an optical disk drive, and includes a motherboard and a control key. The motherboard is adapted to be coupled electrically to the optical disk drive. The control key is coupled electrically to the motherboard, and is operable so as to provide a control signal to the motherboard. The motherboard is adapted to control disk loading and disk unloading operations of the optical disk drive in accordance with the control signal provided by the control key.
    Type: Application
    Filed: May 22, 2003
    Publication date: November 25, 2004
    Inventors: Chao-Yu Chen, Simon Fang, Hen-Yu Neo