Patents by Inventor Chao-Wei Li

Chao-Wei Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Publication number: 20240096740
    Abstract: Provided is a package structure including a first redistribution layer (RDL) structure, a die, a circuit substrate, and a first thermoelectric cooler. The RDL) structure has a first side and a second side opposite to each other. The die is disposed on the first side of the first RDL structure. The circuit substrate is bonded to the second side of the first RDL structure through a plurality of first conductive connectors. The first thermoelectric cooler is between the first RDL structure and the circuit substrate, wherein the first thermoelectric cooler includes at least a N-type doped region and at least a P-type doped region.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Chiu, Chao-Wei Li, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240071953
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240071954
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20240063081
    Abstract: A package structure including a semiconductor die, an encapsulant, a redistribution structure, and a through insulating via is provided. The first redistribution structure includes an insulating layer and a circuit layer. The semiconductor die is disposed on the first redistribution structure. The semiconductor die includes a semiconductor base, through semiconductor vias, a dielectric layer, and bonding connectors. Through semiconductor vias penetrate through the semiconductor base. The dielectric layer is disposed on a backside of the semiconductor base. The dielectric layer of the semiconductor die is bonded with the insulating layer of the first redistribution structure. The bonding connectors are embedded in the dielectric layer and connected to the through semiconductor vias. The bonding connectors of the semiconductor die are bonded with bonding pads of the circuit layer. The encapsulant is disposed on the first redistribution structure and encapsulates the semiconductor die.
    Type: Application
    Filed: August 17, 2022
    Publication date: February 22, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Fung Chang, Sheng-Feng Weng, Ming-Yu Yen, Wei-Jhan Tsai, Chao-Wei Chiu, Chao-Wei Li, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11855006
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11842421
    Abstract: The present disclosure provides a watermark embedding method including following steps. Values of predetermined grayscale program are respectively multiplied by a value of time series data to generate grayscale information of a watermark signal. In a first time period and a second time period included in each of continuous cycles, phases of the time series data are opposite and averages values of the predetermined grayscale program are the same, and a sum of the grayscale information of the watermark signal in the first time period and the second time period is zero. The watermark signal is embedded into a first local dimming signal by the processing circuit to generate a second local dimming signal to control light intensities of local dimming zones according to the second local dimming data with the watermark information.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: December 12, 2023
    Assignee: AUO CORPORATION
    Inventors: Wei-Ming Cheng, Chao-Wei Li, Cheng-Kuang Wang, Yang-En Wu, Wen-Rei Guo
  • Patent number: 11803080
    Abstract: The present invention provides a polarizer module and an operation method thereof. The polarizer module includes a bifacial reflective polarizer, a first liquid crystal layer, a second liquid crystal layer, a first polarizer, and a second polarizer. The bifacial reflective polarizer has a first surface and a second surface opposite to each other. The first liquid crystal layer and the second liquid crystal layer are disposed on the first surface and the second surface respectively. The first polarizer and the second polarizer are disposed on the first liquid crystal layer and the second liquid crystal layer respectively.
    Type: Grant
    Filed: May 4, 2022
    Date of Patent: October 31, 2023
    Assignee: Au Optronics Corporation
    Inventors: Syuan-Ling Yang, Guan-Yu Chen, Chao-Wei Li
  • Patent number: 11656493
    Abstract: Provided is a display apparatus including a first cholesteric liquid crystal panel, a second cholesteric liquid crystal panel, and a third cholesteric liquid crystal panel. The first cholesteric liquid crystal panel has a light receiving surface. The second cholesteric liquid crystal panel overlaps the first cholesteric liquid crystal panel and is disposed on a side of the first cholesteric liquid crystal panel away from the light receiving surface. The third cholesteric liquid crystal panel overlaps the second cholesteric liquid crystal panel and is disposed on a side of the second cholesteric liquid crystal panel away from the first cholesteric liquid crystal panel. One of the first cholesteric liquid crystal panel, the second cholesteric liquid crystal panel, and the third cholesteric liquid crystal panel is provided with multiple first light shielding patterns separated from each other.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: May 23, 2023
    Assignee: Au Optronics Corporation
    Inventors: Chao-Wei Li, Wei-Ming Cheng, Yi-Ling Lin
  • Publication number: 20230154764
    Abstract: A method includes forming a first metal mesh over a carrier, forming a first dielectric layer over the first metal mesh, and forming a second metal mesh over the first dielectric layer. The first metal mesh and the second metal mesh are staggered. The method further includes forming a second dielectric layer over the second metal mesh, attaching a device die over the second dielectric layer, with the device die overlapping the first metal mesh and the second metal mesh, encapsulating the device die in an encapsulant, and forming redistribution lines over and electrically connecting to the device die.
    Type: Application
    Filed: March 21, 2022
    Publication date: May 18, 2023
    Inventors: Tzu-Sung Huang, Tsung-Hsien Chiang, Ming Hung Tseng, Hao-Yi Tsai, Yu-Hsiang Hu, Chih-Wei Lin, Lipu Kris Chuang, Wei Lun Tsai, Kai-Ming Chiang, Ching Yao Lin, Chao-Wei Li, Ching-Hua Hsieh
  • Publication number: 20230062468
    Abstract: A package structure including a substrate, a first semiconductor element disposed on and electrically connected with the substrate, a second semiconductor element disposed on and electrically connected with the substrate and a molding layer disposed over the substrate and covering at least a top surface of the substrate. The second semiconductor element and the first semiconductor element perform different functions. The molding layer encapsulates the second semiconductor element and wraps around sidewalls of the first semiconductor element. A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element, so that the top surface of the first semiconductor element is exposed.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Hsiang Chiu, Chia-Min Lin, Tzu-Ting Chou, Sheng-Feng Weng, Chao-wei Li, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20230067664
    Abstract: A package structure includes a circuit substrate, a package element and a molding layer. The package element is disposed on the circuit substrate and is electrically connected with the circuit substrate. The molding layer is disposed over the circuit substrate and covers at least a top surface of the circuit substrate. The molding layer includes a first portion wrapping around sidewalls of the package element and having a first thickness, and a second portion surrounding the first portion and connected with the first portion. The first thickness of the first portion is larger than a second thickness of the second portion. A top surface of the first portion of the molding layer is higher than a top surface of the package element.
    Type: Application
    Filed: July 15, 2022
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Li, Tzu-Ting Chou, Chun-Yen Lan, Yu-Wei Lin, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20230035212
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20220260767
    Abstract: The present invention provides a polarizer module and an operation method thereof. The polarizer module includes a bifacial reflective polarizer, a first liquid crystal layer, a second liquid crystal layer, a first polarizer, and a second polarizer. The bifacial reflective polarizer has a first surface and a second surface opposite to each other. The first liquid crystal layer and the second liquid crystal layer are disposed on the first surface and the second surface respectively. The first polarizer and the second polarizer are disposed on the first liquid crystal layer and the second liquid crystal layer respectively.
    Type: Application
    Filed: May 4, 2022
    Publication date: August 18, 2022
    Applicant: Au Optronics Corporation
    Inventors: Syuan-Ling Yang, Guan-Yu Chen, Chao-Wei Li
  • Patent number: 10824034
    Abstract: A display module includes a display panel and an electronically controlled shutter including polarizers, conductive layers, supporting members, and a display medium layer. Each pixel of the display panel has a first edge and a second edge. A shape unit composed of any four supporting members adjacent to one another has a third edge and a fourth edge. An angle between the third edge and the first edge is larger than or equal to 0 degrees. An angle between the fourth edge and the second edge is larger than 0 degrees. Lengths of the first, second, third, and fourth edges are respectively X, Y, X?, and Y?. Any four supporting members adjacent to one another satisfy at least one of Condition 1: X?>X and X??nX; and Condition 2: Y?>Y and Y??nY, wherein n is a positive integer.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: November 3, 2020
    Assignee: Au Optronics Corporation
    Inventors: Chao-Wei Li, Ju-Chin Chen, Syuan-Ling Yang
  • Publication number: 20200201093
    Abstract: The present invention provides a polarizer module and an operation method thereof. The polarizer module includes a bifacial reflective polarizer, a first liquid crystal layer, a second liquid crystal layer, a first polarizer, and a second polarizer. The bifacial reflective polarizer has a first surface and a second surface opposite to each other. The first liquid crystal layer and the second liquid crystal layer are disposed on the first surface and the second surface respectively. The first polarizer and the second polarizer are disposed on the first liquid crystal layer and the second liquid crystal layer respectively.
    Type: Application
    Filed: August 7, 2019
    Publication date: June 25, 2020
    Applicant: Au Optronics Corporation
    Inventors: Syuan-Ling Yang, Guan-Yu Chen, Chao-Wei Li
  • Patent number: 9052418
    Abstract: A light source module optically coupled to an optical fiber which has a light incident surface is provided. The light source module includes a plurality of light sources and a concentrator. The light sources surround an axis, and the axis passes through a center of the light incident surface and is perpendicular to the light incident surface. Each of the light sources is capable of emitting a beam along a transmitting path toward the axis. The concentrator is disposed at the axis and includes a curvy reflective surface located on the transmitting paths for reflecting the beams to the light incident surface of the optical fiber.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: June 9, 2015
    Assignees: Industrial Technology Research Institute, KARL STORZ GmbH&Co.KG
    Inventors: Hsueh-Chih Chang, Hung-Lieh Hu, Chao-Wei Li
  • Publication number: 20150098240
    Abstract: A light source module optically coupled to an optical fiber which has a light incident surface is provided. The light source module includes a plurality of light sources and a concentrator. The light sources surround an axis, and the axis passes through a center of the light incident surface and is perpendicular to the light incident surface. Each of the light sources is capable of emitting a beam along a transmitting path toward the axis. The concentrator is disposed at the axis and includes a curvy reflective surface located on the transmitting paths for reflecting the beams to the light incident surface of the optical fiber.
    Type: Application
    Filed: October 8, 2013
    Publication date: April 9, 2015
    Applicants: KARL STORZ GmbH&Co.KG, Industrial Technology Research Institute
    Inventors: Hsueh-Chih Chang, Hung-Lieh Hu, Chao-Wei Li
  • Patent number: 8979313
    Abstract: A semiconductor light source device is provided. The semiconductor light source device includes a light guide, at least one semiconductor light source set and at least one light transformation coupler. The light transformation coupler is disposed between the semiconductor light source set and the light guide for guiding the light emitted from the semiconductor light source set to the light guide. The light transformation coupler has an inclined surface and a curved surface. The inclined surface is a multi-level inclined surface with several slopes.
    Type: Grant
    Filed: December 11, 2012
    Date of Patent: March 17, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chun-Hsing Lee, Hung-Lieh Hu, Ya-Hui Chiang, Chao-Wei Li, Chen-Kun Chen
  • Patent number: 8926130
    Abstract: An illumination device including a base, a heat dissipation member, at least one flexible printed circuit board (FPC), and a plurality of light-emitting elements is provided. The heat dissipation member disposed on the base has a central axis, a plurality of holding curvy surfaces and a plurality of heat dissipation channels extending along the central axis, wherein the holding curvy surfaces and the heat dissipation channels are staggered and arranged about the central axis, and each of the holding curvy surfaces radially extends along the central axis. The flexible printed circuit board is disposed on the holding curvy surfaces. The light-emitting elements are disposed on the flexible printed circuit board. An assembling method of the illumination device is also provided.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: January 6, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Chao-Wei Li, Hung-Lieh Hu, Chun-Chuan Lin, Chen-Peng Hsu, Hsin-Hsiang Lo, Ji-Feng Chen