Abstract: A package assembly and a manufacturing method thereof are provided. The package assembly includes a photonic integrated circuit component, an electric integrated circuit component, a lens and an optical signal port. The photonic integrated circuit component comprises an optical input/output portion configured to transmit and receive optical signal. The electric integrated circuit component is electrically connected to the photonic integrated circuit component. The lens is disposed on a sidewall of the photonic integrated circuit component. The optical signal port is optically coupled to the optical input/output portion.

Abstract: A package structure is provided. The package structure comprises a package substrate, an electronic device, a thermal interface material (TIM), a lid and an insulating encapsulant. The electronic device is disposed on and electrically connected to the package substrate. The TIM is disposed on the electronic device. The lid is disposed on the TIM. The insulating encapsulant is disposed on the package substrate and laterally encapsulates the electronic device and the TIM. A lateral dimension of the TIM is greater than a lateral dimension of the electronic device.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized to transmit and receive optical signals to and from an optical device. In embodiments the mirror structure receives optical signals from outside of an optical device and directs the optical signals through at least one mirror to an optical component of the optical device.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: Provided is a package structure including a first redistribution layer (RDL) structure, a die, a circuit substrate, and a first thermoelectric cooler. The RDL) structure has a first side and a second side opposite to each other. The die is disposed on the first side of the first RDL structure. The circuit substrate is bonded to the second side of the first RDL structure through a plurality of first conductive connectors. The first thermoelectric cooler is between the first RDL structure and the circuit substrate, wherein the first thermoelectric cooler includes at least a N-type doped region and at least a P-type doped region.

Abstract: A watermark embedding method includes the following steps. The input video signal is received by a processing circuit. Grayscale information of a watermark signal is generated by the processing circuit according to a time series data and a predetermined plane. During a dark sate and a bright state in each of a plurality of consecutive periods, phases of the time series data are opposite and integral values of the grayscales of the predetermined plane are the same. The processing circuit embeds the watermark signal into the input video signal to generate an output video signal with the watermark information. The display panel displays an image according to the output video signal.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A package structure including a semiconductor die, an encapsulant, a redistribution structure, and a through insulating via is provided. The first redistribution structure includes an insulating layer and a circuit layer. The semiconductor die is disposed on the first redistribution structure. The semiconductor die includes a semiconductor base, through semiconductor vias, a dielectric layer, and bonding connectors. Through semiconductor vias penetrate through the semiconductor base. The dielectric layer is disposed on a backside of the semiconductor base. The dielectric layer of the semiconductor die is bonded with the insulating layer of the first redistribution structure. The bonding connectors are embedded in the dielectric layer and connected to the through semiconductor vias. The bonding connectors of the semiconductor die are bonded with bonding pads of the circuit layer. The encapsulant is disposed on the first redistribution structure and encapsulates the semiconductor die.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: The present disclosure provides a watermark embedding method including following steps. Values of predetermined grayscale program are respectively multiplied by a value of time series data to generate grayscale information of a watermark signal. In a first time period and a second time period included in each of continuous cycles, phases of the time series data are opposite and averages values of the predetermined grayscale program are the same, and a sum of the grayscale information of the watermark signal in the first time period and the second time period is zero. The watermark signal is embedded into a first local dimming signal by the processing circuit to generate a second local dimming signal to control light intensities of local dimming zones according to the second local dimming data with the watermark information.

Abstract: The present invention provides a polarizer module and an operation method thereof. The polarizer module includes a bifacial reflective polarizer, a first liquid crystal layer, a second liquid crystal layer, a first polarizer, and a second polarizer. The bifacial reflective polarizer has a first surface and a second surface opposite to each other. The first liquid crystal layer and the second liquid crystal layer are disposed on the first surface and the second surface respectively. The first polarizer and the second polarizer are disposed on the first liquid crystal layer and the second liquid crystal layer respectively.

Abstract: Provided is a display apparatus including a first cholesteric liquid crystal panel, a second cholesteric liquid crystal panel, and a third cholesteric liquid crystal panel. The first cholesteric liquid crystal panel has a light receiving surface. The second cholesteric liquid crystal panel overlaps the first cholesteric liquid crystal panel and is disposed on a side of the first cholesteric liquid crystal panel away from the light receiving surface. The third cholesteric liquid crystal panel overlaps the second cholesteric liquid crystal panel and is disposed on a side of the second cholesteric liquid crystal panel away from the first cholesteric liquid crystal panel. One of the first cholesteric liquid crystal panel, the second cholesteric liquid crystal panel, and the third cholesteric liquid crystal panel is provided with multiple first light shielding patterns separated from each other.

Abstract: A method includes forming a first metal mesh over a carrier, forming a first dielectric layer over the first metal mesh, and forming a second metal mesh over the first dielectric layer. The first metal mesh and the second metal mesh are staggered. The method further includes forming a second dielectric layer over the second metal mesh, attaching a device die over the second dielectric layer, with the device die overlapping the first metal mesh and the second metal mesh, encapsulating the device die in an encapsulant, and forming redistribution lines over and electrically connecting to the device die.

Abstract: A package structure including a substrate, a first semiconductor element disposed on and electrically connected with the substrate, a second semiconductor element disposed on and electrically connected with the substrate and a molding layer disposed over the substrate and covering at least a top surface of the substrate. The second semiconductor element and the first semiconductor element perform different functions. The molding layer encapsulates the second semiconductor element and wraps around sidewalls of the first semiconductor element. A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element, so that the top surface of the first semiconductor element is exposed.

Abstract: A package structure includes a circuit substrate, a package element and a molding layer. The package element is disposed on the circuit substrate and is electrically connected with the circuit substrate. The molding layer is disposed over the circuit substrate and covers at least a top surface of the circuit substrate. The molding layer includes a first portion wrapping around sidewalls of the package element and having a first thickness, and a second portion surrounding the first portion and connected with the first portion. The first thickness of the first portion is larger than a second thickness of the second portion. A top surface of the first portion of the molding layer is higher than a top surface of the package element.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: The present invention provides a polarizer module and an operation method thereof. The polarizer module includes a bifacial reflective polarizer, a first liquid crystal layer, a second liquid crystal layer, a first polarizer, and a second polarizer. The bifacial reflective polarizer has a first surface and a second surface opposite to each other. The first liquid crystal layer and the second liquid crystal layer are disposed on the first surface and the second surface respectively. The first polarizer and the second polarizer are disposed on the first liquid crystal layer and the second liquid crystal layer respectively.

Abstract: A display module includes a display panel and an electronically controlled shutter including polarizers, conductive layers, supporting members, and a display medium layer. Each pixel of the display panel has a first edge and a second edge. A shape unit composed of any four supporting members adjacent to one another has a third edge and a fourth edge. An angle between the third edge and the first edge is larger than or equal to 0 degrees. An angle between the fourth edge and the second edge is larger than 0 degrees. Lengths of the first, second, third, and fourth edges are respectively X, Y, X?, and Y?. Any four supporting members adjacent to one another satisfy at least one of Condition 1: X?>X and X??nX; and Condition 2: Y?>Y and Y??nY, wherein n is a positive integer.