Abstract: A first embodiment of the disclosure provides a system for detection of intrusion into a working space of a material testing device wherein visual user detection system uses digital image processing and filtering in order to identify user entry into the specimen test space. The visual user detection system has built-in redundancy for safety compliance and further can be used for data entry with respect to test data setup and configuration. A second embodiment of the disclosure uses a digital camera mounted on the frame of the material testing device, oriented toward a striped pattern on the top of the front base cover. The striped pattern is recognized by a vision algorithm which creates virtual boundary lines within the pattern. A detected intrusion, such as by a user body part, will be detected and the material testing machine put into a safe state.

Abstract: A first embodiment of the disclosure provides a system for detection of intrusion into a working space of a material testing device wherein visual user detection system uses digital image processing and filtering in order to identify user entry into the specimen test space. The visual user detection system has built-in redundancy for safety compliance and further can be used for data entry with respect to test data setup and configuration. A second embodiment of the disclosure uses a digital camera mounted on the frame of the material testing device, oriented toward a striped pattern on the top of the front base cover. The striped pattern is recognized by a vision algorithm which creates virtual boundary lines within the pattern. A detected intrusion, such as by a user body part, will be detected and the material testing machine put into a safe state.

Abstract: A dual bus interface PCB includes a main chipset component, a first type bus interface connector, and a second type bus interface connector. The PCB can be configured at fabrication time to enable a variety of configurations for operation. Optionally, the PCB can also be provided at least one memory chip and a NIC (Network Interface Card) chip. By virtue of having a dual interface, the PCB can be used with either the first type or the second type bus. Furthermore, the dual interface PCB eliminates the need by chipset manufacturers to carry multiple PCB variations of the same product in order to support various bus interfaces. In one embodiment, the PCB is a dual PCI-X/PCI-E interface PCB.

Abstract: A dual bus interface PCB includes a main chipset component, a first type bus interface connector, and a second type bus interface connector. The PCB can be configured at fabrication time to enable a variety of configurations for operation. Optionally, the PCB can also be provided at least one memory chip and a NIC (Network Interface Card) chip. By virtue of having a dual interface, the PCB can be used with either the first type or the second type bus. Furthermore, the dual interface PCB eliminates the need by chipset manufacturers to carry multiple PCB variations of the same product in order to support various bus interfaces. In one embodiment, the PCB is a dual PCI-X/PCI-E interface PCB.

Abstract: A system provides dual use of a general purpose input/output (I/O) line. In an embodiment, the system comprises a controlling circuit having a dual purpose I/O line that is selectively operable in a serial transmit mode or an I/O mode. A first circuit that receives a serial data stream when the controlling circuit operates in the serial transmit mode is coupled to the I/O line. A second circuit that generates and transmits a signal when the controlling circuit operates in the I/O mode is also coupled to the I/O line. Finally, a third circuit is disposed between the second circuit and the I/O line. In an embodiment, when the controlling circuit operates in the serial transmit mode, the third circuit maintains the second circuit in an idle state, and when the controlling circuit operates in the I/O mode, the third circuit permits the second circuit to transmit the signal to the controlling circuit.

Abstract: A system provides dual use of a general purpose input/output (I/O) line. In an embodiment, the system comprises a controlling circuit having a dual purpose I/O line that is selectively operable in a serial transmit mode or an I/O mode. A first circuit that receives a serial data stream when the controlling circuit operates in the serial transmit mode is coupled to the I/O line. A second circuit that generates and transmits a signal when the controlling circuit operates in the I/O mode is also coupled to the I/O line. Finally, a third circuit is disposed between the second circuit and the I/O line. In an embodiment, when the controlling circuit operates in the serial transmit mode, the third circuit maintains the second circuit in an idle state, and when the controlling circuit operates in the I/O mode, the third circuit permits the second circuit to transmit the signal to the controlling circuit.

Abstract: An LED interface circuit provides connection options for one or more types of LEDs. In an embodiment, the circuit includes an input node that receives an LED control signal, and an output that has a first output node, and a second output node. A driving circuit is disposed between the input header and the output. The driving circuit has a non-inverted input node and an inverted output node. In an embodiment, the inverted output node is capable of sinking current. The non-inverted input node is coupled to the input header and to the first output node, while the inverted output node is coupled to the second output node. The output of the LED interface circuit is capable of driving a plurality of different types of LED displays.

Abstract: A system provides dual use of a general purpose input/output (I/O) line. In an embodiment, the system comprises a controlling circuit having a dual purpose I/O line that is selectively operable in a serial transmit mode or an I/O mode. A first circuit that receives a serial data stream when the controlling circuit operates in the serial transmit mode is coupled to the I/O line. A second circuit that generates and transmits a signal when the controlling circuit operates in the I/O mode is also coupled to the I/O line. Finally, a third circuit is disposed between the second circuit and the I/O line. In an embodiment, when the controlling circuit operates in the serial transmit mode, the third circuit maintains the second circuit in an idle state, and when the controlling circuit operates in the I/O mode, the third circuit permits the second circuit to transmit the signal to the controlling circuit.