Patents by Inventor Charles L. Ingalls
Charles L. Ingalls has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9076501Abstract: Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense amplifier circuit configured to be coupled to a digit line and configured to, during a memory access operation, drive the digit line to a voltage that indicates the logical value of the charge stored by a memory cell coupled to the digit line. During an initial time period of the memory access operation, the sense amplifier circuit is configured to drive the digit line to a first voltage that indicates the logical value of the charge stored by the memory cell. After the initial time period, the sense amplifier circuit is configured to drive the digit line to a second voltage different than the first voltage that indicates the logical value of the charge stored by the memory cell.Type: GrantFiled: August 19, 2013Date of Patent: July 7, 2015Assignee: Micron Technology, Inc.Inventors: Zhong-yi Xia, Scott J. Derner, Charles L. Ingalls, Howard C. Kirsch
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Patent number: 9070425Abstract: Some embodiments include apparatuses and methods having a first data line, a second data line, a first transistor, a sense amplifier, and a circuit. The first transistor can operate to couple the first data line to a first node during a first stage of an operation of obtaining information from a memory cell associated with the first data line. The second transistor can operate to couple the second data line to a second node during the first stage. The circuit can operate to apply a first signal to a gate of the first transistor during the operation and to apply a second signal to a gate of the second transistor during the operation. The sense amplifier can operate to perform a sense function on the first and second data lines during a second stage of the operation. Additional apparatus and methods are described.Type: GrantFiled: October 31, 2013Date of Patent: June 30, 2015Assignee: Micron Technology, Inc.Inventors: Scott J. Derner, Charles L. Ingalls, Howard Kirsch, Tae H. Kim
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Publication number: 20150117124Abstract: Some embodiments include apparatuses and methods having a first data line, a second data line, a first transistor, a sense amplifier, and a circuit. The first transistor can operate to couple the first data line to a first node during a first stage of an operation of obtaining information from a memory cell associated with the first data line. The second transistor can operate to couple the second data line to a second node during the first stage. The circuit can operate to apply a first signal to a gate of the first transistor during the operation and to apply a second signal to a gate of the second transistor during the operation. The sense amplifier can operate to perform a sense function on the first and second data lines during a second stage of the operation. Additional apparatus and methods are described.Type: ApplicationFiled: October 31, 2013Publication date: April 30, 2015Applicant: Micron Technology, Inc.Inventors: Scott J. Derner, Charles L. Ingalls, Howard Kirsch, Tae H. Kim
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Publication number: 20150049565Abstract: Apparatuses, sense amplifier circuits, and methods for operating a sense amplifier circuit in a memory are described. An example apparatus includes a sense amplifier circuit configured to be coupled to a digit line and configured to, during a memory access operation, drive the digit line to a voltage that indicates the logical value of the charge stored by a memory cell coupled to the digit line. During an initial time period of the memory access operation, the sense amplifier circuit is configured to drive the digit line to a first voltage that indicates the logical value of the charge stored by the memory cell. After the initial time period, the sense amplifier circuit is configured to drive the digit line to a second voltage different than the first voltage that indicates the logical value of the charge stored by the memory cell.Type: ApplicationFiled: August 19, 2013Publication date: February 19, 2015Applicant: Micron Technology, Inc.Inventors: Zhong-yi Xia, Scott J. Derner, Charles L. Ingalls, Howard C. Kirsch
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Publication number: 20140226427Abstract: Memory subsystems and methods, such as those involving a memory cell array formed over a semiconductor material of a first type, such as p-type substrate. In at least one such subsystem, all of the transistors used to selectively access cells within the array are transistors of a second type, such as n-type transistors. Local word line drivers are coupled to respective word lines extending through the array. Each local word line drivers includes at least one transistor. However, all of the transistors in the local word line drivers are of the second type. A well of semiconductor material of the second type, is also formed in the material of the first type, and a plurality of global word line drivers are formed using the well. Other subsystems and methods are disclosed.Type: ApplicationFiled: April 16, 2014Publication date: August 14, 2014Applicant: Micron Technology, Inc.Inventors: Tae Kim, Howard C. Kirsch, Charles L. Ingalls, Shigeki Tomishima, K. Shawn Smith
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Patent number: 8737157Abstract: Memory subsystems and methods, such as those involving a memory cell array formed over a semiconductor material of a first type, such as p-type substrate. In at least one such subsystem, all of the transistors used to selectively access cells within the array are transistors of a second type, such as n-type transistors. Local word line drivers are coupled to respective word lines extending through the array. Each local word line drivers includes at least one transistor. However, all of the transistors in the local word line drivers are of the second type. A well of semiconductor material of the second type, is also formed in the material of the first type, and a plurality of global word line drivers are formed using the well. Other subsystems and methods are disclosed.Type: GrantFiled: November 16, 2011Date of Patent: May 27, 2014Assignee: Micron Technology, Inc.Inventors: Tae Kim, Howard C. Kirsch, Charles L. Ingalls, Shigeki Tomishima, K. Shawn Smith
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Publication number: 20140085992Abstract: Sense amplifiers and methods for precharging are disclosed, including a sense amplifier having a pair of cross-coupled complementary transistor inverters, and a pair of transistors, each one of the pair of transistors coupled to a respective one of the complementary transistor inverters and a voltage. The sense amplifier further includes a capacitance coupled between the pair of transistors. One method for precharging includes coupling input nodes of the sense amplifier to a precharge voltage, coupling the input nodes of the sense amplifier together, and coupling a resistance to each transistor of a cross-coupled pair to set a voltage threshold (VT) mismatch compensation voltage for each transistor. The voltage difference between the VT mismatch compensation voltage of each transistor is stored.Type: ApplicationFiled: December 2, 2013Publication date: March 27, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: J. Wayne Thompson, Howard C. Kirsch, Charles L. Ingalls
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Patent number: 8598912Abstract: Sense amplifiers and methods for precharging are disclosed, including a sense amplifier having a pair of cross-coupled complementary transistor inverters, and a pair of transistors, each one of the pair of transistors coupled to a respective one of the complementary transistor inverters and a voltage. The sense amplifier further includes a capacitance coupled between the pair of transistors. One method for precharging includes coupling input nodes of the sense amplifier to a precharge voltage, coupling the input nodes of the sense amplifier together, and coupling a resistance to each transistor of a cross-coupled pair to set a voltage threshold (VT) mismatch compensation voltage for each transistor. The voltage difference between the VT mismatch compensation voltage of each transistor is stored.Type: GrantFiled: June 14, 2010Date of Patent: December 3, 2013Assignee: Micron Technology, Inc.Inventors: J. Wayne Thompson, Howard C. Kirsch, Charles L. Ingalls
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Publication number: 20120063256Abstract: Memory subsystems and methods, such as those involving a memory cell array formed over a semiconductor material of a first type, such as p-type substrate. In at least one such subsystem, all of the transistors used to selectively access cells within the array are transistors of a second type, such as n-type transistors. Local word line drivers are coupled to respective word lines extending through the array. Each local word line drivers includes at least one transistor. However, all of the transistors in the local word line drivers are of the second type. A well of semiconductor material of the second type, is also formed in the material of the first type, and a plurality of global word line drivers are formed using the well. Other subsystems and methods are disclosed.Type: ApplicationFiled: November 16, 2011Publication date: March 15, 2012Applicant: Micron Technology, Inc.Inventors: Tae Kim, Howard C. Kirsch, Charles L. Ingalls, Shigeki Tomishima, K. Shawn Smith
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Publication number: 20110317509Abstract: Memory subsystems and methods, such as those involving a memory cell array formed over a semiconductor material of a first type, such as p-type substrate. In at least one such subsystem, all of the transistors used to selectively access cells within the array are transistors of a second type, such as n-type transistors. Local word line drivers are coupled to respective word lines extending through the array. Each local word line drivers includes at least one transistor. However, all of the transistors in the local word line drivers are of the second type. A well of semiconductor material of the second type, is also formed in the material of the first type, and a plurality of global word line drivers are formed using the well. Each global word line driver includes at least one transistor of the first type. Other subsystems and methods are disclosed.Type: ApplicationFiled: May 4, 2011Publication date: December 29, 2011Applicant: Micron Technology, Inc.Inventors: TAE KIM, Howard C. Kirsch, Charles L. Ingalls, Shigeki Tomishima
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Publication number: 20110304358Abstract: Sense amplifiers and methods for precharging are disclosed, including a sense amplifier having a pair of cross-coupled complementary transistor inverters, and a pair of transistors, each one of the pair of transistors coupled to a respective one of the complementary transistor inverters and a voltage. The sense amplifier further includes a capacitance coupled between the pair of transistors. One method for precharging includes coupling input nodes of the sense amplifier to a precharge voltage, coupling the input nodes of the sense amplifier together, and coupling a resistance to each transistor of a cross-coupled pair to set a voltage threshold (VT) mismatch compensation voltage for each transistor. The voltage difference between the VT mismatch compensation voltage of each transistor is stored.Type: ApplicationFiled: June 14, 2010Publication date: December 15, 2011Applicant: Micron Technology, Inc.Inventors: J. Wayne Thompson, Howard C. Kirsch, Charles L. Ingalls
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Patent number: 7986578Abstract: Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.Type: GrantFiled: November 18, 2009Date of Patent: July 26, 2011Assignee: Micron Technology, Inc.Inventors: Tae Kim, Charles L. Ingalls, David Pinney, Howard Kirsch
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Publication number: 20100061158Abstract: Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.Type: ApplicationFiled: November 18, 2009Publication date: March 11, 2010Inventors: Tae Kim, Charles L. Ingalls, David Pinney, Howard Kirsch
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Patent number: 7626877Abstract: Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.Type: GrantFiled: March 6, 2009Date of Patent: December 1, 2009Assignee: Micron Technology, Inc.Inventors: Tae Kim, Charles L. Ingalls, David Pinney, Howard Kirsch
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Publication number: 20090168551Abstract: Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.Type: ApplicationFiled: March 6, 2009Publication date: July 2, 2009Inventors: Tae Kim, Charles L. Ingalls, David Pinney, Howard Kirsch
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Patent number: 7512025Abstract: A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and further coupling a memory cell to the first digit line. At least one digit line other than the first and second digit lines is driven to a reference voltage level and the at least one digit line is coupled to the second digit line to establish a reference voltage in the second digit line. A voltage differential is sensed between the first digit line and the second digit line, and a data state based on the voltage differential is latched in response.Type: GrantFiled: January 18, 2008Date of Patent: March 31, 2009Assignee: Micron Technology, Inc.Inventors: Sei Seung Yoon, Charles L. Ingalls, David Pinney, Howard C. Kirsch
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Patent number: 7505341Abstract: Systems and methods of sensing a data state coupled to a digit line and for coupling a digit line to a sense amplifier. In sensing the data state coupled to the digit line, the digit line is coupled to a sense node and driving voltages provided to the sense amplifier. The data state is latched in response to the driving voltages. In coupling the digit line to a sense amplifier, the digit line is coupled to the sense amplifier for a first time period and decoupled from the sense amplifier for a second time period. The digit line is coupled to the sense amplifier at a controlled rate following the second time period.Type: GrantFiled: May 17, 2006Date of Patent: March 17, 2009Assignee: Micron Technology, Inc.Inventors: Tae Kim, Charles L. Ingalls, David Pinney, Howard Kirsch
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Patent number: 7460430Abstract: Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.Type: GrantFiled: August 1, 2006Date of Patent: December 2, 2008Assignee: Micron Technology, Inc.Inventors: Tae H. Kim, Charles L. Ingalls, Howard C. Kirsch, Jeremy J. Gum
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Patent number: 7417916Abstract: Memory devices configured to reduce coupling noise between adjacent wordlines in a memory array. More specifically, wordline drivers are interleaved such that adjacent wordlines are driven by wordline drivers enabled by different row decoders. Each wordline driver includes a weak transistor to ground and a strong transistor to ground. By disabling the wordline driver on the wordlines directly adjacent to the active wordlines, a path is provided to drive the coupling noise from the active wordline to ground through the strong transistor.Type: GrantFiled: August 1, 2006Date of Patent: August 26, 2008Assignee: Micron Technology, Inc.Inventors: Tae H. Kim, Charles L. Ingalls, Howard C. Kirsch, Jeremy J. Gum
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Publication number: 20080137458Abstract: A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and further coupling a memory cell to the first digit line. At least one digit line other than the first and second digit lines is driven to a reference voltage level and the at least one digit line is coupled to the second digit line to establish a reference voltage in the second digit line. A voltage differential is sensed between the first digit line and the second digit line, and a data state based on the voltage differential is latched in response.Type: ApplicationFiled: January 18, 2008Publication date: June 12, 2008Inventors: Sei Seung Yoon, Charles L. Ingalls, David Pinney, Howard C. Kirsch