Patents by Inventor Chau-Chun Wen
Chau-Chun Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10991681Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The three-dimensional package structure is applicable to a POL, (Point of Load) converter.Type: GrantFiled: February 2, 2020Date of Patent: April 27, 2021Assignee: CYNTEC CO., LTD.Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Publication number: 20200176429Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The three-dimensional package structure is applicable to a POL, (Point of Load) converter.Type: ApplicationFiled: February 2, 2020Publication date: June 4, 2020Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 10593656Abstract: The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.Type: GrantFiled: January 19, 2017Date of Patent: March 17, 2020Assignee: CYNTEC CO., LTDInventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 9741708Abstract: Provided is a transient voltage suppressor including a substrate, a well region of a first conductivity type, a first doped region of a second conductivity type, and a second doped region of the second conductivity type. The substrate is electrically floating. The well region is located in the substrate. The first doped region is located in the well region to form a diode, and the first doped region is electrically connected to a first voltage. The second doped region is located in the well region, and the second doped region is electrically connected to a second voltage.Type: GrantFiled: June 25, 2015Date of Patent: August 22, 2017Assignee: UBIQ Semiconductor Corp.Inventors: Kei-Kang Hung, Chau-Chun Wen
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Publication number: 20170133355Abstract: The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.Type: ApplicationFiled: January 19, 2017Publication date: May 11, 2017Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 9601412Abstract: The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.Type: GrantFiled: September 13, 2012Date of Patent: March 21, 2017Assignee: CYNTEC CO., LTD.Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 9443809Abstract: A portable apparatus, an IC packaging structure, an IC packaging object, and an IC packaging method thereof are disclosed. The IC packaging structure includes an IC packaging object and a substrate. The packaging object includes a die and a metallurgy layer. The die has a contact portion, a saw reserved portion, and a seal ring. The seal ring is disposed between the contact portion and the saw reserved portion. The metallurgy layer is disposed on the contact portion. At least a part of the metallurgy layer overlaps the seal ring. The metallurgy layer includes a solderable layer coated by a solder paste. The substrate includes a solder pad. The solder pad is coupled to the solderable layer coated by the solder paste.Type: GrantFiled: June 5, 2015Date of Patent: September 13, 2016Assignee: UPI SEMICONDUCTOR CORPORATIONInventors: Chau-Chun Wen, Hsing-Wu Li
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Publication number: 20160181236Abstract: Provided is a transient voltage suppressor including a substrate, a well region of a first conductivity type, a first doped region of a second conductivity type, and a second doped region of the second conductivity type. The substrate is electrically floating. The well region is located in the substrate. The first doped region is located in the well region to form a diode, and the first doped region is electrically connected to a first voltage. The second doped region is located in the well region, and the second doped region is electrically connected to a second voltage.Type: ApplicationFiled: June 25, 2015Publication date: June 23, 2016Inventors: Kei-Kang Hung, Chau-Chun Wen
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Publication number: 20160099198Abstract: A semiconductor package apparatus includes a lead frame, a first semiconductor chip, a second semiconductor chip, a first connecting element, and a second connecting element. The lead frame includes a power input plate, a ground plate, a phase plate, and a phase detection plate. The second electrode of first semiconductor chip is disposed on the power input plate. The first electrode of second semiconductor chip is disposed on the ground plate. The first connecting element is disposed on the first semiconductor chip and the second semiconductor chip and electrically connects the first electrode of first semiconductor chip with the second electrode of second semiconductor chip. The second connecting element is disposed on the second semiconductor chip and phase plate and electrically connects the second electrode of second semiconductor chip with the phase plate. The first connecting element and the phase detection plate are electrically connected.Type: ApplicationFiled: June 5, 2015Publication date: April 7, 2016Inventor: Chau-Chun Wen
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Publication number: 20160027742Abstract: A portable apparatus, an IC packaging structure, an IC packaging object, and an IC packaging method thereof are disclosed. The IC packaging structure includes an IC packaging object and a substrate. The packaging object includes a die and a metallurgy layer. The die has a contact portion, a saw reserved portion, and a seal ring. The seal ring is disposed between the contact portion and the saw reserved portion. The metallurgy layer is disposed on the contact portion. At least a part of the metallurgy layer overlaps the seal ring. The metallurgy layer includes a solderable layer coated by a solder paste. The substrate includes a solder pad. The solder pad is coupled to the solderable layer coated by the solder paste.Type: ApplicationFiled: June 5, 2015Publication date: January 28, 2016Inventors: Chau-Chun Wen, Hsing-Wu Li
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Patent number: 9184672Abstract: A DC-to-AC power conversion method is provided, including: generating an AC reference signal and an AC zero crossing detection signal; generating an error signal based on the AC reference signal and an output current or an output voltage at an AC output terminal; generating a turn-off signal based on the error signal and an input current at a DC input terminal; detecting or predicting a valley voltage of a resonance voltage to generate a turn-on signal; generating first, second, third and fourth switching signals based on the AC zero crossing detection signal, the turn-off signal and the turn-on signal; and controlling first, second, third and fourth switching elements of power conversion modules with the first, second, third and fourth switching signals, to enable the first and second power conversion modules to convert the input current of the DC input terminal to the output current of the AC output terminal.Type: GrantFiled: July 11, 2013Date of Patent: November 10, 2015Assignee: Industrial Technology Research InstituteInventors: Chau-Chun Wen, Ming-Hung Yu
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Patent number: 8837168Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.Type: GrantFiled: January 31, 2013Date of Patent: September 16, 2014Assignee: Cyntec Co., Ltd.Inventors: Da-Jung Chen, Chau-Chun Wen, Chun-Tiao Liu
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Patent number: 8824165Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.Type: GrantFiled: July 19, 2011Date of Patent: September 2, 2014Assignee: Cyntec Co. LtdInventors: Da-Jung Chen, Chau-Chun Wen, Chun-Tiao Liu
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Publication number: 20140185341Abstract: A DC-to-AC power conversion method is provided, including: generating an AC reference signal and an AC zero crossing detection signal; generating an error signal based on the AC reference signal and an output current or an output voltage at an AC output terminal; generating a turn-off signal based on the error signal and an input current at a DC input terminal; detecting or predicting a valley voltage of a resonance voltage to generate a turn-on signal; generating first, second, third and fourth switching signals based on the AC zero crossing detection signal, the turn-off signal and the turn-on signal; and controlling first, second, third and fourth switching elements of power conversion modules with the first, second, third and fourth switching signals, to enable the first and second power conversion modules to convert the input current of the DC input terminal to the output current of the AC output terminal.Type: ApplicationFiled: July 11, 2013Publication date: July 3, 2014Inventors: Chau-Chun WEN, Ming-Hung YU
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Publication number: 20130001756Abstract: The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.Type: ApplicationFiled: September 13, 2012Publication date: January 3, 2013Applicant: CYNTEC CO., LTD.Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 8338933Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The shielding layer is disposed between the control component and at least part of the magnetic body to inhibit or reduce EMI (Electro-Magnetic Interference) from the energy storage element and to get a tiny package structure. The three-dimensional package structure is applicable to a POL (Point of Load) converter.Type: GrantFiled: July 22, 2011Date of Patent: December 25, 2012Assignee: Cyntec Co., Ltd.Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 8338928Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The shielding layer is disposed between the control component and at least part of the magnetic body to inhibit or reduce EMI (Electro-Magnetic Interference) from the energy storage element and to get a tiny package structure. The three-dimensional package structure is applicable to a POL (Point of Load) converter.Type: GrantFiled: August 30, 2007Date of Patent: December 25, 2012Assignee: Cyntec Co., Ltd.Inventors: Da-Jung Chen, Chun-Tiao Liu, Chau-Chun Wen
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Patent number: 8247891Abstract: A chip package structure including a substrate, at least one chip, a plurality of leads, a heat dissipation device, a molding compound, and at least one insulating sheet is provided. The chip is disposed on the substrate. The leads are electrically connected to the substrate. The molding compound having a top surface encapsulates the chip, the substrate, and a portion of the leads. The heat dissipation device is disposed on the top surface of the molding compound. The insulating sheet disposed between the heat dissipation device and at least one of the leads has a bending line dividing the insulating sheet into a main body disposed on the molding compound and a bending portion extending from the main body.Type: GrantFiled: June 24, 2009Date of Patent: August 21, 2012Assignee: Cyntec Co., Ltd.Inventors: Chau-Chun Wen, Da-Jung Chen, Bau-Ru Lu, Chun-Hsien Lu
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Publication number: 20120014079Abstract: An electronic package structure including at least one first electronic element, a second electronic element and a lead frame is provided. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.Type: ApplicationFiled: July 19, 2011Publication date: January 19, 2012Applicant: CYNTEC CO. LTD.Inventors: Da-Jung CHEN, Chau-Chun WEN, Chun-Tiao LIU
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Publication number: 20110278704Abstract: A three-dimensional package structure includes an energy storage element, a semiconductor package body and a shielding layer. The semiconductor package body has a plurality of second conductive elements and at least one control device inside. The energy storage element is disposed on the semiconductor package body. The energy storage element including a magnetic body is electrically connected to the second conductive elements. The semiconductor package body or the energy storage element has a plurality of first conductive elements to be electrically connected to an outside device. The shielding layer is disposed between the control component and at least part of the magnetic body to inhibit or reduce EMI (Electro-Magnetic Interference) from the energy storage element and to get a tiny package structure. The three-dimensional package structure is applicable to a POL (Point of Load) converter.Type: ApplicationFiled: July 22, 2011Publication date: November 17, 2011Applicant: CYNTEC CO., LTD.Inventors: Da-Jung CHEN, Chun-Tiao LIU, Chau-Chun WEN