Patents by Inventor Chau Fatt Chiang

Chau Fatt Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210050227
    Abstract: A method for fabricating an electronic device includes providing an encapsulant having an encapsulation material, providing a first laser beam and forming a trench into a main surface of the encapsulant by removing the encapsulation material by means of the first laser beam, forming a mask along a portion above the edge of the trench, and providing a second laser beam and sweeping the second laser beam over a surface area of the main surface of the encapsulant, wherein the surface area covers at least an area spatially confined by the trench.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Pei Luan Pok, Roslie Saini bin Bakar, Chau Fatt Chiang, Chee Hong Lee, Swee Kah Lee, Yu Shien Leong, Jan Sing Loh, Yean Seng Ng
  • Publication number: 20210025774
    Abstract: A pressure sensor includes a lidless structure defining an internal chamber for a sealed environment and presenting an aperture; a chip including a membrane deformable on the basis of external pressure, the chip being mounted outside the lidless structure in correspondence to the aperture so that the membrane closes the sealed environment; and a circuitry configured to provide a pressure measurement information based on the deformation of the membrane.
    Type: Application
    Filed: June 2, 2020
    Publication date: January 28, 2021
    Inventors: Chau Fatt Chiang, Paul Armand Asentista Calo, Chan Lam Cha, Kok Yau Chua, Jo Ean Chye, Chee Hong Lee, Swee Kah Lee, Theng Chao Long, Jayaganasan Narayanasamy, Khay Chwan Saw
  • Publication number: 20210020547
    Abstract: A method of producing a molded semiconductor package includes: attaching a first load terminal at a first side of a semiconductor die to a leadframe, the semiconductor die having a second load terminal at a second side opposite the first side and a control terminal at the first side or the second side; encapsulating the semiconductor die in a laser-activatable mold compound so that the leadframe is at least partly exposed from the laser-activatable mold compound at a first side of the molded semiconductor package, and the second load terminal is at least partly exposed from the laser-activatable mold compound at a second side of the molded semiconductor package opposite the first side; and laser activating a first region of the laser-activatable mold compound to form a first laser-activated region which forms part of an electrical connection to the second load terminal.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: Chau Fatt Chiang, Swee Kah Lee, Josef Maerz, Thomas Stoek, Chee Voon Tan
  • Publication number: 20210020550
    Abstract: A method of producing a molded semiconductor package includes: attaching a first load terminal at a first side of a semiconductor die to a leadframe, the semiconductor die having a second load terminal at a second side opposite the first side and a control terminal at the first side or the second side; encapsulating the semiconductor die in a laser-activatable mold compound so that the leadframe is at least partly exposed from the laser-activatable mold compound at a first side of the molded semiconductor package, and the second load terminal is at least partly exposed from the laser-activatable mold compound at a second side of the molded semiconductor package opposite the first side; and laser activating a first region of the laser-activatable mold compound to form a first laser-activated region that is electrically conductive.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 21, 2021
    Inventors: Chau Fatt Chiang, Swee Kah Lee, Josef Maerz, Thomas Stoek, Chee Voon Tan
  • Patent number: 10886199
    Abstract: A method of producing a molded semiconductor package includes: attaching a first load terminal at a first side of a semiconductor die to a leadframe, the semiconductor die having a second load terminal at a second side opposite the first side and a control terminal at the first side or the second side; encapsulating the semiconductor die in a laser-activatable mold compound so that the leadframe is at least partly exposed from the laser-activatable mold compound at a first side of the molded semiconductor package, and the second load terminal is at least partly exposed from the laser-activatable mold compound at a second side of the molded semiconductor package opposite the first side; and laser activating a first region of the laser-activatable mold compound to form a first laser-activated region which forms part of an electrical connection to the second load terminal.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: January 5, 2021
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Swee Kah Lee, Josef Maerz, Thomas Stoek, Chee Voon Tan
  • Publication number: 20200321269
    Abstract: A semiconductor package includes an electrically insulating first encapsulant body having an upper surface, a first semiconductor die encapsulated within the first encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the first encapsulant body, a plurality of electrically conductive leads, each of the leads having interior ends that are encapsulated within the first encapsulant body and outer ends that are exposed from the first encapsulant body, and a first direct electrical connection between the first conductive pad and the interior end of a first lead from the plurality. The first direct electrical connection includes a first conductive track formed in the upper surface of the first encapsulant body. The first encapsulant body includes a laser activatable mold compound. The first conductive track is formed in a first laser activated region of the laser activatable mold compound.
    Type: Application
    Filed: May 15, 2019
    Publication date: October 8, 2020
    Inventors: Chau Fatt Chiang, Khay Chwan Saw
  • Publication number: 20200321276
    Abstract: A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.
    Type: Application
    Filed: April 4, 2019
    Publication date: October 8, 2020
    Inventors: Khay Chwan Saw, Chau Fatt Chiang, Stefan Macheiner, Wae Chet Yong
  • Patent number: 10796981
    Abstract: A semiconductor package includes an electrically insulating first encapsulant body having an upper surface, a first semiconductor die encapsulated within the first encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the first encapsulant body, a plurality of electrically conductive leads, each of the leads having interior ends that are encapsulated within the first encapsulant body and outer ends that are exposed from the first encapsulant body, and a first direct electrical connection between the first conductive pad and the interior end of a first lead from the plurality. The first direct electrical connection includes a first conductive track formed in the upper surface of the first encapsulant body. The first encapsulant body includes a laser activatable mold compound. The first conductive track is formed in a first laser activated region of the laser activatable mold compound.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: October 6, 2020
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Khay Chwan Saw
  • Patent number: 10777536
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: September 15, 2020
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Publication number: 20200185293
    Abstract: Embodiments of molded packages and corresponding methods of manufacture are provided. In an embodiment of a molded package, the molded package includes a laser-activatable mold compound having a plurality of laser-activated regions which are plated with an electrically conductive material to form metal pads and/or metal traces at a first side of the laser-activatable mold compound. A semiconductor die embedded in the laser-activatable mold compound has a plurality of die pads. An interconnect electrically connects the plurality of die pads of the semiconductor die to the metal pads and/or metal traces at the first side of the laser-activatable mold compound.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 11, 2020
    Inventors: Stefan Schmalzl, Chau Fatt Chiang, Werner Reiss
  • Patent number: 10639833
    Abstract: An apparatus for molding a physical body comprising at least two mold materials, wherein the apparatus comprises a first mold tool and a second mold tool configured for defining a mold volume in between in which the physical body is moldable by supplying the at least two mold materials, and a supply unit configured for separately supplying the at least two mold materials to the mold volume, wherein at least part of at least one of the first mold tool and the second mold tool is movable to thereby increase the dimension of the mold volume after having supplied the first mold material to the mold volume and before and/or during supplying the second mold material to the mold volume.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: May 5, 2020
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, Khar Foong Chung
  • Patent number: 10631100
    Abstract: A device includes: a first sidewall including a first opening extending through the first sidewall; a first sensor attached to an interior surface of the first sidewall, wherein the first sensor is aligned to at least partially cover the first opening; a second sidewall opposite the first sidewall; a third sidewall attaching the first sidewall to the second sidewall; and a first contact pad disposed on an exterior surface of the third sidewall, wherein the first contact pad is configured to provide at least one of a power connection or a signal connection for the first sensor.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: April 21, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua
  • Patent number: 10595132
    Abstract: A device includes: a first sidewall including a first opening extending through the first sidewall; a first sensor attached to an interior surface of the first sidewall, wherein the first sensor is aligned to at least partially cover the first opening; a second sidewall opposite the first sidewall; a third sidewall attaching the first sidewall to the second sidewall; and a first contact pad disposed on an exterior surface of the third sidewall, wherein the first contact pad is configured to provide at least one of a power connection or a signal connection for the first sensor.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: March 17, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Chau Fatt Chiang, Kok Yau Chua
  • Publication number: 20200084550
    Abstract: A device includes: a first sidewall including a first opening extending through the first sidewall; a first sensor attached to an interior surface of the first sidewall, wherein the first sensor is aligned to at least partially cover the first opening; a second sidewall opposite the first sidewall; a third sidewall attaching the first sidewall to the second sidewall; and a first contact pad disposed on an exterior surface of the third sidewall, wherein the first contact pad is configured to provide at least one of a power connection or a signal connection for the first sensor.
    Type: Application
    Filed: September 12, 2018
    Publication date: March 12, 2020
    Inventors: Chau Fatt Chiang, Kok Yau Chua
  • Publication number: 20200048075
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Application
    Filed: October 22, 2019
    Publication date: February 13, 2020
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Publication number: 20200051898
    Abstract: In an embodiment, a leadframe includes a first electrically conductive part and a second electrically conductive part, each having an outer surface arranged to provide substantially coplanar outer contact areas having a footprint and an inner surface opposing the outer surface, the first part being spaced apart from the second part by a gap, a first recess arranged in the inner surface of the first part, a second recess arranged in the inner surface of the second part, and a first electrically conductive insert that is arranged in, and extends between, the first recess and the second recess and bridges the gap between the first part and the second part.
    Type: Application
    Filed: August 6, 2019
    Publication date: February 13, 2020
    Inventors: Chau Fatt Chiang, Paul Armand Asentista Calo, Kok Yau Chua, Josef Hoeglauer, Swee Kah Lee, Khay Chwan Saw
  • Patent number: 10549985
    Abstract: A semiconductor package includes a semiconductor die having a sensor structure disposed at a first side of the semiconductor die, and a first port extending through the semiconductor die from the first side to a second side of the semiconductor die opposite the first side, so as to provide a link to the outside environment. Corresponding methods of manufacture are also provided.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 4, 2020
    Assignee: Infineon Technologies AG
    Inventors: Dominic Maier, Matthias Steiert, Chau Fatt Chiang, Christian Geissler, Bernd Goller, Thomas Kilger, Johannes Lodermeyer, Franz-Xaver Muehlbauer, Chee Yang Ng, Beng Keh See, Claus Waechter
  • Patent number: 10501312
    Abstract: An embodiment device includes a body structure having an interior cavity, a control chip disposed on a first interior surface of the interior cavity, and a sensor attached, at a first side, to a second interior surface of the interior cavity opposite the first interior surface. The sensor has a mounting pad on a second side of the sensor that faces the first interior surface, and the sensor is vertically spaced apart from the control chip by an air gap, with the sensor is aligned at least partially over the control chip. The device further includes an interconnect having a first end mounted on the mounting pad, the interconnect extending through the interior cavity toward the first interior surface, and the control chip is in electrical communication with the sensor by way of the interconnect.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: December 10, 2019
    Assignee: Infineon Technologies AG
    Inventors: Sook Woon Chan, Chau Fatt Chiang, Kok Yau Chua, Swee Kah Lee, Chee Yang Ng
  • Patent number: 10490470
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hock Heng Chong, Sook Woon Chan, Chau Fatt Chiang, Khar Foong Chung, Chee Hong Fang, Muhammat Sanusi Muhammad, Mei Chin Ng, Yean Seng Ng, Pei Luan Pok, Choon Huey Wang
  • Publication number: 20190341324
    Abstract: A method of manufacturing a package, comprising embedding the semiconductor chip with an encapsulant comprising a transition metal in a concentration in a range between 10 ppm and 10,000 ppm; selectively converting of a part of the transition metal, such that the electrical conductivity of the encapsulant increases; and plating the converted part of the encapsulant with an electrically conductive material.
    Type: Application
    Filed: July 17, 2019
    Publication date: November 7, 2019
    Inventors: Sook Woon CHAN, Chau Fatt CHIANG, Kok Yau CHUA, Soon Lock GOH, Swee Kah LEE, Joachim MAHLER, Mei Chin NG, Beng Keh SEE, Guan Choon Matthew Nelson TEE