Patents by Inventor Che-Wei Hsu

Che-Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250233562
    Abstract: A Class-D audio amplifier includes a triangular wave generator, a wave reshaping device and a pulse-width modulator. The triangular wave generator generates a first triangular wave. The wave reshaping device generates a second triangular wave by reshaping the first triangular wave. The pulse-width modulator modulates a pair of differential audio input waves with the second triangular wave instead of the first triangular wave to reduce a switching loss of the Class-D audio amplifier.
    Type: Application
    Filed: January 15, 2024
    Publication date: July 17, 2025
    Inventors: Hsin-Yuan CHIU, Che-Wei HSU
  • Patent number: 12347919
    Abstract: The invention discloses a semiconductor package antenna structure and its manufacturing method, wherein the semiconductor package antenna structure includes a first substrate, a semiconductor chip, and a second substrate. The first substrate has at least two stacked first redistribution layers, and each of the first redistribution layers has a first dielectric layer, a first patterned metal layer, and/or a first conductive pillar layer. The semiconductor chip is embedded in the first substrate and coupled to the first redistribution layers. The second substrate has a second redistribution layer, a second conductive pillar layer, and an air dielectric layer, wherein the second conductive pillar layer is protruded from the second redistribution layer. The second substrate is connected to the first substrate by a second conductive pillar layer, and the air dielectric layer is located between the second redistribution layer, the second conductive pillar layer, and the first substrate.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: July 1, 2025
    Assignee: Phoenix Pioneer Technology Co., Ltd.
    Inventors: Che-Wei Hsu, Shih-Ping Hsu
  • Patent number: 12341106
    Abstract: A package structure includes at least one integrated circuit component, an insulating encapsulation, and a redistribution structure. The at least one integrated circuit component includes a semiconductor substrate, an interconnection structure disposed on the semiconductor substrate, and signal terminals and power terminals located on and electrically connecting to the interconnection structure. The interconnection structure is located between the semiconductor substrate and the signal terminals and between the semiconductor substrate and the power terminals, and where a size of the signal terminals is less than a size of the power terminals. The insulating encapsulation encapsulates the at least one integrated circuit component. The redistribution structure is located on the insulating encapsulation and electrically connected to the at least one integrated circuit component.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: June 24, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Lin, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Che-Wei Hsu
  • Patent number: 12334457
    Abstract: An integrated fan-out (InFO) package includes a die, an encapsulant, and a horn antenna. The die has an active surface and a rear surface opposite to the active surface. The encapsulant laterally encapsulates the die. The horn antenna is electrically connected to the die. The horn antenna includes a top wall and a bottom wall respectively located on two opposite sides of the die and the encapsulant. A portion of the top wall is located within a span of the active surface of the die. A portion of the bottom wall is located within a span of the rear surface of the die.
    Type: Grant
    Filed: February 1, 2024
    Date of Patent: June 17, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuei-Tang Wang, Tzu-Chun Tang, Chieh-Yen Chen, Che-Wei Hsu
  • Publication number: 20250181052
    Abstract: A method for predicting collision detection of moving path of machine tool includes the following steps. Firstly, the motion information of a processing unit is acquired through the data acquisition unit. Then, based on the motion information, the arithmetic unit calculates the stop position of the processing unit after deceleration; and, further based on the stop position of the processing unit, the collision detection unit performs anti-collision detection to compare the stop position of the processing unit and the workpiece position of the workpiece. In additional, a system for predicting collision detection of moving path of machine tool is also provided.
    Type: Application
    Filed: December 21, 2023
    Publication date: June 5, 2025
    Inventors: CHAO-CHUANG MAI, MING-CHUN HO, CHE-WEI HSU
  • Publication number: 20250142728
    Abstract: Provided is a coil carrier board, including a base coil layer, a conductive layer stacked on and bonded to the base coil layer, at least one build-up coil layer stacked on and bonded to the conductive layer, and an opening connecting the base coil layer, the conductive layer and the build-up coil layer. The coil carrier board has thick copper, fine line spacing and appropriate rigidity by means of the build-up circuit process and the structural design of the insulating layer of a photosensitive dielectric material bonded with a thermosetting dielectric material. Accordingly, the high current-carrying efficiency of the coil carrier board is enhanced, and the overall structure of the coil carrier board has better flatness, rigidity and high interlayer alignment accuracy, thereby facilitating miniaturization and automated assembly production.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 1, 2025
    Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Che-Wei HSU, Wen-Hung HU, Shih-Ping HSU
  • Publication number: 20250140610
    Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.
    Type: Application
    Filed: December 24, 2024
    Publication date: May 1, 2025
    Inventors: Chen-Hua Yu, Wei Ling Chang, Chuei-Tang Wang, Tin-Hao Kuo, Che-Wei Hsu
  • Patent number: 12274350
    Abstract: A mobile device attachment adapted for a mobile device and a container for food or liquid is provided. The mobile device attachment includes a magnetic connecting member and a connecting member. The magnetic connecting member is selectively magnetically connected to the mobile device and adapted to extend in an escaping direction. The connecting member is disposed between the container and the magnetic connecting member. The mobile device has an image capturing range. When the magnetic connecting member extends in the escaping direction, the container, the magnetic connecting member and the connecting member are located outside the image capturing range. Besides, a container including the mobile device attachment is also provided.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: April 15, 2025
    Assignee: EVOLUTIVE LABS CO., LTD.
    Inventors: Ching-Fu Wang, Ching-Yu Wang, Che-Wei Hsu, Jui-Chen Lu, Cheng-Che Ho
  • Patent number: 12272653
    Abstract: A semiconductor packaging substrate is provided, which includes a build-up circuit structure, at least one fiducial marker structure, and an insulating protective layer. The fiducial marker structure includes a fiducial marker and a second insulating layer covering the fiducial marker. The second insulating layer is made of a transparent insulation material, so that the fiducial marker inside the second insulating layer can be seen through a CCD lens or tool maker microscope for alignment so as to easily create a smaller see-through area and the process parameters can be easily controlled. Besides, the disclosure further provides a manufacturing method for the semiconductor packaging substrate.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: April 8, 2025
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Chao-Tsung Tseng, Che-Wei Hsu
  • Publication number: 20250104639
    Abstract: The disclosure provides a driving device for a self-luminous display panel and an operation method thereof. The driving device includes multiple GAMMA voltage circuits, a group of driving channels, and a routing circuit. Each driving channel is coupled to the corresponding GAMMA voltage circuit to receive a corresponding group of GAMMA voltages. Each driving channel converts corresponding sub-pixel data into a corresponding gray scale voltage based on the corresponding group of GAMMA voltages. The routing circuit is coupled to the output terminals of the driving channels. The routing circuit dynamically changes the coupling relationship between the driving channels and multiple data lines of the self-luminous display panel during different scanning periods.
    Type: Application
    Filed: September 24, 2023
    Publication date: March 27, 2025
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yi-Shen Cheng, Che Wei Hsu
  • Patent number: 12260825
    Abstract: The disclosure provides a driving device for a self-luminous display panel and an operation method thereof. The driving device includes multiple GAMMA voltage circuits, a group of driving channels, and a routing circuit. Each driving channel is coupled to the corresponding GAMMA voltage circuit to receive a corresponding group of GAMMA voltages. Each driving channel converts corresponding sub-pixel data into a corresponding gray scale voltage based on the corresponding group of GAMMA voltages. The routing circuit is coupled to the output terminals of the driving channels. The routing circuit dynamically changes the coupling relationship between the driving channels and multiple data lines of the self-luminous display panel during different scanning periods.
    Type: Grant
    Filed: September 24, 2023
    Date of Patent: March 25, 2025
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yi-Shen Cheng, Che Wei Hsu
  • Publication number: 20250082888
    Abstract: A breathing assistance apparatus user interface is described which presents animated information related to the management of the apparatus. The user interface is provided on a display screen of the apparatus. The animated illustrations can correspond to operational modes, warnings, user instructions, fault conditions, status, menu options, and the like. The animations can include a sequence of images shown in rapid succession which depict moving icons or objects, scrolling text, flashing colors, or any combination of these or the like. The user interface can combine static information along with animations.
    Type: Application
    Filed: August 14, 2024
    Publication date: March 13, 2025
    Inventors: Christopher Malcolm Crone, Christopher Simon James Quill, Kevin Peter O'Donnell, Jack Che-Wei Hsu, Jae Chul Han
  • Publication number: 20250088210
    Abstract: A mobile device protective case set is suitable for cooperating with a mobile device, the mobile device protective case set includes a main frame and an assembling component, the main frame has an inner circular surface, a back flange and at least one positioning portion, the inner circular surface encloses to define a space, the space is suitable for accommodating the mobile device, the back flange protrudes from the inner circular surface towards the space, the back flange has a device abutting surface, which is suitable for a back side of the mobile device to abut, and the positioning portion is disposed at the device abutting surface; the assembling component has a base portion and at least one clamping portion, the clamping portion is disposed at a partial outer periphery of the base portion, the clamping portion is suitable for combining the positioning portion, and the device abutting surface and the clamping portion are suitable to abut against the back side of the mobile device.
    Type: Application
    Filed: September 10, 2024
    Publication date: March 13, 2025
    Applicant: EVOLUTIVE LABS CO., LTD.
    Inventors: SHENG-CHE SU, CHE-WEI HSU, YU-CHUAN LIN
  • Publication number: 20250070073
    Abstract: The invention provides an embedded semiconductor packaging device, which includes a base, a chip, a frame surrounding structure, and an encapsulation layer. The base has a bonding surface. The chip has a top surface and a bottom surface opposite to each other, wherein the bottom surface is bonded to the bonding surface of the base through an adhesive layer. The frame surrounding structure is arranged along the periphery of a top surface of the chip. The encapsulation layer covers the chip and the frame surrounding structure.
    Type: Application
    Filed: July 23, 2024
    Publication date: February 27, 2025
    Inventor: CHE-WEI HSU
  • Patent number: 12218006
    Abstract: Systems, devices and methods of manufacturing a system on silicon wafer (SoSW) device and package are described herein. A plurality of functional dies is formed in a silicon wafer. Different sets of masks are used to form different types of the functional dies in the silicon wafer. A first redistribution structure is formed over the silicon wafer and provides local interconnects between adjacent dies of the same type and/or of different types. A second redistribution structure may be formed over the first redistribution layer and provides semi-global and/or global interconnects between non-adjacent dies of the same type and/or of different types. An optional backside redistribution structure may be formed over a second side of the silicon wafer opposite the first redistribution layer. The optional backside redistribution structure may provide backside interconnects between functional dies of different types.
    Type: Grant
    Filed: November 7, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Hua Yu, Wei Ling Chang, Chuei-Tang Wang, Tin-Hao Kuo, Che-Wei Hsu
  • Patent number: 12184246
    Abstract: A driving circuit of a loudspeaker includes a periodic signal generation circuit, a signal processing circuit, a class-D amplifier circuit, a current sensing circuit, and a sample and hold circuit. The periodic signal generation circuit is arranged to generate a periodic signal and a control signal. The signal processing circuit is coupled to the periodic signal generation circuit, and is arranged to generate a pre-driving signal. The class-D amplifier circuit is coupled to the signal processing circuit, and is arranged to drive the loudspeaker according to the pre-driving signal. The current sensing circuit is coupled to the class-D amplifier circuit, and is arranged to generate a current sensing signal. The sample and hold circuit is coupled to the periodic signal generation circuit and the current sensing circuit, and is arranged to sample and hold the current sensing signal according to the control signal, to generate a current sampling signal.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: December 31, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Che-Wei Hsu, Wun-Long Yu
  • Publication number: 20240387367
    Abstract: A method of manufacturing an electronic apparatus is described. The electronic apparatus includes an integrated fan-out package, a dielectric housing, and a plurality of conductive patterns. The dielectric housing is covering the integrated fan-out package, wherein a gap or a first dielectric layer is in between the dielectric housing and the integrated fan-out package. The plurality of conductive patterns is located on a surface of the dielectric housing, wherein the plurality of conductive patterns is located in between the dielectric housing and the integrated fan-out package.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Chun Tang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang WANG, Che-Wei Hsu
  • Publication number: 20240378279
    Abstract: In an example implementation according to aspects of the present disclosure, a XR system comprises an HMD which includes an HMD display and a motion detection device, an external display of a computing device, and a processor operatively coupled with a computer readable storage medium and instructions stored on the computer readable storage medium that, when executed by the processor, direct the processor to detect an activation of a privacy mode; display, by the HMD display, a first series of images to a user of the HMD; display, by the external display, a second series of images to other users; capture, by the motion detection device, movements of the user selecting a sequence of images of the first series of images displayed on the HMD display; and authenticate the user based on the movements of the user.
    Type: Application
    Filed: September 23, 2021
    Publication date: November 14, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Kuan-Lin Li, Che-Wei Hsu, Yew-Chung Hung
  • Patent number: 12136593
    Abstract: An electronic apparatus is provided. The electronic apparatus includes an integrated fan-out package, a dielectric housing, and a plurality of conductive patterns. The dielectric housing is covering the integrated fan-out package, wherein a gap or a first dielectric layer is in between the dielectric housing and the integrated fan-out package. The plurality of conductive patterns is located on a surface of the dielectric housing, wherein the plurality of conductive patterns is located in between the dielectric housing and the integrated fan-out package.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: November 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Chun Tang, Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Che-Wei Hsu
  • Patent number: 12100665
    Abstract: The present invention provides a semiconductor package structure including a first stacked structure and a second stacked structure, which is stacked on the first stacked structure. The first stacked structure includes a first dielectric layer, a first power chip, a first conductive connecting element, a first conductive pillar and a first patterned conductive layer. The second stacked structure includes a second dielectric layer, a second power chip, a second conductive connecting element, a second conductive pillar, a second patterned conductive layer, and a third patterned conductive layer. The first power chip and the second power chip are stacked to provide a smaller volume semiconductor package structure, that the first power chip and the second power chip may be directly electrically connected through the circuit structure and may eliminate the related disadvantages of the lead frame. In addition, a manufacturing method of a semiconductor package structure is also disclosed.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: September 24, 2024
    Assignee: Phoenix Pioneer Technology Co., Ltd.
    Inventor: Che-Wei Hsu