Abstract: The current disclosure describes semiconductor devices, e.g., transistors including a thin semimetal layer as a channel region over a substrate, which includes bandgap opening and exhibits semiconductor properties. Described semiconductor devices include source/drain regions that include a thicker semimetal layer over the thin semimetal layer serving as the channel region, this thicker semimetal layer exhibiting metal properties. The semimetal used for the source/drain regions include a same or similar semimetal material as the semimetal of the channel region.

Abstract: A method for manufacturing a semiconductor device includes forming a source region, a drain region, and a gate dielectric layer and a gate electrode covering a channel region between the source region and the drain region, forming an insulating layer over the source region, the drain region, and the gate electrode, forming first to third vias penetrating the insulating layer and exposing portions of the source region, the drain region, and the gate electrode, respectively, forming a source contact in the first via to electrically connect to the source region, forming a drain contact in the second via to electrically connect to the drain region, and forming a gate contact in the third via to electrically connect to the gate electrode. One or more of the first to third vias is formed by ion bombarding by a focused ion beam and followed by a thermal annealing process.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor including one material selected from the group consisting of He, Ne, and Ga.

Abstract: A method for manufacturing a semiconductor device includes forming a source region, a drain region, and a gate dielectric layer and a gate electrode covering a channel region between the source region and the drain region, forming an insulating layer over the source region, the drain region, and the gate electrode, forming first to third vias penetrating the insulating layer and exposing portions of the source region, the drain region, and the gate electrode, respectively, forming a source contact in the first via to electrically connect to the source region, forming a drain contact in the second via to electrically connect to the drain region, and forming a gate contact in the third via to electrically connect to the gate electrode. One or more of the first to third vias is formed by ion bombarding by a focused ion beam and followed by a thermal annealing process.

Abstract: A key structure includes a keycap, a base plate and a wing-type supporting element. When the keycap is depressed in response to an external force, a first frame and a second frame of the wing-type supporting element are pushed by each other through protrusion structures and rotating shafts. Consequently, the first frame and the second frame can be swung relative to the base plate.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor including one material selected from the group consisting of He, Ne, and Ga.

Abstract: A method for manufacturing a semiconductor device includes forming a source region, a drain region, and a gate dielectric layer and a gate electrode covering a channel region between the source region and the drain region, forming an insulating layer over the source region, the drain region, and the gate electrode, forming first to third vias penetrating the insulating layer and exposing portions of the source region, the drain region, and the gate electrode, respectively, forming a source contact in the first via to electrically connect to the source region, forming a drain contact in the second via to electrically connect to the drain region, and forming a gate contact in the third via to electrically connect to the gate electrode. One or more of the first to third vias is formed by ion bombarding by a focused ion beam and followed by a thermal annealing process.

Abstract: A keyboard device includes a membrane circuit board, a base plate and a key structure. The key structure a keycap, a first connecting element, a second connecting element, a stabilizer bar and an auxiliary bar. The first connecting element and the second connecting element are connected between the keycap and the base plate. The first connecting element has a first lateral side and a second lateral side. The second connecting element has a third lateral side and a fourth lateral side. The third lateral side faces the second lateral side. The stabilizer bar is pivotally coupled to the keycap, the first lateral side of the first connecting element and the fourth lateral side of the second connecting element. The auxiliary bar is pivotally coupled to the keycap, the second lateral side of the first connecting element and the third lateral side of the second connecting element.

Abstract: A keyboard device includes plural key structures. Each key structure includes a plate assembly, a keycap, a connecting member and a buffering element. The plate assembly has a hollow region. The keycap is located over the plate assembly. The connecting member is connected between the keycap and the plate assembly. The keycap is connected with the connecting member through at least one hook of the keycap. The keycap is movable upwardly or downwardly relative to the plate assembly through the connecting member. The buffering element is installed on the plate assembly. The buffering element is extended in a direction toward the keycap and penetrated through the hollow region of the plate assembly. While the keycap is moved downwardly and the at least one hook of the keycap is contacted with the buffering element, there is the gap between the keycap and the plate assembly.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.

Abstract: A keyboard device includes plural key structures, a membrane circuit board and a flexible light shielding element. Each key structure includes a keycap. The keycap has a first end surface and a second end surface. The membrane circuit board is located under the keycap. The flexible light shielding element is arranged between the keycap and the membrane circuit board, and includes a bottom layer and plural stopping walls. Each stopping wall includes a wall body and a platform part. The wall body is protruded from the bottom layer and in the direction toward the keycap. An included angle is formed between the wall body and the bottom layer. The platform part is protruded from the wall body. The platform part is arranged between the second end surface of the keycap and the bottom layer. The platform part is contacted with the second end surface.

Abstract: A method and structure for providing a GAA device. In some embodiments, a substrate including an insulating layer disposed thereon is provided. By way of example, a first metal portion is formed within the insulating layer. In various embodiments, a first lateral surface of the first metal portion is exposed. After exposure of the first lateral surface of the first metal portion, a first graphene layer is formed on the exposed first lateral surface. In some embodiments, the first graphene layer defines a first vertical plane parallel to the exposed first lateral surface. Thereafter, in some embodiments, a first nanobar is formed on the first graphene layer, where the first nanobar extends in a first direction normal to the first vertical plane defined by the first graphene layer.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor including one material selected from the group consisting of He, Ne, and Ga.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor including one material selected from the group consisting of He, Ne, and Ga.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.

Abstract: A semiconductor device includes a semiconductor fin protruding from a substrate, a gate electrode over the semiconductor fin, a gate insulating layer between the semiconductor fin and the gate electrode, source and drain regions disposed on opposite sides of the semiconductor fin, a first stressor formed in a region between the source and drain regions. The first stressor is a grading strained stressor including multiple graded portions formed at graded depths. The first stressor is configured to create one of a graded compressive stress or a graded tensile stress.

Abstract: A keyboard device includes a base plate and a key structure. The key structure includes a keycap, a first connecting element, a second connecting element and a stabilizer bar. The first connecting element and the second connecting element are arranged between the base plate and the keycap and connected with the base plate and the keycap. The stabilizer bar is fixed on the first connecting element and the second connecting element. Since the stabilizer bar does not collide with the base plate to generate the unpleasant noise, the keyboard device of the present invention is capable of reducing the noise. Moreover, since the stabilizer bar is fixed on the first connecting element and the second connecting element, it is not necessary to install hooks corresponding to the stabilizer bar on the keycap and the base plate and the fabricating cost is reduced.

Abstract: The current disclosure describes semiconductor devices, e.g., transistors including a thin semimetal layer as a channel region over a substrate, which includes bandgap opening and exhibits semiconductor properties. Described semiconductor devices include source/drain regions that include a thicker semimetal layer over the thin semimetal layer serving as the channel region, this thicker semimetal layer exhibiting metal properties. The semimetal used for the source/drain regions include a same or similar semimetal material as the semimetal of the channel region.

Abstract: A luminous keyboard includes a key module, a light guide plate, a top-view light-emitting element and a light-shading element. The top-view light-emitting element emits a light beam. The light guide plate is located under the key module. The top-view light-emitting element is located under the light guide plate. A light-outputting surface of the top-view light-emitting element is contacted with the light guide plate. The light-shading element is disposed on the light guide plate for shading the light beam. A portion of the light-shading element is inserted into the light guide plate opening and formed as a reflective part in the light guide plate opening. After the light beam is projected on the reflective part and reflected by the reflective part, the light beam is transferred within the light guide plate and projected to the key module.