Abstract: A Super-RENS readable optical storage medium is used with an optical reading apparatus having an optical pickup head. The readable optical storage medium includes a substrate, a first track and a second track. The first track is formed on a surface of the substrate and has thereon a plurality of first recording marks. The first track is made of a phase changeable material with a first phase type and the first recording marks is made of the phase changeable material with a second phase type. The first phase type is distinguished from the second phase type in reflective coefficient. The second track is formed on the surface of the substrate and next to the first track. The second track is made of the phase changeable material with a third phase type distinguished from the first phase type in reflective coefficient.

Abstract: The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality of second contacts in direct connection to the first contacts one on one when being placed above the light emitting element.

Abstract: A motherboard includes a south-bridge chipset, a north-bridge chipset and a central processor unit (CPU). The south-bridge chipset generates at least control-setting data. The north-bridge chipset has a reset register for controlling the north-bridge chipset to generate a reset signal and a control-set resister for storing the control-setting data generated by the south-bridge chipset. The CPU has a plurality of configuration parameters. The configuration parameters of the CPU are reset in accordance with the reset signal, and the control-setting data is written into the CPU by the north-bridge chipset to set one of the configuration parameters of the CPU.

Abstract: An improved structure slide track assembly comprised of an inner track, it having a check element on its exterior surface and a solid, stepped crown extending from the top of the check element and an outer track that contains a ball bearing channel rail and a center track. The ball bearing channel rail has a reticulated catch slot that is engaged by a spring-based pawl of the center track guide sleeve into a unitary structural entity. When the drawer is installed onto the outer tracks, while the check element stepped crowns at the drawer inner tracks force down press sections on the guide sleeves to disengage the ball bearing channel rails from the center tracks and enable easy sliding with the drawer. As such, the present invention achieves efficient installation and the protection of the ball bearing channel rails to prevent damage due to inappropriate installation.

Abstract: A light emitting module includes a substrate, a driving circuit chip, a light emitting element and a connector. By providing the connector with conductive bumps and arranging it as a flip chip to contact the conductive bumps with bond pads of the driving circuit chip and the light emitting element, a light emitting module with a reduced bonding pitch but reliable performance can be produced. Alternatively, it can be the driving circuit chip instead of the connector functioning as a flip chip. The driving circuit chip includes conductive bumps in contact with bond pads of the light emitting element and the connector.

Abstract: A method of forming a multilayer electrode capacitor is described. A trench is formed in a substrate or in an insulator layer. Two sets of conductive layers are deposited on the inner surface of the trench. The first set of conductive layers is electrically connected to each other, and so is the second set of conductive layers. Each of the second set of conductive layers is inserted between two first conductive layers, and dielectric layers are interposed between two conductive layers to form a multilayer electrode capacitor.

Abstract: A symmetrical circuit layout structure includes a number of signal wires, a ground wire and a dielectric layer. The signal wires include a first portion placed on a first plane and a second portion placed on a second plane. The ground wire includes a first portion placed above the first portion of the signal wires and adjacent to the second portion of the signal wires, and a second portion placed below the second portion of the signal wires and adjacent to the first portion of the signal wires. The dielectric layer is placed between the first plane and the second plane.

Abstract: The present invention discloses a stacked capacitor having interdigital electrodes and method for preparing the same. The stacked capacitor comprises a first interdigital electrode, a second interdigital electrode and a dielectric material sandwiched between the first interdigital electrode and the second interdigital electrode. The first and the second interdigital electrodes comprise a body and a plurality of fingers electrically connected to the body, and the dielectric material can be silicon nitride or silicon oxide. Preferably, fingers of the first interdigital electrode are made of titanium nitride, while fingers of the second interdigital electrode are made of polysilicon. The body of the first and the second interdigital electrodes are preferably made of titanium nitride.

Abstract: An adhesive label dispenser includes a drive unit for moving a carrier sheet with adhesive labels thereon, a support plate for guiding the carrier sheet, a conveying mechanism driven by the drive unit, and a sensor unit. The support plate includes a label output end at which the carrier sheet bends downward, freeing the adhesive labels from the carrier sheet. The conveying mechanism is located below the label output end. The conveying mechanism conveys the adhesive labels freed from the carrier sheet to an output end for fetch. The sensor unit detects whether one of the adhesive labels freed from the carrier sheet has reached a predetermined position and sends a signal for stopping or activating the drive unit.

Abstract: The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality of second contacts in direct connection to the first contacts one on one when being placed above the light emitting element.

Abstract: A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep trench. Thereafter, a trench is formed in the substrate on one side of the deep trench capacitor. The trench exposes a portion of the upper electrode of the deep trench capacitor and a portion of the substrate. After that, a semiconductor strip is formed in the trench. A gate dielectric layer is formed over the substrate to cover the exposed semiconductor strip and the substrate. A gate is formed over the gate dielectric layer such that the gate and the semiconductor strip crosses over each other, and the gate-covered portion of the semiconductor strip serves as a channel region.

Abstract: A memory initialization method for a plurality of memories. The memories are initialized according to predetermined initial parameters. A first quantity of the memories is detected. Optimum parameters are set according hardware information of the memories. The memories are re-initialized according to the optimum parameters. A second quantity of the memories is detected. The parameters for memory initialization are adjusted when the first quantity and the second quantity are different.

Abstract: A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep trench. Thereafter, a trench is formed in the substrate on one side of the deep trench capacitor. The trench exposes a portion of the upper electrode of the deep trench capacitor and a portion of the substrate. After that, a semiconductor strip is formed in the trench. A gate dielectric layer is formed over the substrate to cover the exposed semiconductor strip and the substrate. A gate is formed over the gate dielectric layer such that the gate and the semiconductor strip crosses over each other, and the gate-covered portion of the semiconductor strip serves as a channel region.

Abstract: A method of fabricating a dynamic random access memory cell is provided. A substrate having a patterned mask layer thereon and a deep trench therein is provided. The patterned mask layer exposes the deep trench. A deep trench capacitor is formed inside the deep trench. Thereafter, a trench is formed in the substrate on one side of the deep trench capacitor. The trench exposes a portion of the upper electrode of the deep trench capacitor and a portion of the substrate. After that, a semiconductor strip is formed in the trench. A gate dielectric layer is formed over the substrate to cover the exposed semiconductor strip and the substrate. A gate is formed over the gate dielectric layer such that the gate and the semiconductor strip crosses over each other, and the gate-covered portion of the semiconductor strip serves as a channel region.

Abstract: The present invention discloses a radio frequency identification device implemented with a metal-gate semiconductor fabrication process, wherein the charge capacitor, which is formed by the special parasitic N-type and P-type guard rings in the chip fabricated with the metal-gate process, incorporated with the original P-type and N-type transistors of metal oxide semiconductor (PMOS/NMOS) not only can provide a horizontal surface current but also can provide a rectified current for the performance of the entire circuit, which can advance the metal gate process to RFID industry in cooperation with an identification code holder circuit and a non-synchronous local oscillation circuit so that the fabrication cost can be lowered and the fabrication time can be shortened.

Abstract: Selectively providing LC overdrive by determining a relative noise level between a current video frame and a previous video frame and overdriving the current video frame based upon the determined relative noise level.

Abstract: A reduced memory method, apparatus, and system suitable for implementation in Liquid Crystal Display (LCDs) that reduces a pixel element response time thereby enabling the display of high quality fast motion images thereupon. As a method of generating an overdrive pixel value in an LCD device, a predicted pixel value is compressed and stored. The stored compressed pixel value is then retrieved and decompressed as a start pixel value. An overdrive pixel value based upon a target pixel value and the start pixel value such that the overdrive pixel value enables a pixel to reach the target pixel value within a single frame period.

Abstract: One embodiment of the present invention relates to an eyeglass assembly including a pair of first eyeglasses having a first bridge interconnecting a pair of first lenses, a pair of second eyeglasses having a second bridge interconnecting a pair of second lenses and retainers provided on opposite sides of the first frame. Each retainer may include an upper clamping plate and a lower clamping plate. The lower clamping plate may have at least one restricting groove to correspond to at least one rib so that combination of the at least one rib and the at least one restricting groove is able to combine the first pair of eyeglasses and the second pair of eyeglasses.

Abstract: A semiconductor wafer is disclosed that includes a plurality of fields, including a plurality of alignment fields. Each alignment field includes a plurality of intra-field small scribe lane primary mark (SSPM) overlay mark pairs there around. The SSPM mark pairs allow for in-situ, non-passive intra-field alignment correction. In one embodiment, there may be between two and four alignment fields, and between two and four SSPM mark pairs around each alignment field. The SSPM marks of each mark pair may be extra scribe-lane marks.

Abstract: An digital picture frame capable of acquiring image of the picture independently, especially to digitalize the image of photos to a digital format and then display it on a display panel. The digital picture frame includes a display module which supports the image display, a scanning module which scans photos, and an input/output module for image delivery over external image processing/storing devices, such as the hard disk, camcorder, digital still camera and network image server.