Patents by Inventor Chee Wai

Chee Wai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8097842
    Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring increased spatial resolution, reduced cross-talk between adjoining photodiodes, and increased amplitude output signals from individual photodiodes. With respect to prior art single track optical encoders, some photodiodes are removed from a photodiode array, while nevertheless maintaining appropriate phase relationships between pairs of A and A\, and B and B\, photodiodes. Such a configuration of photodiodes results in increased inter-photodiode spacing, and thereby permits spatial resolution to be increased while boosting current outputs from individual photodiodes. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided.
    Type: Grant
    Filed: May 31, 2009
    Date of Patent: January 17, 2012
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Chung Min Thor, Gim Eng Chew, Chee Wai Ng
  • Publication number: 20110292005
    Abstract: A display apparatus includes a plurality of scan lines, a plurality of data lines, a plurality of pixel transistors, a plurality of pixel electrodes, a gate driver, a source driver and a discharge circuit. The data lines are intersected with the scan lines. Each of the pixel transistors is electrically coupled to a corresponding scan line and a corresponding data line, and each of the pixel electrodes is electrically coupled to a corresponding pixel transistor. The gate driver is electrically coupled to the scan lines, and the source driver is electrically coupled to the data lines. The discharge circuit is electrically coupled to the gate driver and the data lines. The discharge circuit starts when the display apparatus is turned off, to control the gate drive for turning on the pixel transistors simultaneously, and make the pixel electrodes be electrically communicated with a reference voltage.
    Type: Application
    Filed: November 5, 2010
    Publication date: December 1, 2011
    Applicant: AU OPTRONICS CORP.
    Inventors: Chee-Wai LAU, Yu-Hsin Ting, Chung-Lin Fu, Wei-Chun Hsu, Nan-Ying Lin, Fu-Yuan Liou
  • Patent number: 7977698
    Abstract: A system and method is disclosed for allowing a solid substrate, such as a printed circuit board (PCB), to act as the support structure for an electronic circuit. In one embodiment, the LEDs which form a part of a scrambler assembly are constructed on a first substrate and the electrical connections are run to the edges of the substrate and end in electrical contacts positioned thereat. The substrate is then connected to the scrambler package by a series of electrical and mechanical connections to form the LED package. The electrical contacts which are part of the LED package extend from the LED package so as to enable electrical contact with a separate controller substrate.
    Type: Grant
    Filed: March 18, 2005
    Date of Patent: July 12, 2011
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Elizabeth Fung Ching Ling, Chia Chee Wai, Ng Joh Joh, Koay Hui Peng
  • Publication number: 20100301195
    Abstract: Disclosed are various embodiments of a single track reflective optical encoder featuring increased spatial resolution, reduced cross-talk between adjoining photodiodes, and increased amplitude output signals from individual photodiodes. With respect to prior art single track optical encoders, some photodiodes are removed from a photodiode array, while nevertheless maintaining appropriate phase relationships between pairs of A and A\, and B and B\, photodiodes. Such a configuration of photodiodes results in increased inter-photodiode spacing, and thereby permits spatial resolution to be increased while boosting current outputs from individual photodiodes. The single track optical encoder configurations disclosed herein permit very high resolution reflective optical encoders in small packages to be provided.
    Type: Application
    Filed: May 31, 2009
    Publication date: December 2, 2010
    Applicant: Avago Technologies ECBU (Singapore) Pte. Ltd.
    Inventors: Chung Min Thor, Gim Eng Chew, Chee Wai Ng
  • Patent number: 7772881
    Abstract: A PLD having real-time in-system programmability (ISP) capability is provided. The PLD includes a configuration memory region into which the updated configuration is obtained. A user memory region stores the state for registers of the PLD. The configuration memory region communicates the updated configuration to a core logic region that includes a real-time ISP detection block that detects the initiation of a real-time ISP operation. A controller is in communication with the logic block. The PLD maintains register data by reading a state of the registers of the PLD/logic block and clamping the output pins before the core logic region is being updated. The state of the registers is saved in the memory region as directed by the controller. Upon completion of the update into the logic array, the registers of the PLD are cleared and a control signal from a memory interface triggers the controller to read stored the register data back from the memory and reload the registers.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: August 10, 2010
    Assignee: Altera Corporation
    Inventors: Chee Wai Yap, Joseph DeLaere, Mark Webb
  • Patent number: 7748115
    Abstract: A method of forming a circuit board, the method comprising mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: July 6, 2010
    Assignee: The Agency for Science, Technology and Research
    Inventors: Sunappan Vasudivan, Chee Wai Lu, Boon Keng Lok
  • Patent number: 7714427
    Abstract: Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: May 11, 2010
    Assignee: Intel Corporation
    Inventors: Chee Wai Wong, Chee Hoo Lee
  • Patent number: 7705691
    Abstract: A substrate for power decoupling and a method of forming a substrate for power decoupling. The substrate comprises one or more decoupling capacitors; and one or more interconnections to the decoupling capacitors. At least one of the interconnections comprises a lossy material.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: April 27, 2010
    Assignee: Agency for Science, Technology & Research
    Inventors: Chee Wai Albert Lu, Boon Keng Lok, Chee Khuen Stephen Wong, Kai Meng Chua, Lai Lai Wai, Sunnappan Vasudivan
  • Publication number: 20090284483
    Abstract: A display device and method having a sensing function is described. The device includes a liquid crystal display (LCD) panel and plural sense lines. The LCD panel includes a plurality of data lines and a plurality of gate lines. Each of the data lines is connected electrically to a plurality of left pixels and a plurality of right pixels. The sense line is disposed between each two adjacent data lines, and each of the sense lines is configured to be parallel to the data lines and perpendicular to the gate lines. The sense lines are used to transmit touch signals.
    Type: Application
    Filed: October 22, 2008
    Publication date: November 19, 2009
    Applicant: AU OPTRONICS CORP.
    Inventors: Yu-Hsin Ting, Chee-Wai Lau, Ming-Tien Lin, Chung-Lung Li, Heng-Sheng Chou
  • Patent number: 7575920
    Abstract: The invention features ITF expression vectors and methods of producing ITF.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: August 18, 2009
    Assignee: The GI Company, Inc.
    Inventors: Chee-Wai Woon, Nicholas P. Barker
  • Patent number: 7568815
    Abstract: A solid state light source having first and second component light sources and an interface circuit and a method for making the same are disclosed. The first and second component light sources emit light having first and second color points on different sides of the black body radiation curve. The first and second component light sources include LEDs that emit light of a first wavelength and a layer of a light converting material that converts a portion of that light to light of a second wavelength. The interface circuit powers the first and second component light sources such that the solid state light source has a color point that is closer to the black body radiation curve than either the first or second color points. A third component light source can be included to expand the range of white color temperatures that can be reached by the light source.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: August 4, 2009
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Joon Chok Lee, Kee Yean Ng, Chee Wai Chia, David C. Feldmeier
  • Patent number: 7548432
    Abstract: An embedded capacitor structure comprising a main body; at least one embedded capacitor, having a first electrode, a dielectric layer, and a second electrode, formed in the main body; and at least one via electrical connection formed in the main body; wherein at least one of the first and second electrodes is free from direct electrical connection to the via electrical connections.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: June 16, 2009
    Assignee: Agency for Science, Technology and Research
    Inventors: Chee Wai Lu, Boon Keng Lok, Kai Meng Chua, Lai Lai Wai
  • Publication number: 20090148962
    Abstract: A substrate structure and method of wideband power decoupling comprising one or more embedded capacitors each comprising a ferroelectric material.
    Type: Application
    Filed: December 30, 2008
    Publication date: June 11, 2009
    Applicant: Agency for Science, Technology and Research
    Inventors: Chee Wai Albert Lu, Boon Keng Lok
  • Patent number: 7525685
    Abstract: A color printing system includes a color monitor and printer having different color gamuts. A color chart is printed out by the printer. A light source outputs light to the color printer and a color sensor detects the light reflected from the color chart printout. The sensor outputs sensor color values representing the light received from the color chart printout. A print-preview matrix is calculated from the monitor color chart values and the sensor color values. An image is input to and displayed by the monitor and is converted into a print-preview image using the print-preview matrix. The monitor displays the monitor image and the print-preview image before printing the image.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: April 28, 2009
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Selvan Maniam, Joh Joh Ng, Khee Boon Lin, Chee Wai Chia
  • Publication number: 20080238335
    Abstract: A solid state light source having first and second component light sources and an interface circuit and a method for making the same are disclosed. The first and second component light sources emit light having first and second color points on different sides of the black body radiation curve. The first and second component light sources include LEDs that emit light of a first wavelength and a layer of a light converting material that converts a portion of that light to light of a second wavelength. The interface circuit powers the first and second component light sources such that the solid state light source has a color point that is closer to the black body radiation curve than either the first or second color points. A third component light source can be included to expand the range of white color temperatures that can be reached by the light source.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 2, 2008
    Inventors: Joon Chok Lee, Kee Yean Ng, Chee Wai Chia, David C. Feldmeier
  • Patent number: 7400407
    Abstract: A meter for measuring the turbidity of a fluid includes a light source for directing a light beam through a fluid under test towards a reflective surface and a sensor for detecting light reflected from the reflective surface and passing back through the fluid under test. The meter outputs a signal indicative of the turbidity of the fluid under test.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: July 15, 2008
    Assignee: Avago Technologies ECBU IP Pte Ltd
    Inventors: Joh Joh Ng, Khee Boon Lim, Chee Wai Chia, Selvan Maniam
  • Patent number: 7398538
    Abstract: A disk drive unit for a disk includes a mounting plate, a spindle motor assembly, a slide mechanism provided with a slide, a pickup unit mounted on the slide, a first transmission member operatively connected with the slide, and a second transmission member. The first transmission member is positioned such that it is in engagement with the second transmission member when the pickup unit is in its read and/or write position, and such that the first transmission member is out of engagement with the second transmission member when the pickup unit is in its home position. In order to bring the first and second transmission members into engagement, the transmission members are provided with engagement members. As a result, a limit switch assembly is no longer necessary.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: July 8, 2008
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Kum Chung Loh, Yu Zhou, Chee Wai Shum
  • Patent number: 7359213
    Abstract: A circuit board is formed by mounting at least one passive component on a first surface of a first laminate material; interconnecting the passive component to contact traces and vias of the first laminate material; and attaching a second laminate material to the first surface of the first laminate material utilizing a lamination process, the second laminate material sheet having at least one of a recess, a through-hole or both formed therein for accommodating the passive component in the second laminate.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: April 15, 2008
    Assignee: The Agency for Science, Technology and Research
    Inventors: Sunappan Vasudivan, Chee Wai Lu, Boon Keng Lok
  • Patent number: 7341887
    Abstract: Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: March 11, 2008
    Assignee: Intel Corporation
    Inventors: Chee Wai Wong, Chee Hoo Lee
  • Patent number: 7242084
    Abstract: Apparatuses and associated methods to improve integrated circuit packaging are generally described. More specifically, apparatuses and associated methods to improve solder joint reliability are described. In this regard, according to one example embodiment, one or more strengthening pin(s) are coupled to the periphery of a package substrate, the strengthening pin(s) capable of coupling to a circuit board.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: July 10, 2007
    Assignee: Intel Corporation
    Inventors: Chee Wai Wong, Cheng Siew Tay