Patents by Inventor Cheeman Yu

Cheeman Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120025396
    Abstract: A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 2, 2012
    Inventors: Chih-Chin Liao, Cheeman Yu, Ya Huei Lee
  • Publication number: 20110316164
    Abstract: A semiconductor die and semiconductor package formed therefrom, and methods of fabricating the semiconductor die and package, are disclosed. The semiconductor die includes an edge formed with a plurality of corrugations defined by protrusions between recesses. Bond pads may be formed on the protrusions. The semiconductor die formed in this manner may be stacked in the semiconductor package in staggered pairs so that the die bond pads on the protrusions of a lower die are positioned in the recesses of the upper die.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Inventors: Chih-Chin Liao, Cheeman Yu
  • Patent number: 8053276
    Abstract: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Cheeman Yu, Chi-Chin Liao, Hem Takiar
  • Patent number: 8053880
    Abstract: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: November 8, 2011
    Assignee: SanDisk Technologies, Inc.
    Inventors: Cheeman Yu, Chih-Chin Liao, Hem Takiar
  • Patent number: 7939944
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: May 10, 2011
    Assignee: SanDisk Corporation
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheeman Yu, Hem Takiar
  • Publication number: 20100252315
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 7, 2010
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheeman Yu, Hem Takiar
  • Publication number: 20100055836
    Abstract: An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically coupling the stacked semiconductor packages.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Inventors: Cheeman Yu, Chih-Chin Liao, Hem Takiar
  • Publication number: 20100052155
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • Publication number: 20100055847
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu