Abstract: Displaying a hierarchy. A method includes identifying a set of nodes representing sites in a hierarchy. The set of nodes share one or more common characteristics not shared by any other nodes in the hierarchy. The method further includes determining that the set of nodes, as a set, meet a predetermined condition. As a result of the nodes sharing the one or more common characteristics not shared by any other nodes in the hierarchy and as a result of the set meeting the predetermined condition, the method further includes aggregating at least a portion of the set of nodes. The method further includes displaying in a graphical user interface a representation of the hierarchy including displaying the aggregated portion as a single entity in the hierarchy.

Abstract: A method of forming an integrated circuit comprises forming a first doped region in a substrate using a first angle ion implantation performed on a first side of a gate structure. The gate structure has a length in a first direction and a width in a second direction. The method also comprises forming a second doped region in the substrate using a second angle ion implantation performed on a second side of the gate structure. The first angle ion implantation has a first implantation angle with respect to the second direction and the second angle ion implantation has a second implantation angle with respect to the second direction. Each of the first implantation angle and the second implantation angle is substantially larger than 0° and less than 90°.

Abstract: A package structure is provided, which includes: a chip carrier having a plurality of conductive connection portions; at least an electronic element disposed on the chip carrier; a plurality of conductive wires erectly positioned on the conductive connection portions, respectively; an encapsulant formed on the chip carrier for encapsulating the conductive wires and the electronic element, wherein one ends of the conductive wires are exposed from the encapsulant; and a circuit layer formed on the encapsulant and electrically connected to exposed ends of the conductive wires. According to the present invention, the conductive wires serve as an interconnection structure. Since the wire diameter of the conductive wires is small and the pitch between the conductive wires can be minimized, the present invention reduces the size of the chip carrier and meets the miniaturization requirement.

Abstract: Embodiments of the present invention provide an audio playback method and apparatus. The embodiments of the present invention provide an audio playback method, applied to a mobile terminal that has a spatial attitude sensor, where the mobile terminal includes at least three speakers, and the at least three speakers are not in a same straight line, where the method includes: when screen rotation is performed on the mobile terminal, acquiring spatial attitude information; and controlling, according to the spatial attitude information, audio content played by each speaker, so that a speaker located on the left of currently played video information plays a left audio channel, and a speaker located on the right of the currently played video information plays a right audio channel. The audio playback method and apparatus provided in the embodiments of the present invention can be applied to the mobile terminal having the spatial attitude sensor.

Abstract: An electronic cigarette includes a mouthpiece, an atomizer assembly, a first connecting assembly, a second connecting assembly, and a power assembly. The atomizer assembly is received in the first housing of the mouthpiece, which includes a liquid reservoir and a heating element. The first connecting assembly includes a first conductive tube, a second conductive tube, and a first sleeve. The first sleeve includes an insulation tube, a convex ring, and a connecting portion. The insulation tube is disposed between the first conductive tube and the second conductive tube; the convex ring is sleeved on the second conductive tube and fixed to the first housing; the connecting portion extends through the second conductive tube and interconnects the insulation tube and the convex ring. The second connecting assembly includes a second sleeve and a flexible conductive ring. The power assembly includes a second housing fixed to the first housing and a battery.

Abstract: A slide rail assembly includes first and second rails, a running carriage, and a pushing member. The second rail can be longitudinally displaced relative to the first rail. The running carriage is slidably mounted to the first rail, carries the second rail, and can be moved together with the second rail in a differential manner with respect to the second rail. The pushing member is movably connected to the first rail and displaceable between a horizontal position and an inclined position. Should an error occur in differential movement of the running carriage, the pushing member is able to be driven by a portion of the second rail to displace from the horizontal position to the inclined position and hence displace the running carriage to correct the error.

Abstract: A charging apparatus for recognizing an adaptor is applied to an alternating current to direct current adaptor. The charging apparatus includes an input side universal serial bus interface, a data voltage detection unit, a microcontroller and a first charging power output unit. The data voltage detection unit detects a kind of the alternating current to direct current adaptor. The microcontroller determines an overall output charging power of the charging apparatus according to the kind of the alternating current to direct current adaptor. The microcontroller is configured to control the first charging power output unit to output the overall output charging power to a first battery.

Abstract: A silicon substrate having a III-V compound layer disposed thereon is provided. A diode is formed in the silicon substrate through an ion implantation process. The diode is formed proximate to an interface between the silicon substrate and the III-V compound layer. An opening is etched through the III-V compound layer to expose the diode. The opening is filled with a conductive material. Thereby, a via is formed that is coupled to the diode. A High Electron Mobility Transistor (HEMT) device is formed at least partially in the III-V compound layer.

Abstract: Managing data in a data storage system including at least one Data Storage Device (DSD) and a host. An initial location is determined for data to be stored in the at least one DSD based on at least one attribute defined by the host. A source portion is identified from a plurality of source portions in the at least one DSD for a garbage collection operation based on the at least one attribute defined by the host. A destination portion is identified in the at least one DSD for storing data resulting from the garbage collection operation based on the at least one attribute defined by the host. Garbage collection of the data in the source portion is performed into the destination portion, and after completion of garbage collection, the source portion is designated as a new destination portion for a new garbage collection operation.

Abstract: A cell for a non-volatile ternary content-addressable (TCAM) memory is provided. The cell comprises a first variable resistive element, a first transistor and a charge control transistor. Two terminals of the first variable resistive element are respectively electrically coupled to a first search-line and a storage node. A drain electrode of the first transistor is electrically coupled to the storage node. A source electrode of the first transistor is electrically coupled to a low-side search-line. A gate electrode of the charge control transistor coupled to a match-line is electrically coupled to the storage node. When the cell operates in a search phase and the first transistor is turned on, a pulse voltage is applied across the first search-line and the low-side search-line for determining whether the voltage of the storage node is larger than a match threshold during the period of the pulse.

Abstract: Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.

Abstract: The PTC circuit protection device includes a PTC polymer material and two electrodes attached to the PTC material. The PTC polymer material includes a polymer matrix and a conductive filler dispersed in the polymer matrix. The conductive filler includes first titanium carbide particles and second titanium carbide particles. The first titanium carbide particles have an average Fisher sub-sieve particle size of less than 2.5 ?m. The second titanium carbide particles have an average Fisher sub-sieve particle size of less than 3.2 ?m.

Abstract: Provided is a preparation method of a crystalline silicon film.

Abstract: A slide rail assembly includes a first rail, a second rail movably connected to the first rail, a bracket base connected to the first rail, and a supporting base movably mounted to the bracket base. The supporting base includes a wall portion and at least one supporting portion transversely connected to the wall portion. The wall portion and the at least one supporting portion jointly define a supporting channel corresponding to a longitudinal channel defined by the first rail. The at least one supporting portion of the supporting base supports the second rail as the second rail is longitudinally displaced relative to the first rail and extends through the longitudinal channel of the first rail and the supporting channel of the supporting base.

Abstract: A method of compressing digital image data is provided that includes selecting an entropy code for encoding a line of pixels in the digital image data, wherein the entropy code is selected from a plurality of variable length entropy codes, using spatial prediction to compute a pixel predictor and a pixel residual for a pixel in the line of pixels, and selectively encoding the pixel residual using one of the entropy code or run mode encoding.

Abstract: A method for manufacturing the hemispherical light emitting portion of an artificial smoldering scent-stick comprises the steps of providing a light guide pipe and a light emitting element. The light guide pipe includes a bottom end and a top end opposite to the bottom portion. The light emitting element is fixed on the bottom end. A colloid is dripped on an end face of the top end and the colloid cured, to obtain the shape of the required light-emitting portion.

Abstract: A bio-chip adapted for separating and concentrating particles in a solution includes a chip body defining a receiving space therein for receiving the solution, an inner electrode disposed in the receiving space, an outer electrode unit disposed in the receiving space of the chip body and including a first outer electrode that is spaced apart from and surrounds the inner electrode, and a second outer electrode that is spaced apart from and surrounds the first outer electrode, and a power source electrically connected to the inner electrode, the first outer electrode, and the second outer electrode. A method for using the bio-chip to separating and concentrating the particles in the solution is also disclosed in the present invention.

Abstract: An integrated circuit includes a signal line and a plurality of shielding structures. The signal line is routed along a first direction and is in a first metallization layer. Each shielding structure includes a plurality of non-contiguous shielding patterns aligned along the first direction. The plurality of shielding structures includes a first and a second shielding structures in a second metallization layer that adjoins the first metallization layer and a third and a fourth shielding structures in a third metallization layer that adjoins the first metallization layer. The first metallization layer is between the second and the third metallization layers. The first and the second shielding structures are separated from each other along a second direction perpendicular to the first direction. The third and the fourth shielding structures are separated from each other along the second direction.

Abstract: A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing a plasma process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer.