Patents by Inventor Chen An

Chen An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140278955
    Abstract: A system and method of providing tunable generation of advertisements are disclosed. In some embodiments, a target advertisement goal for a website is received. The target advertisement goal comprises a first goal for a first type of advertisement and a second goal for a second type of advertisement. Advertisements to display on the website are determined based on the target advertisement goal. The advertisements are caused to be displayed on the website. In some embodiments, the first type of advertisement is an advertisement for merchandise offered for sale on the website, and the second type of advertisement is an advertisement for merchandise offered for sale on a different website.
    Type: Application
    Filed: December 18, 2013
    Publication date: September 18, 2014
    Applicant: EBAY INC.
    Inventors: Valerie Nygaard, Enoch Chen
  • Publication number: 20140264559
    Abstract: A method for forming a semiconductor device includes forming a hard mask layer over a substrate comprising a semiconductor material of a first conductivity type, and forming a plurality of trenches in the hard mask layer and extending into the substrate. Each trench has at least one side wall and a bottom wall. The method further includes forming at least one barrier insulator layer along the at least one side wall and over the bottom wall of each trench, removing the at least one barrier insulator layer over the bottom wall of each trench, and filling the plurality of trenches with a semiconductor material of a second conductivity type.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 18, 2014
    Inventors: Tai-I Yang, Hong-Seng Shue, Kun-Ming Huang, Tzu-Cheng Chen, Ming-Che Yang, Po-Tao Chu
  • Publication number: 20140266382
    Abstract: In a particular embodiment, a method includes modifying an output impedance associated with the input receiver. In response to modifying the output impedance, the method restricts an output voltage at an output node of the input receiver. Particular embodiments of an input receiver circuit are also disclosed.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Chang Ki Kwon, Wilson Jianbo Chen, Reza Jalilizeinali
  • Publication number: 20140278622
    Abstract: A facility comprising systems and methods for calculating, for a given budget, an allocation of resources to improve a particular outcome, such as revenue, profit, target miss, etc. The facility takes advantage of first-order derivate information and can decrease both the computation time and memory use in the calculation of suggested spends or allocations, such as the amount of marketing resources to be allocated to various marketing channels. The facility comprises techniques for 1) determining, for a given budget and a response model, resource allocations that will improve the modeled business outcome, 2) determining, for a given budget and revenue response model, resource allocations that will increase profits, and 3) determining, for a given budget, a given set of revenue response models, and a given set of revenue targets, resource allocations that will reduce total target misses.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Huigang Chen, Neil Morley, Ashok Patel, Ilgaz Sungur, Phil Weissman
  • Publication number: 20140264016
    Abstract: Measurements of line roughness are separated into groups depending upon pre-layers. Image data collected from similar pre-layer types are considered together in order to separate effects of line roughness from distortion of measurements caused by the pre-layers. The resulting line roughness measurements are used to estimate an aspect of line quality.
    Type: Application
    Filed: May 3, 2013
    Publication date: September 18, 2014
    Applicant: Macronix International Co., Ltd.
    Inventors: YU-CHUNG CHEN, SHIN-CHANG TSAI, TA-HUNG YANG
  • Publication number: 20140260293
    Abstract: A system includes a controller configured to control an operational behavior of a turbine system. The controller includes a droop response system configured to detect one or more operational characteristics of the turbine system as an indication of a frequency variation of an electric power system associated with the turbine system. The droop response system is further configured to generate a response to vary an output of the turbine system in response to the indication of the frequency variation. The controller includes a multivariable droop response correction system configured to determine one or more possible errors associated with the one or more operational characteristics of the turbine system, and to generate a plurality of correction factors to apply to the response generated by the droop response system. The plurality of correction factors is configured to correct the response generated by the droop response system.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: General Electric Company
    Inventors: Yuhui Chen, John Dalton Warren
  • Publication number: 20140269607
    Abstract: The present invention provides an electronic device including a coupler, a noise-estimation apparatus and an assembly unit. The coupler receives a baseband signal. The noise-estimation apparatus receives the baseband signal and subtracts a predetermined synchronization preamble from the baseband signal to obtain a noise-estimation signal, and the predetermined synchronization preamble is a transmission signal that conforms to the standards of 802.11bg and/or IEEE 802.11n. The assembly unit receives the baseband signal and subtracts a noise-estimation signal from the baseband signal to obtain an output signal.
    Type: Application
    Filed: August 14, 2013
    Publication date: September 18, 2014
    Applicant: Wistron NeWeb Corp.
    Inventors: Chen-Chao CHANG, Yung-Cheng LIN
  • Publication number: 20140272686
    Abstract: A mask and method of fabricating same are disclosed. In an example, a mask includes a substrate, a reflective multilayer coating disposed over the substrate and a patterned absorption layer disposed over the reflective multilayer. The patterned absorption layer has a mask image region and a mask border region. The exemplary mask also includes a mask border frame disposed over the mask border region. The mask border frame has a top surface and a bottom surface. The top surface is not parallel to the bottom surface.
    Type: Application
    Filed: March 13, 2014
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: YEN-CHENG LU, SHINN-SHENG YU, JENG-HORNG CHEN, ANTHONY YEN
  • Publication number: 20140282305
    Abstract: One or more techniques or systems for incorporating a common template into a system on chip (SOC) design are provided herein. For example, a common template mask set is generated based on a first set of polygon positions from a first vendor and a second set of polygon positions from a second vendor. A third party creates a third party SOC design using a set of design rules generated based on the common template mask set. The common template is fabricated based on the third party SOC design using the common template mask set. Because the common template is formed using the common template mask set and because the common template mask set is based on polygon positions from both the first vendor and the second vendor, a part can be connected to the SOC regardless of whether the part is sourced from the first vendor or the second vendor.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: William Wu Shen, Yun-Han Lee, Chin-Chou Liu, Hsien-Hsin Lee, Chung-Sheng Yuan, Chao-Yang Yeh, Wei-Cheng Wu, Ching-Fang Chen
  • Publication number: 20140264491
    Abstract: An integrated circuit device includes a semiconductor substrate, and a semiconductor strip extending into the semiconductor substrate. A first and a second dielectric region are on opposite sides of, and in contact with, the semiconductor strip. Each of the first dielectric region and the second dielectric region includes a first portion level with the semiconductor strip, and a second portion lower than the semiconductor strip. The second portion further includes a portion overlapped by the semiconductor strip.
    Type: Application
    Filed: April 19, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tai-Chun Huang, Chih-Tang Peng, Chia-Wei Chang, Ming-Hua Yu, Hao-Ming Lien, Chao-Cheng Chen, Tze-Liang Lee
  • Publication number: 20140264500
    Abstract: A photovoltaic device includes lateral P-I-N light-sensitive diodes disposed on a silicon island formed by a P? epitaxial layer and surrounded by trenches that provide lateral isolation, where the island is separated from the substrate by a porous silicon region that is grown under the island and isolates the lower portions of the photovoltaic device from the highly doped substrate. The trenches extend through the P? epitaxial material into the P+ substrate to facilitate self-limiting porous silicon formation at the bottom of the island, and also to suppress electron-hole recombination. A protective layer (e.g., SiN) is formed on the trench walls to further restrict porous silicon formation to the bottom of the island. Black silicon on the trench walls enhances light capture. The photovoltaic devices form low-cost embedded photovoltaic arrays on CMOS IC devices, or are separated to produce low-cost, HV solar arrays for solar energy sources, e.g. for solar concentrators.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicants: Yissum Research Development Company of The Hebrew University of Jerusalem Ltd., Tower Semiconductor Ltd.
    Inventors: Yakov Roizin, Evgeny Pikhay, Irit Chen-Zamero, Ora Eli, Micha Asscher, Amir Saar
  • Publication number: 20140274419
    Abstract: A localization system for mounting a game in a portable storage device onto a game console is provided. The system includes a portable storage device and a game console. After the game console is connected with the portable storage device and a game is selected via an application program menu, a target word unit and game information in a small database is searched. Then, whether any cover data or configuration data is corresponding to an identification code in the small database is checked. If yes, the cover data or configuration data is returned to the application program menu and displayed on a screen. The selected game is then downloaded into the game console from the portable storage device, thereby achieving the promptly mounting and localizing the game without downloading all games from the portable storage device.
    Type: Application
    Filed: May 29, 2014
    Publication date: September 18, 2014
    Inventor: Pao-Chen Lin
  • Publication number: 20140259392
    Abstract: The application is directed to a system operationally configured to assist individuals with performing one or more activities including, but not necessarily limited to moving from one location to another, showering, using a mirror, using a sink, bathing, using a toilet, performing one or more leisure activities, and combinations thereof. In one aspect, the system may include an assembly and transport member connected thereto, the assembly including a bed and/or bath and/or toilet and/or personal item storage system and/or entertainment system integrated with one or both of smart and manual processes operationally configured to assist individuals with performing one or more activities.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 18, 2014
    Inventors: Chih-Cheng Chen, Izuchukwu Samuel ILonze
  • Publication number: 20140261527
    Abstract: A hair tie includes a fabric and an elastic band. The fabric has a first edge and a second edge, and is bent such that the first edge and the second edge are side by side. The elastic band is enclosed within the fabric. The elastic band and the first edge and the second edge of the fabric are stitched together. The two ends of the fabric are interconnected. The present disclosure also provides a hair tie manufacturing method and equipment.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 18, 2014
    Applicant: YUMARK ENTERPRISES CORP.
    Inventor: MING-HUNG CHEN
  • Publication number: 20140272709
    Abstract: Methods and materials for making a semiconductor device are described. The method includes forming a middle layer (ML) of a patterning stack (e.g., a tri-layer patterning stack such as a tri-layer resist) and forming a photoresist layer directly on the middle layer. The middle layer includes an additive component having a photo base generator (PBG). The substrate including the photoresist layer and the middle layer is then exposed to a radiation. A covalent bond between the ML and the photoresist layer may be formed.
    Type: Application
    Filed: August 29, 2013
    Publication date: September 18, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Yu Liu, Ching-Yu Chang
  • Publication number: 20140273533
    Abstract: A semiconductor annealing method and system uses a vacuum pump to produce a vacuum environment in the annealing chamber to thereby remove undesired gas element influences. A control system obtains pressure and temperature measurements from the annealing chamber to control operation of the heating elements and vacuum pump to thereby maintain process integrity.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Chan Tsun, Ta-Lu Cheng, Lee-Te Tseng, Yi-Hann Chen, Ming-Te Chen
  • Publication number: 20140276277
    Abstract: A foot massager includes a plurality of roller massagers, two rotational massagers, a power source, a forward-and-backward-movable device, a first transmission device, and a second transmission device. The power source rotates clockwise and drives the first transmission device and the second transmission device, such that the first transmission device drives a one-way bearing to perform idle rotation and drives the roller massagers to perform rolling massage, whereas the second transmission device drives the two rotational massagers to perform rotational massage. The power source rotates anticlockwise and drives the first transmission device and the second transmission device, such that the first transmission device drives the one-way bearing to drive the foot massaging base to move forward and backward in its entirety and drives the roller massagers to perform rolling massage, whereas the second transmission device drives the two rotational massagers to perform rotational massage.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventor: Jue-Yao Chen
  • Publication number: 20140282326
    Abstract: Methods for standard cells using finFET standard cell structures with polysilicon on OD edges. Standard cells are defined using finFET transistors and having gate structures forming a transistor at an intersection with a semiconductor fin. Polysilicon dummy structures are formed on the edges of the active areas or OD areas of the standard cells. In a design flow, a pre-layout netlist schematic for the standard cells includes a three terminal MOS device corresponding to the polysilicon dummy structure on the edges of the standard cell. After an automated place and route process forms a device layout using the standard cells, a post layout netlist is extracted. Where two standard cells abut one another, a single polysilicon dummy structure is formed on the common boundary. A layout versus schematic comparison is then performed comparing the pre-layout netlist and the post-layout netlist to verify the layout obtained. Additional methods are disclosed.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih Hsin Chen, Kai-Ming Liu
  • Publication number: 20140264337
    Abstract: Embodiments of mechanisms for testing a die package with multiple packaged dies on a package substrate use an interconnect substrate to provide electrical connections between dies and the package substrate and to provide probing structures (or pads). Testing structures, including daisy-chain structures, with metal lines to connect bonding structures connected to signals, power source, and/or grounding structures are connected to probing structures on the interconnect substrate. The testing structures enable determining the quality of bonding and/or functionalities of packaged dies bonded. After electrical testing is completed, the metal lines connecting the probing structures and the bonding structures are severed to allow proper function of devices in the die package. The mechanisms for forming test structures with probing pads on interconnect substrate and severing connecting metal lines after testing could reduce manufacturing cost.
    Type: Application
    Filed: June 21, 2013
    Publication date: September 18, 2014
    Inventors: Chih-Hua Chen, Chen-Shien Chen, Ching-Wen Hsiao
  • Publication number: 20140278282
    Abstract: Downhole drilling tools designed and manufactured to reduce bit axial force and torque and to enhance drilling efficiency comprising laying out some cutters in one spiral direction of rotation about a bit rotational axis and other cutters in an opposite spiral direction of rotation; evaluating forces acting on cutters during simulated engagement with a downhole formation (straight and transitional drilling); and modifying cutter layout with respect to a spiral direction of rotation. Some embodiments further comprise, prior to simulation, placing cutters in cutter groups/sets at respective locations to obtain a level of force balance. Multilevel force balanced downhole drilling tools may be designed using five respective simulations: cutter group level, neighbor cutter group level, cutter set level, group of N (N=3 or N=4) consecutive cutters level and all cutters level. Cutter layout procedures and algorithms to minimize respective bit forces and in some embodiments to obtain force balance are described.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 18, 2014
    Inventor: Shilin Chen